From 47e5d68e3c675d106a5e91590c7915edbefda22b Mon Sep 17 00:00:00 2001 From: Junkyu Kang Date: Wed, 20 Jul 2022 18:41:27 +0800 Subject: [PATCH 001/124] gps: Enable SI SUPL over Wifi Test: - - SI SUPL Wifi on + mobile network off - SI SUPL Wifi on + mobile network on - SI SUPL Wifi off + mobile network on - SI SUPL Wifi on + airplane mode on Bug: 239671126 Change-Id: I308f7501085be765c3cdcc9858b93e98554b2bc3 --- gps.xml.l10 | 5 ++++- gps_user.xml.l10 | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gps.xml.l10 b/gps.xml.l10 index 6285691..0400cef 100644 --- a/gps.xml.l10 +++ b/gps.xml.l10 @@ -20,7 +20,10 @@ SuplSslMethod="SSLv23_NO_TLSv1_2" SuplEnable="true" - SuplUseApn="true" + SuplUseApn="false" + SuplUseApnNI="true" + SuplUseFwCellInfo="false" + SuplDummyCellInfo ="true" SuplTlsCertDirPath="/etc/security/cacerts" SuplTlsCertPath="/vendor/etc/gnss/gps.cer" SuplUT1Seconds="20" diff --git a/gps_user.xml.l10 b/gps_user.xml.l10 index 19dbbef..c347740 100644 --- a/gps_user.xml.l10 +++ b/gps_user.xml.l10 @@ -19,7 +19,10 @@ SuplSslMethod="SSLv23_NO_TLSv1_2" SuplEnable="true" - SuplUseApn="true" + SuplUseApn="false" + SuplUseApnNI="true" + SuplUseFwCellInfo="false" + SuplDummyCellInfo ="true" SuplTlsCertDirPath="/etc/security/cacerts" SuplTlsCertPath="/vendor/etc/gnss/gps.cer" SuplUT1Seconds="20" From 4403bc43db7dfed2d0e6ee7eb6acd2380da9e75e Mon Sep 17 00:00:00 2001 From: achigoliu Date: Thu, 4 Aug 2022 18:55:26 +0800 Subject: [PATCH 002/124] Bundle handheld_core_hardware.xml Bug: 237110906 Test: Manual, verify build artifacts Signed-off-by: achigoliu Change-Id: I5865b21a4ab2bd31e5a69d497422117fafbd1414 Merged-In: I92137b615c7bce28026f858c201d8bd530754b5b --- device-lynx.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index fd31000..f97b4dc 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -202,3 +202,7 @@ PRODUCT_VENDOR_PROPERTIES += \ # Use GmsCorePrebuilt y2022w28 USE_GMSCORE_PREBUILT_Y2022W28 := true + +# Device features +PRODUCT_COPY_FILES += \ + frameworks/native/data/etc/handheld_core_hardware.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/handheld_core_hardware.xml From 1db103ba1085065299f4f533bce8265a9bc13f6a Mon Sep 17 00:00:00 2001 From: David Li Date: Tue, 16 Aug 2022 08:22:02 +0000 Subject: [PATCH 003/124] audio: Phase in Waves mps file and volume curve audio_policy.xml file I put L10 EVT tuning files in the attached file. L10 EVT HW modify Proto speaker. I need to re-tune mps file. I base on EVT speaker make this mps file tuning. And slightly lower volume step 21th to let volume curve smoothly. So, I modify audio_policy.xml file. Files from the latest attachment on b/242521368 Bug: 242153654 Bug: 242521368 Test: verified by hardware engineers Change-id: Ide63f88ee7aa55f4b79c53de2d70314bc20ab285 --- audio/lynx/config/audio_policy_volumes.xml | 4 ++-- audio/lynx/tuning/waves/waves_preset.mps | Bin 187198 -> 128782 bytes 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/audio/lynx/config/audio_policy_volumes.xml b/audio/lynx/config/audio_policy_volumes.xml index 2fc20cb..dd4bff2 100644 --- a/audio/lynx/config/audio_policy_volumes.xml +++ b/audio/lynx/config/audio_policy_volumes.xml @@ -16,7 +16,7 @@ + + false + From a011c11f37a2bff3b541cabdbc32571b701c2ac9 Mon Sep 17 00:00:00 2001 From: Hsiu-Chang Chen Date: Tue, 19 Jul 2022 12:54:52 +0800 Subject: [PATCH 015/124] wifi: Move driver initialization to an eariler time sys.boot_completed may take more time to be set in the first boot after factory reset. It will cause wifi framework try to enable wifi before driver ready. Move the timing of driver initialization forward to all modules ready. Bug: 242681939 Bug: 240889310 Test: wifi enables after booting Change-Id: I97d742ffe9723d2fc09f370f3d98dfdc4413af61 --- conf/init.lynx.rc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc index 10140a5..c55b27d 100644 --- a/conf/init.lynx.rc +++ b/conf/init.lynx.rc @@ -52,7 +52,7 @@ on post-fs-data chmod 0660 /sys/class/st33spi/st33spi/st33spi_state # Wifi -on property:sys.boot_completed=1 +on property:vendor.all.modules.ready=1 write /sys/bus/platform/drivers/cnss2/qcom,cnss-qca6490/fs_ready 1 # Create directories for wifihal services mkdir /dev/socket/wifihal 0770 wifi wifi From b74e2b582bb310d4176837fd987afdb61b9984e9 Mon Sep 17 00:00:00 2001 From: horngchuang Date: Fri, 12 Aug 2022 14:01:40 +0800 Subject: [PATCH 016/124] Add system property for camera OIS with system imu Bug: 240851527 Test: in-rom GCA Change-Id: Ifd3e4254973e66215d31004a1f8ca28ccc7c35ce Merged-In: I80d33ab2ef9e7e2fc3acf33580f8e333988b62f2 --- device-lynx.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 7d275b2..d3f4273 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -205,6 +205,10 @@ PRODUCT_VENDOR_PROPERTIES += \ PRODUCT_VENDOR_PROPERTIES += \ persist.vendor.camera.1080P_60fps_binning_except_rear_main=true +# OIS with system imu +PRODUCT_VENDOR_PROPERTIES += \ + persist.vendor.camera.ois_with_system_imu=true + # Use GmsCorePrebuilt y2022w28 USE_GMSCORE_PREBUILT_Y2022W28 := true From 738f85f5b07fb3cc8b81449e710b6d89f43a20dd Mon Sep 17 00:00:00 2001 From: Cheney Ni Date: Wed, 10 Aug 2022 10:29:43 +0000 Subject: [PATCH 017/124] Bluetooth: OOBS enabling Bug: 203079726 Test: Pass Bluetooth ON / OFF and manual tests Change-Id: I02d2240148b52d71ff2026e247d2803f32b5b344 --- bluetooth/qti_default.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk index a6abd5c..6132dec 100644 --- a/bluetooth/qti_default.mk +++ b/bluetooth/qti_default.mk @@ -49,7 +49,7 @@ TARGET_BLUETOOTH_HCI_V1_1 = true TARGET_BLUETOOTH_UART_DEVICE = "/dev/ttySAC18" UART_USE_TERMIOS_AFC = true TARGET_USE_QTI_BT_IBS = false -TARGET_USE_QTI_BT_OBS = false +TARGET_USE_QTI_BT_OBS = true TARGET_USE_QTI_BT_SAR_V1_1 = true TARGET_USE_QTI_BT_CHANNEL_AVOIDANCE = true From b06ff4dd496d84a94147092780c59e403dfd5dca Mon Sep 17 00:00:00 2001 From: Kyle Lin Date: Mon, 8 Aug 2022 18:11:31 +0800 Subject: [PATCH 018/124] Update MIFTargetLoad default values Bug: 237365265 Test: build, boot and check the values Change-Id: Ibdafe72dc7200c11f3aa84e49e49e6ed0d359b42 --- powerhint.json | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/powerhint.json b/powerhint.json index 6376757..ee82abe 100644 --- a/powerhint.json +++ b/powerhint.json @@ -145,9 +145,9 @@ "Name": "MIFTargetLoad", "Path": "/sys/class/devfreq/17000010.devfreq_mif/interactive/target_load", "Values": [ - "20 5 80", "20 10 80", - "80 10 80" + "80 10 80", + "60 10 40" ], "ResetOnInit": true }, From b031889746d745940446f10e8443c338dd0171c4 Mon Sep 17 00:00:00 2001 From: jimmyshiu Date: Mon, 29 Aug 2022 06:48:58 +0000 Subject: [PATCH 019/124] Enable ADPF CPU hints for SF Allow these devices to send CPU hints to PowerHAL from SF to reduce drops and save power. Bug: b/241152899 Bug: b/195990840 Test: https://android-build.googleplex.com/builds/abtd/run/L70800000956157278 Change-Id: I81df99f4ec01f417d1589e2323de599819993590 (Port from commit 8a419466b86ab07a25fc18d7d6a2a9ee154f6839) --- conf/init.lynx.rc | 8 ++++++++ device-lynx.mk | 4 ++++ powerhint.json | 22 ---------------------- 3 files changed, 12 insertions(+), 22 deletions(-) diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc index c55b27d..a8d0818 100644 --- a/conf/init.lynx.rc +++ b/conf/init.lynx.rc @@ -89,3 +89,11 @@ on property:vendor.device.modules.ready=1 chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ss_base chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ss_diff chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ss_raw + +# Override SF and RE uclamps to 0 on boot after being set elsewhere, for adpf cpu hints +on property:sys.boot_completed=1 + trigger override-sf-uclamp + +on override-sf-uclamp + write /proc/vendor_sched/rt_uclamp_min 0 + write /proc/vendor_sched/sf_uclamp_min 0 diff --git a/device-lynx.mk b/device-lynx.mk index d3f4273..a4f2d00 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -215,3 +215,7 @@ USE_GMSCORE_PREBUILT_Y2022W28 := true # Device features PRODUCT_COPY_FILES += \ frameworks/native/data/etc/handheld_core_hardware.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/handheld_core_hardware.xml + +# Enable adpf cpu hint session for SurfaceFlinger +PRODUCT_DEFAULT_PROPERTY_OVERRIDES += \ + debug.sf.enable_adpf_cpu_hint=true diff --git a/powerhint.json b/powerhint.json index ee82abe..a9c8223 100644 --- a/powerhint.json +++ b/powerhint.json @@ -169,16 +169,6 @@ ], "ResetOnInit": true }, - { - "Name": "SFUClampBoost", - "Path": "/proc/vendor_sched/sf_uclamp_min", - "Values": [ - "159", - "85", - "39" - ], - "ResetOnInit": true - }, { "Name": "MLUclampBoost", "Path": "/proc/vendor_sched/nnapi_uclamp_min", @@ -497,12 +487,6 @@ } ], "Actions": [ - { - "PowerHint": "INTERACTION", - "Node": "SFUClampBoost", - "Duration": 5000, - "Value": "85" - }, { "PowerHint": "LAUNCH", "Node": "UClampThreshold", @@ -521,12 +505,6 @@ "Duration": 5000, "Value": "1" }, - { - "PowerHint": "LAUNCH", - "Node": "SFUClampBoost", - "Duration": 5000, - "Value": "85" - }, { "PowerHint": "LAUNCH", "Node": "CPUBigClusterMaxFreq", From 82f3bbe15f9105ca75bb1e9984fd846b9b554d32 Mon Sep 17 00:00:00 2001 From: Richard Chang Date: Tue, 30 Aug 2022 10:39:45 +0000 Subject: [PATCH 020/124] mm: sync max_cached_processes settings in ActivityManager Bug: 237364731 Test: pts-tradefed run commandAndExit pts -m PtsPerfWbsTestCases -t com.google.android.perfwbs.pts.MemoryTest#testMaxCachedProcesses Change-Id: I47cb03f2053287fc4b7c2249c885b7b7de4fd3a8 --- lynx/overlay/frameworks/base/core/res/res/values/config.xml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml index 8df3fca..f840d88 100644 --- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml +++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml @@ -155,6 +155,9 @@ 90 + + 64 + 2 3 From d6b99410381b2a9450a9dea8a78f53f9029afb68 Mon Sep 17 00:00:00 2001 From: Rick Yiu Date: Wed, 31 Aug 2022 07:52:02 +0000 Subject: [PATCH 021/124] Config dex2oat according to thermal status Config dex2oat cpuset and thread count according to thermal status. LIGHT cpuset = 0,1,2,3,4,5 thread = 6 MODERATE cpuset = 0,1,2,3 thread = 4 SEVERE cpuset = 0,1,2,3 thread = 4 CRITICAL cpuset = 0,1,2,3 thread = 2 EMERGENCY cpuset = 0,1,2,3 thread = 1 Bug: 242948832 Test: build pass Change-Id: I04adb1aeb343b71a2741aaef1ad776398a3be1b7 --- powerhint.json | 370 +++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 325 insertions(+), 45 deletions(-) diff --git a/powerhint.json b/powerhint.json index a9c8223..d0d30d8 100644 --- a/powerhint.json +++ b/powerhint.json @@ -484,6 +484,28 @@ "1" ], "DefaultIndex": 0 + }, + { + "Name": "Dex2oatThreads", + "Path": "vendor.powerhal.dalvik.vm.dex2oat-threads", + "Values": [ + "1", + "2", + "4", + "6", + "8" + ], + "Type": "Property" + }, + { + "Name": "Dex2oatCPUSet", + "Path": "vendor.powerhal.dalvik.vm.dex2oat-cpu-set", + "Values": [ + "0,1,2,3", + "0,1,2,3,4,5", + "0,1,2,3,4,5,6,7" + ], + "Type": "Property" } ], "Actions": [ @@ -1380,76 +1402,250 @@ "Value": "60000" }, { - "PowerHint": "FACE_UNLOCK_BOOST", - "Node": "CPUBigClusterMaxFreq", - "Duration": 1000, - "Value": "9999999" + "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "Node": "Dex2oatThreads", + "Duration": 0, + "Value": "6" }, { - "PowerHint": "FACE_UNLOCK_BOOST", - "Node": "CPUBigClusterMinFreq", - "Duration": 1000, - "Value": "9999999" + "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "Node": "Dex2oatCPUSet", + "Duration": 0, + "Value": "0,1,2,3,4,5" }, { - "PowerHint": "FACE_UNLOCK_BOOST", - "Node": "CPU_LITTLE_TSKIN_BYPASS", - "Duration": 1000, + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "PMU_POLL", + "Duration": 0, "Value": "1" }, { - "PowerHint": "FACE_UNLOCK_BOOST", - "Node": "CPU_MID_TSKIN_BYPASS", - "Duration": 1000, + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "BigControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "MidControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "LittleControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "G3dControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "TpuControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "BigSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "MidSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "LittleSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "G3dSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "TpuSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "Dex2oatThreads", + "Duration": 0, + "Value": "4" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "Node": "Dex2oatCPUSet", + "Duration": 0, + "Value": "0,1,2,3" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "PMU_POLL", + "Duration": 0, "Value": "1" }, { - "PowerHint": "FACE_UNLOCK_BOOST", - "Node": "CPU_BIG_TSKIN_BYPASS", - "Duration": 1000, + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "BigControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "MidControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "LittleControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "G3dControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "TpuControlTempSet", + "Duration": 0, + "Value": "80000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "BigSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "MidSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "LittleSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "G3dSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "TpuSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "Dex2oatThreads", + "Duration": 0, + "Value": "4" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "Node": "Dex2oatCPUSet", + "Duration": 0, + "Value": "0,1,2,3" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "PMU_POLL", + "Duration": 0, "Value": "1" }, { - "PowerHint": "FP_BOOST", - "Node": "CPUBigClusterMaxFreq", - "Duration": 1000, - "Value": "9999999" + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "BigControlTempSet", + "Duration": 0, + "Value": "80000" }, { - "PowerHint": "FP_BOOST", - "Node": "CPUBigClusterMinFreq", - "Duration": 1000, - "Value": "9999999" + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "MidControlTempSet", + "Duration": 0, + "Value": "80000" }, { - "PowerHint": "FP_BOOST", - "Node": "CPU_LITTLE_TSKIN_BYPASS", - "Duration": 1000, - "Value": "1" + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "LittleControlTempSet", + "Duration": 0, + "Value": "80000" }, { - "PowerHint": "FP_BOOST", - "Node": "CPU_MID_TSKIN_BYPASS", - "Duration": 1000, - "Value": "1" + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "G3dControlTempSet", + "Duration": 0, + "Value": "80000" }, { - "PowerHint": "FP_BOOST", - "Node": "CPU_BIG_TSKIN_BYPASS", - "Duration": 1000, - "Value": "1" + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "TpuControlTempSet", + "Duration": 0, + "Value": "80000" }, { - "PowerHint": "FP_BOOST", - "Node": "TRUSTY_VIRTIO_HIGH", - "Duration": 1000, - "Value": "1" + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "BigSwitchOnTempSet", + "Duration": 0, + "Value": "60000" }, { - "PowerHint": "FP_BOOST", - "Node": "TRUSTY_HIGH", - "Duration": 1000, - "Value": "1" + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "MidSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "LittleSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "G3dSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "TpuSwitchOnTempSet", + "Duration": 0, + "Value": "60000" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "Dex2oatThreads", + "Duration": 0, + "Value": "2" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "Node": "Dex2oatCPUSet", + "Duration": 0, + "Value": "0,1,2,3" }, { "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", @@ -1535,6 +1731,90 @@ "Duration": 0, "Value": "60000" }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "Node": "Dex2oatThreads", + "Duration": 0, + "Value": "1" + }, + { + "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "Node": "Dex2oatCPUSet", + "Duration": 0, + "Value": "0,1,2,3" + }, + { + "PowerHint": "FACE_UNLOCK_BOOST", + "Node": "CPUBigClusterMaxFreq", + "Duration": 1000, + "Value": "9999999" + }, + { + "PowerHint": "FACE_UNLOCK_BOOST", + "Node": "CPUBigClusterMinFreq", + "Duration": 1000, + "Value": "9999999" + }, + { + "PowerHint": "FACE_UNLOCK_BOOST", + "Node": "CPU_LITTLE_TSKIN_BYPASS", + "Duration": 1000, + "Value": "1" + }, + { + "PowerHint": "FACE_UNLOCK_BOOST", + "Node": "CPU_MID_TSKIN_BYPASS", + "Duration": 1000, + "Value": "1" + }, + { + "PowerHint": "FACE_UNLOCK_BOOST", + "Node": "CPU_BIG_TSKIN_BYPASS", + "Duration": 1000, + "Value": "1" + }, + { + "PowerHint": "FP_BOOST", + "Node": "CPUBigClusterMaxFreq", + "Duration": 1000, + "Value": "9999999" + }, + { + "PowerHint": "FP_BOOST", + "Node": "CPUBigClusterMinFreq", + "Duration": 1000, + "Value": "9999999" + }, + { + "PowerHint": "FP_BOOST", + "Node": "CPU_LITTLE_TSKIN_BYPASS", + "Duration": 1000, + "Value": "1" + }, + { + "PowerHint": "FP_BOOST", + "Node": "CPU_MID_TSKIN_BYPASS", + "Duration": 1000, + "Value": "1" + }, + { + "PowerHint": "FP_BOOST", + "Node": "CPU_BIG_TSKIN_BYPASS", + "Duration": 1000, + "Value": "1" + }, + { + "PowerHint": "FP_BOOST", + "Node": "TRUSTY_VIRTIO_HIGH", + "Duration": 1000, + "Value": "1" + }, + { + "PowerHint": "FP_BOOST", + "Node": "TRUSTY_HIGH", + "Duration": 1000, + "Value": "1" + }, { "PowerHint": "ML_ACC", "Node": "MLUclampBoost", From e3b75f29cdf820cd1d21c17689c8df7d531c6b51 Mon Sep 17 00:00:00 2001 From: Jason Chiu Date: Wed, 31 Aug 2022 07:28:15 +0000 Subject: [PATCH 022/124] Revert "wifi: Move driver initialization to an eariler time" This reverts commit a011c11f37a2bff3b541cabdbc32571b701c2ac9. Reason for revert: it introduces b/243876449 Bug: 243876449 Change-Id: Ifc798f4bc237dd51921b22eb59b706f38d9edcea --- conf/init.lynx.rc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc index a8d0818..6892718 100644 --- a/conf/init.lynx.rc +++ b/conf/init.lynx.rc @@ -52,7 +52,7 @@ on post-fs-data chmod 0660 /sys/class/st33spi/st33spi/st33spi_state # Wifi -on property:vendor.all.modules.ready=1 +on property:sys.boot_completed=1 write /sys/bus/platform/drivers/cnss2/qcom,cnss-qca6490/fs_ready 1 # Create directories for wifihal services mkdir /dev/socket/wifihal 0770 wifi wifi From 7ea4e30af0ec1b8caad5c3e356a0acc31b8836be Mon Sep 17 00:00:00 2001 From: Wayne Lin Date: Wed, 31 Aug 2022 10:14:26 +0800 Subject: [PATCH 023/124] Move lhd.conf, scd.conf to device folder Move lhd.conf, scd.conf to device folder and maintain them separately by project requirement Bug: 244258007 Test: confirm the configurations are correct Change-Id: Ic7693f87df73e01d8dcfbda1ff224eb47e7df87a --- device-lynx.mk | 8 +++-- gps.xml.l10 => location/gps.xml.l10 | 0 gps_user.xml.l10 => location/gps_user.xml.l10 | 0 location/lhd.conf.l10 | 33 +++++++++++++++++++ location/lhd_user.conf.l10 | 31 +++++++++++++++++ location/scd.conf.l10 | 6 ++++ location/scd_user.conf.l10 | 5 +++ 7 files changed, 81 insertions(+), 2 deletions(-) rename gps.xml.l10 => location/gps.xml.l10 (100%) rename gps_user.xml.l10 => location/gps_user.xml.l10 (100%) create mode 100644 location/lhd.conf.l10 create mode 100644 location/lhd_user.conf.l10 create mode 100644 location/scd.conf.l10 create mode 100644 location/scd_user.conf.l10 diff --git a/device-lynx.mk b/device-lynx.mk index a4f2d00..3141236 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -149,10 +149,14 @@ PRODUCT_SOONG_NAMESPACES += vendor/google_devices/lynx/prebuilts # GPS xml ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT))) PRODUCT_COPY_FILES += \ - device/google/lynx/gps.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml + device/google/lynx/location/gps.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml \ + device/google/lynx/location/lhd.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \ + device/google/lynx/location/scd.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf else PRODUCT_COPY_FILES += \ - device/google/lynx/gps_user.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml + device/google/lynx/location/gps_user.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml \ + device/google/lynx/location/lhd_user.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \ + device/google/lynx/location/scd_user.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf endif # DCK properties based on target diff --git a/gps.xml.l10 b/location/gps.xml.l10 similarity index 100% rename from gps.xml.l10 rename to location/gps.xml.l10 diff --git a/gps_user.xml.l10 b/location/gps_user.xml.l10 similarity index 100% rename from gps_user.xml.l10 rename to location/gps_user.xml.l10 diff --git a/location/lhd.conf.l10 b/location/lhd.conf.l10 new file mode 100644 index 0000000..efde25b --- /dev/null +++ b/location/lhd.conf.l10 @@ -0,0 +1,33 @@ +LheName=bbd + +LheRsmResetTimeoutMS=10000 +GpioNStdbyPath=/sys/devices/platform/10940000.spi/spi_master/spi5/spi5.0/nstandby + +LhePatch=/vendor/firmware/SensorHub.patch +Lhe477xDebugFlags=RPC:FACILITY=65535-dKP+CUST+LHE:STDOUT_PUTS:STDOUT_LOG +LheConsole=/data/vendor/gps/LheConsole + +LogEnabled=true +Log=JAVA +LogDirectory=/sdcard/gps/broadcom/storage + +LheBbdPacket=/dev/ttyBCM + +LheBbdControl=/dev/bbd_control + +# LheBbdSensor=/dev/bbd_sensor + +LheFailSafe=/data/vendor/gps/logs/esw-crash-dump.txt +LogLevel=*:I + +NvStorageDir=/data/vendor/gps/ + +# Enable BBD debugging at these stages: +# LheDriverDebugFlags=PATCH_BBD:LHE_BBD:FSC_BBD + +LheAutoBaudDelayMS=10 +TrafficLogEnabled=false +SecondaryConfigPath=/data/vendor/gps/overlay/lhd_overlay.conf + +SkipSensorWakeLock=true +LoggerWakeLockEnable=false diff --git a/location/lhd_user.conf.l10 b/location/lhd_user.conf.l10 new file mode 100644 index 0000000..0216ace --- /dev/null +++ b/location/lhd_user.conf.l10 @@ -0,0 +1,31 @@ +LheName=bbd + +LheRsmResetTimeoutMS=10000 +GpioNStdbyPath=/sys/devices/platform/10940000.spi/spi_master/spi5/spi5.0/nstandby + +LhePatch=/vendor/firmware/SensorHub.patch +Lhe477xDebugFlags=RPC:FACILITY=65535-dKP+CUST+LHE:STDOUT_PUTS:STDOUT_LOG +# LheConsole=/data/vendor/gps/LheConsole + +LogEnabled=false +Log=JAVA +LogDirectory=/sdcard/gps/broadcom/storage + +LheBbdPacket=/dev/ttyBCM + +LheBbdControl=/dev/bbd_control + +# LheBbdSensor=/dev/bbd_sensor + +# LheFailSafe=/data/vendor/gps/esw-crash-dump.txt + +NvStorageDir=/data/vendor/gps/ + +# Enable BBD debugging at these stages: +# LheDriverDebugFlags=PATCH_BBD:LHE_BBD:FSC_BBD + +LheAutoBaudDelayMS=10 +TrafficLogEnabled=false + +SkipSensorWakeLock=true +LoggerWakeLockEnable=false diff --git a/location/scd.conf.l10 b/location/scd.conf.l10 new file mode 100644 index 0000000..43f9cd2 --- /dev/null +++ b/location/scd.conf.l10 @@ -0,0 +1,6 @@ +LogEnabled=true +Log=JAVA +LogDirectory=/sdcard/gps/broadcom/storage +NvStorageDir=/data/vendor/gps/ +TcpConnectionTimeout=20 +SecondaryConfigPath=/data/vendor/gps/overlay/scd_overlay.conf diff --git a/location/scd_user.conf.l10 b/location/scd_user.conf.l10 new file mode 100644 index 0000000..e75f209 --- /dev/null +++ b/location/scd_user.conf.l10 @@ -0,0 +1,5 @@ +LogEnabled=false +Log=JAVA +LogDirectory=/sdcard/gps/broadcom/storage +NvStorageDir=/data/vendor/gps/ +TcpConnectionTimeout=20 From 37b6bb8982164208007fddce1c73062e39845bcf Mon Sep 17 00:00:00 2001 From: wenchangliu Date: Mon, 22 Aug 2022 11:34:50 +0800 Subject: [PATCH 024/124] L10: Enable media performance class 13 Bug: 242961388 Test: atest CtsMediaPerformanceClassTestCases Test: atest android.hardware.camera2.cts.ExtendedCameraCharacteristicsTest#testCameraPerfClassCharacteristics Test: atest CtsFileSystemTestCases Change-Id: I6aa073ec0d6efc3fd1e7d3b47c2c401e9f48dac5 --- device-lynx.mk | 3 +++ 1 file changed, 3 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 3141236..29bdb51 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -48,6 +48,9 @@ PRODUCT_COPY_FILES += \ PRODUCT_COPY_FILES += \ device/google/lynx/media_profiles_lynx.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml +# Media Performance Class 13 +PRODUCT_PROPERTY_OVERRIDES += ro.odm.build.media_performance_class=33 + # Display Config PRODUCT_COPY_FILES += \ device/google/lynx/lynx/display_colordata_dev_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_dev_cal0.pb From df7373e1949d06dcce74e1787b3113aecc92d0d2 Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Thu, 1 Sep 2022 12:00:05 +0000 Subject: [PATCH 025/124] audio: Phase in fortemedia tuning tables Change List : Fortemedia: Handset HAC: Update EVT tuning for HAC mode T-coil signal testing FR failure Handheld mode: Sync Reserve 2 SWB setting to custom 1 (VoIP-EC-off) / custom 2 (VoIP-NR-off) / reserve 1 (VoIP-NREC-off) and disable NREC for related setting. Files from the latest attachment on b/244539071 Bug: 244539071 Test: verified by hardware engineers Change-id: I0b131b7e2afe69ff24bb30dfbf18812d4329d32e --- audio/lynx/tuning/fortemedia/HANDSET.dat | Bin 255674 -> 255674 bytes audio/lynx/tuning/fortemedia/HANDSET.mods | 944 +-- audio/lynx/tuning/fortemedia/HANDSFREE.dat | Bin 117198 -> 117198 bytes audio/lynx/tuning/fortemedia/HANDSFREE.mods | 7074 +++++++++---------- 4 files changed, 4009 insertions(+), 4009 deletions(-) diff --git a/audio/lynx/tuning/fortemedia/HANDSET.dat b/audio/lynx/tuning/fortemedia/HANDSET.dat index 88798022cf49e7896183338a3cd46d3c2d4c9381..ba677d97ee9bfbbb5a83b4eb6dc426a63d141718 100644 GIT binary patch delta 2246 zcmdmWmVeh-{)R1#S*B_s9vTfHA({;l5n2r)5!wwQK{^dF5xNaAQF;v-8TvqM&=8X{ zeS#_DH%7zh{1%MaqgqG^vF+RK8U5wO0-&KB5~9@*;HTXX5u*bP@#!-0j6rNHtWFKA zY}@}NFiJ6wG=H73O9Hl(D0QseXk9gP1N z6{hd+WXvAXO1HnC#2EZuPn1Ee!NWtn0Tybbd6*_e*!Jl?Oz!g2|HUzKjI{hobg6{M m$WGgsEacUc(30k8hQ=EL+t1%;ihe($%QO;7bx`r=%nJaGC-d6? delta 943 zcmdmWmVeh-{)R1#S*FvCj2TrKJ*H1EW&Ado&y8ccRsv(h^f*&SoF`lqk}xi zT^iH%;u#&Lo5ccIa*2#T21snmWWSjl+mkXuu43E3IA^+DCu0LR6kly&jA2xo{(n8= zVlo7`1GPV4B&@&gjl}l8o6I`A)8mvGMJAup6xklNfbqq{?OMi+Dva>xWKLkN*{%tS zXW9!1Y+u&HWFbEt=mG|g%1bFNM0E-|oNdN!< diff --git a/audio/lynx/tuning/fortemedia/HANDSET.mods b/audio/lynx/tuning/fortemedia/HANDSET.mods index a249fd5..4160342 100644 --- a/audio/lynx/tuning/fortemedia/HANDSET.mods +++ b/audio/lynx/tuning/fortemedia/HANDSET.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-08-19 11:20:36 +#SAVE_TIME 2022-09-01 17:35:18 #CASE_NAME HANDSET-HANDSET-RESERVE1-FB #PARAM_MODE FULL @@ -19844,16 +19844,16 @@ 124 0x0360 //RX_TDDRC_DRC_GAIN 38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x485C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -19915,7 +19915,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -19943,16 +19943,16 @@ 124 0x0360 //RX_TDDRC_DRC_GAIN 38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x485C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -20014,7 +20014,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20042,16 +20042,16 @@ 124 0x0360 //RX_TDDRC_DRC_GAIN 38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x485C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -20113,7 +20113,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20141,16 +20141,16 @@ 124 0x0360 //RX_TDDRC_DRC_GAIN 38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x485C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -20212,7 +20212,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20240,16 +20240,16 @@ 124 0x0360 //RX_TDDRC_DRC_GAIN 38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x485C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -20311,7 +20311,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20339,16 +20339,16 @@ 124 0x0360 //RX_TDDRC_DRC_GAIN 38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x485C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -20410,7 +20410,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20438,16 +20438,16 @@ 124 0x0360 //RX_TDDRC_DRC_GAIN 38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x485C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -20509,7 +20509,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x000C //RX_RECVFUNC_MODE_0 @@ -22514,12 +22514,12 @@ 124 0x0400 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -22540,8 +22540,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -22613,12 +22613,12 @@ 124 0x0400 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -22639,8 +22639,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -22712,12 +22712,12 @@ 124 0x0400 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -22738,8 +22738,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -22811,12 +22811,12 @@ 124 0x0400 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -22837,8 +22837,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -22910,12 +22910,12 @@ 124 0x0400 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -22936,8 +22936,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -23009,12 +23009,12 @@ 124 0x0400 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -23035,8 +23035,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -23108,12 +23108,12 @@ 124 0x0400 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -23134,8 +23134,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -25184,14 +25184,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -25255,7 +25255,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -25283,14 +25283,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -25354,7 +25354,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -25382,14 +25382,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -25453,7 +25453,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -25481,14 +25481,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -25552,7 +25552,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -25578,16 +25578,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -25619,7 +25619,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -25651,7 +25651,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -25679,14 +25679,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -25750,7 +25750,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -25778,14 +25778,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -25849,7 +25849,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x000C //RX_RECVFUNC_MODE_0 @@ -41202,18 +41202,18 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -41237,7 +41237,7 @@ 70 0x0303 //RX_FDEQ_BIN_7 71 0x0A0A //RX_FDEQ_BIN_8 72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 +73 0x2500 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 @@ -41275,7 +41275,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -41301,18 +41301,18 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -41336,7 +41336,7 @@ 70 0x0303 //RX_FDEQ_BIN_7 71 0x0A0A //RX_FDEQ_BIN_8 72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 +73 0x2500 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 @@ -41374,7 +41374,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -41400,18 +41400,18 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -41435,7 +41435,7 @@ 70 0x0303 //RX_FDEQ_BIN_7 71 0x0A0A //RX_FDEQ_BIN_8 72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 +73 0x2500 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 @@ -41473,7 +41473,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -41499,18 +41499,18 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -41534,7 +41534,7 @@ 70 0x0303 //RX_FDEQ_BIN_7 71 0x0A0A //RX_FDEQ_BIN_8 72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 +73 0x2500 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 @@ -41572,7 +41572,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -41598,18 +41598,18 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -41633,7 +41633,7 @@ 70 0x0303 //RX_FDEQ_BIN_7 71 0x0A0A //RX_FDEQ_BIN_8 72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 +73 0x2500 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 @@ -41671,7 +41671,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -41697,18 +41697,18 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -41732,7 +41732,7 @@ 70 0x0303 //RX_FDEQ_BIN_7 71 0x0A0A //RX_FDEQ_BIN_8 72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 +73 0x2500 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 @@ -41770,7 +41770,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -41796,18 +41796,18 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0015 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5858 //RX_FDEQ_GAIN_3 +43 0x5854 //RX_FDEQ_GAIN_4 44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +45 0x585C //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 +47 0x6868 //RX_FDEQ_GAIN_8 +48 0x6868 //RX_FDEQ_GAIN_9 +49 0x645C //RX_FDEQ_GAIN_10 50 0x5C48 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 @@ -41831,7 +41831,7 @@ 70 0x0303 //RX_FDEQ_BIN_7 71 0x0A0A //RX_FDEQ_BIN_8 72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 +73 0x2500 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 @@ -41869,7 +41869,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0131 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x000C //RX_RECVFUNC_MODE_0 @@ -43872,14 +43872,14 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -43900,8 +43900,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -43910,9 +43910,9 @@ 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +76 0x1102 //RX_FDEQ_BIN_13 +77 0x0202 //RX_FDEQ_BIN_14 +78 0x020A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -43971,14 +43971,14 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -43999,8 +43999,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -44009,9 +44009,9 @@ 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +76 0x1102 //RX_FDEQ_BIN_13 +77 0x0202 //RX_FDEQ_BIN_14 +78 0x020A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -44070,14 +44070,14 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -44098,8 +44098,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -44108,9 +44108,9 @@ 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +76 0x1102 //RX_FDEQ_BIN_13 +77 0x0202 //RX_FDEQ_BIN_14 +78 0x020A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -44169,14 +44169,14 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -44197,8 +44197,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -44207,9 +44207,9 @@ 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +76 0x1102 //RX_FDEQ_BIN_13 +77 0x0202 //RX_FDEQ_BIN_14 +78 0x020A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -44268,14 +44268,14 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -44296,8 +44296,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -44306,9 +44306,9 @@ 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +76 0x1102 //RX_FDEQ_BIN_13 +77 0x0202 //RX_FDEQ_BIN_14 +78 0x020A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -44367,14 +44367,14 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -44395,8 +44395,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -44405,9 +44405,9 @@ 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +76 0x1102 //RX_FDEQ_BIN_13 +77 0x0202 //RX_FDEQ_BIN_14 +78 0x020A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -44466,14 +44466,14 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 +40 0x4850 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 +44 0x5C58 //RX_FDEQ_GAIN_5 +45 0x5858 //RX_FDEQ_GAIN_6 46 0x5A5C //RX_FDEQ_GAIN_7 47 0x5C5C //RX_FDEQ_GAIN_8 48 0x5C5C //RX_FDEQ_GAIN_9 @@ -44494,8 +44494,8 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 +66 0x0504 //RX_FDEQ_BIN_3 +67 0x0605 //RX_FDEQ_BIN_4 68 0x0505 //RX_FDEQ_BIN_5 69 0x0505 //RX_FDEQ_BIN_6 70 0x0505 //RX_FDEQ_BIN_7 @@ -44504,9 +44504,9 @@ 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +76 0x1102 //RX_FDEQ_BIN_13 +77 0x0202 //RX_FDEQ_BIN_14 +78 0x020A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -46542,16 +46542,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -46583,7 +46583,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -46615,7 +46615,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -46641,16 +46641,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -46682,7 +46682,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -46714,7 +46714,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -46740,16 +46740,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -46781,7 +46781,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -46813,7 +46813,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -46839,16 +46839,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -46880,7 +46880,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -46912,7 +46912,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -46938,16 +46938,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -46979,7 +46979,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -47011,7 +47011,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -47037,16 +47037,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -47078,7 +47078,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -47110,7 +47110,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -47136,16 +47136,16 @@ 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM +38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -47177,7 +47177,7 @@ 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E1E //RX_FDEQ_BIN_14 78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 +79 0x0A14 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 @@ -47209,7 +47209,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x000C //RX_RECVFUNC_MODE_0 @@ -62564,14 +62564,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -62635,7 +62635,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -62663,14 +62663,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -62734,7 +62734,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -62762,14 +62762,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -62833,7 +62833,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -62861,14 +62861,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -62932,7 +62932,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -62960,14 +62960,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -63031,7 +63031,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -63059,14 +63059,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -63130,7 +63130,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -63158,14 +63158,14 @@ 124 0x01E0 //RX_TDDRC_DRC_GAIN 38 0x0022 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 +40 0x4854 //RX_FDEQ_GAIN_1 +41 0x5454 //RX_FDEQ_GAIN_2 +42 0x5454 //RX_FDEQ_GAIN_3 +43 0x5450 //RX_FDEQ_GAIN_4 +44 0x525C //RX_FDEQ_GAIN_5 +45 0x5C60 //RX_FDEQ_GAIN_6 +46 0x6464 //RX_FDEQ_GAIN_7 +47 0x6868 //RX_FDEQ_GAIN_8 48 0x6C70 //RX_FDEQ_GAIN_9 49 0x7474 //RX_FDEQ_GAIN_10 50 0x7474 //RX_FDEQ_GAIN_11 @@ -63229,7 +63229,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0120 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x000C //RX_RECVFUNC_MODE_0 diff --git a/audio/lynx/tuning/fortemedia/HANDSFREE.dat b/audio/lynx/tuning/fortemedia/HANDSFREE.dat index 1eb2f37438023d2e3e355b0d4a138474f688568f..187e010984b138aa1ce2f2ba4b39f4f5e0fbb0e4 100644 GIT binary patch delta 73 zcmX>%nf=^k_J%EtP0FmF8JHMKH^2T_qd9rMCiiqcUq%72SS(m<`us9RX)r$&qDKD$ R_w-d|i~`%k7BE(50stv^9C-i$ delta 5314 zcmeI0&r4KM6vxlGZ`2tvn_`R_XKZY&9Dhz~k~-<6DWj%ojbn_{_!fnd38lkSYI<_h z&K4KCn-)U!LxYeEUP1nd)LdzQKm_#%=(>pNY7ilXLM}Ak;=6c<^A6v8xV+CfZ-K`x z@Hl#ogU%h@z#!700D=J&amR^ecu!k&qJf#BcLB@-z`?y=^Y?il0JtB*_kl+M-p4>V z0`o8m?_-2|126H(5u+$?lkoPSm8CnybOTN%dBBQk zkc=L%p#|)?3sTS{a(i)^0TYfsbeix2jul=+`8ak4M-jCt7d~MbwLT9E)gEW{fl^j~ zs*F|Eds$8O308NuoHd6kSX$iR2`H9~Xk?ci!X1)EK^0?p7~tU|vv?N5y`?_iVJay}r}82fRaRwCO?4&( z&u39fOExtIbLezqF10tgNsSz#dVe1IeEC%4E1;&vqtx5X)!jMq2Bn+~h6*w&Tr~$o zI3CaKVQ_^EaFxK?CDlzY`XdAf`S9zMMCiLo;OLhcAOb$EMTI}P_UVYz z5hw59I;hqW_b-DE*Acf#Bjai(b;NDP@ckbmP7FmcYZY&P9dG&uxA9F>$D59~E%7H| bWl+%ZrsM68n;}nmXA`4Qv}nO$jJSRP%zu0) diff --git a/audio/lynx/tuning/fortemedia/HANDSFREE.mods b/audio/lynx/tuning/fortemedia/HANDSFREE.mods index ddf9f28..4ba5d1e 100644 --- a/audio/lynx/tuning/fortemedia/HANDSFREE.mods +++ b/audio/lynx/tuning/fortemedia/HANDSFREE.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSFREE #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-08-19 11:53:47 +#SAVE_TIME 2022-09-01 17:43:45 #CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB #PARAM_MODE FULL @@ -18700,10 +18700,10 @@ #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x6B74 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +2 0x00F3 //TX_PATCH_REG +3 0x6F75 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -18719,7 +18719,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009C //TX_DIST2REF1 +21 0x0096 //TX_DIST2REF1 22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -18848,9 +18848,9 @@ 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 +152 0x0600 //TX_MIN_EQ_RE_EST_0 153 0x0600 //TX_MIN_EQ_RE_EST_1 154 0x3000 //TX_MIN_EQ_RE_EST_2 155 0x3000 //TX_MIN_EQ_RE_EST_3 @@ -18863,13 +18863,13 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0300 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -18896,7 +18896,7 @@ 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 +198 0x6D60 //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 @@ -18911,8 +18911,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -18921,18 +18921,18 @@ 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x5014 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH +225 0x0708 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -18980,12 +18980,12 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 +282 0x001A //TX_NS_LVL_CTRL_1 283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x003C //TX_NS_LVL_CTRL_3 +284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x003C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 @@ -19045,7 +19045,7 @@ 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER +347 0x01F4 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF @@ -19054,9 +19054,9 @@ 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 -357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -19099,7 +19099,7 @@ 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST @@ -19270,17 +19270,17 @@ 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4B48 //TX_FDEQ_GAIN_4 -572 0x484B //TX_FDEQ_GAIN_5 -573 0x4B5C //TX_FDEQ_GAIN_6 -574 0x564E //TX_FDEQ_GAIN_7 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C57 //TX_FDEQ_GAIN_12 -580 0x5667 //TX_FDEQ_GAIN_13 -581 0x6778 //TX_FDEQ_GAIN_14 -582 0x8087 //TX_FDEQ_GAIN_15 +579 0x5C5C //TX_FDEQ_GAIN_12 +580 0x5C6E //TX_FDEQ_GAIN_13 +581 0x687E //TX_FDEQ_GAIN_14 +582 0x8890 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -19468,12 +19468,12 @@ 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 +770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 +775 0x000F //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP @@ -19564,7 +19564,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN +866 0x13F4 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -19595,24 +19595,24 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x01C2 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 +911 0x7918 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +913 0x3A98 //TX_DTD_THR1_MICMUTE_2 +914 0x32C8 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 @@ -19637,13 +19637,13 @@ 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 +943 0x0100 //TX_AMS_RESRV_01 +944 0xE4A8 //TX_AMS_RESRV_02 +945 0x1770 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -19661,14 +19661,14 @@ 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x206C //RX_RECVFUNC_MODE_0 +0 0x007C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA @@ -19690,32 +19690,32 @@ 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -19724,22 +19724,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -19773,24 +19773,24 @@ 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x03FC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0B50 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -19820,45 +19820,45 @@ 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -19867,22 +19867,517 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0073 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00E5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017B //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01EE //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -19917,542 +20412,47 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0029 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0039 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005F //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x035A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -20461,22 +20461,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -20512,14 +20512,14 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 +157 0x007C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA @@ -20541,32 +20541,32 @@ 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -20575,22 +20575,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -20624,24 +20624,24 @@ 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03FC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0014 //RX_SPK_VOL +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0B50 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -20671,45 +20671,45 @@ 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -20718,319 +20718,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001D //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0029 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -21065,47 +20768,47 @@ 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0039 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 +#VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -21114,22 +20817,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -21162,49 +20865,346 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005F //RX_SPK_VOL +286 0x0054 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0085 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00C7 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0134 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 +269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x01EE //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8464 //RX_FDEQ_GAIN_0 +197 0x5150 //RX_FDEQ_GAIN_1 +198 0x555C //RX_FDEQ_GAIN_2 +199 0x6E75 //RX_FDEQ_GAIN_3 +200 0x8077 //RX_FDEQ_GAIN_4 +201 0x756D //RX_FDEQ_GAIN_5 +202 0x6667 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -21213,22 +21213,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -21261,49 +21261,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x008E //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03AD //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F4F //RX_FDEQ_GAIN_1 +198 0x555A //RX_FDEQ_GAIN_2 +199 0x6069 //RX_FDEQ_GAIN_3 +200 0x7D86 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5860 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A52 //RX_FDEQ_GAIN_10 +207 0x535A //RX_FDEQ_GAIN_11 +208 0x6654 //RX_FDEQ_GAIN_12 +209 0x6068 //RX_FDEQ_GAIN_13 +210 0x6F69 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -21312,22 +21312,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -21370,9 +21370,9 @@ #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x6B5C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00F3 //TX_PATCH_REG +3 0x6F5D //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -21518,9 +21518,9 @@ 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 +152 0x0600 //TX_MIN_EQ_RE_EST_0 153 0x0600 //TX_MIN_EQ_RE_EST_1 154 0x3000 //TX_MIN_EQ_RE_EST_2 155 0x3000 //TX_MIN_EQ_RE_EST_3 @@ -21533,13 +21533,13 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0300 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -21566,7 +21566,7 @@ 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 +198 0x6D60 //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 @@ -21581,8 +21581,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -21591,18 +21591,18 @@ 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x5014 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH +225 0x0708 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -21650,12 +21650,12 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 +282 0x001A //TX_NS_LVL_CTRL_1 283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x003C //TX_NS_LVL_CTRL_3 +284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x003C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 @@ -21715,7 +21715,7 @@ 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER +347 0x01F4 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF @@ -21724,9 +21724,9 @@ 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 -357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -21769,7 +21769,7 @@ 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST @@ -21940,17 +21940,17 @@ 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4B48 //TX_FDEQ_GAIN_4 -572 0x484B //TX_FDEQ_GAIN_5 -573 0x4B5C //TX_FDEQ_GAIN_6 -574 0x564E //TX_FDEQ_GAIN_7 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C57 //TX_FDEQ_GAIN_12 -580 0x5667 //TX_FDEQ_GAIN_13 -581 0x6778 //TX_FDEQ_GAIN_14 -582 0x8087 //TX_FDEQ_GAIN_15 +579 0x5C5C //TX_FDEQ_GAIN_12 +580 0x5C6E //TX_FDEQ_GAIN_13 +581 0x687E //TX_FDEQ_GAIN_14 +582 0x8890 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -22138,12 +22138,12 @@ 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 +770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 +775 0x000F //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP @@ -22234,7 +22234,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN +866 0x13F4 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -22265,24 +22265,24 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x01C2 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 +911 0x7918 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +913 0x3A98 //TX_DTD_THR1_MICMUTE_2 +914 0x32C8 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 @@ -22307,13 +22307,13 @@ 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 +943 0x0100 //TX_AMS_RESRV_01 +944 0xE4A8 //TX_AMS_RESRV_02 +945 0x1770 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -22331,14 +22331,14 @@ 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x206C //RX_RECVFUNC_MODE_0 +0 0x007C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA @@ -22360,32 +22360,32 @@ 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -22394,22 +22394,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -22443,24 +22443,24 @@ 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x03FC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0B50 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -22490,45 +22490,45 @@ 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -22537,22 +22537,517 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0073 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00E5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017B //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01EE //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -22587,542 +23082,47 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0029 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0039 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005F //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x035A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23131,22 +23131,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -23182,14 +23182,14 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 +157 0x007C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA @@ -23211,32 +23211,32 @@ 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -23245,22 +23245,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23294,24 +23294,24 @@ 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03FC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0014 //RX_SPK_VOL +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0B50 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -23341,45 +23341,45 @@ 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -23388,319 +23388,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001D //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0029 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23735,47 +23438,47 @@ 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0039 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 +#VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -23784,22 +23487,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23832,49 +23535,346 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005F //RX_SPK_VOL +286 0x0054 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0085 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00C7 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0134 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 +269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x01EE //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8464 //RX_FDEQ_GAIN_0 +197 0x5150 //RX_FDEQ_GAIN_1 +198 0x555C //RX_FDEQ_GAIN_2 +199 0x6E75 //RX_FDEQ_GAIN_3 +200 0x8077 //RX_FDEQ_GAIN_4 +201 0x756D //RX_FDEQ_GAIN_5 +202 0x6667 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -23883,22 +23883,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -23931,49 +23931,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x008E //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03AD //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F4F //RX_FDEQ_GAIN_1 +198 0x555A //RX_FDEQ_GAIN_2 +199 0x6069 //RX_FDEQ_GAIN_3 +200 0x7D86 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5860 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A52 //RX_FDEQ_GAIN_10 +207 0x535A //RX_FDEQ_GAIN_11 +208 0x6654 //RX_FDEQ_GAIN_12 +209 0x6068 //RX_FDEQ_GAIN_13 +210 0x6F69 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -23982,22 +23982,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -24040,9 +24040,9 @@ #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x6B54 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 +2 0x00F3 //TX_PATCH_REG +3 0x6F55 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC @@ -24188,9 +24188,9 @@ 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 +152 0x0600 //TX_MIN_EQ_RE_EST_0 153 0x0600 //TX_MIN_EQ_RE_EST_1 154 0x3000 //TX_MIN_EQ_RE_EST_2 155 0x3000 //TX_MIN_EQ_RE_EST_3 @@ -24203,13 +24203,13 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N +169 0x0260 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0300 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -24236,7 +24236,7 @@ 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 +198 0x6D60 //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 @@ -24251,8 +24251,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -24261,18 +24261,18 @@ 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x5014 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH +225 0x0708 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -24320,12 +24320,12 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 +282 0x001A //TX_NS_LVL_CTRL_1 283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x003C //TX_NS_LVL_CTRL_3 +284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x003C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 @@ -24385,7 +24385,7 @@ 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER +347 0x01F4 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF @@ -24394,9 +24394,9 @@ 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 -357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG @@ -24439,7 +24439,7 @@ 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST @@ -24610,17 +24610,17 @@ 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4B48 //TX_FDEQ_GAIN_4 -572 0x484B //TX_FDEQ_GAIN_5 -573 0x4B5C //TX_FDEQ_GAIN_6 -574 0x564E //TX_FDEQ_GAIN_7 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C57 //TX_FDEQ_GAIN_12 -580 0x5667 //TX_FDEQ_GAIN_13 -581 0x6778 //TX_FDEQ_GAIN_14 -582 0x8087 //TX_FDEQ_GAIN_15 +579 0x5C5C //TX_FDEQ_GAIN_12 +580 0x5C6E //TX_FDEQ_GAIN_13 +581 0x687E //TX_FDEQ_GAIN_14 +582 0x8890 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -24808,12 +24808,12 @@ 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 +770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 +775 0x000F //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP @@ -24904,7 +24904,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN +866 0x13F4 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -24935,24 +24935,24 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x01C2 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 +911 0x7918 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +913 0x3A98 //TX_DTD_THR1_MICMUTE_2 +914 0x32C8 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 @@ -24977,13 +24977,13 @@ 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 +943 0x0100 //TX_AMS_RESRV_01 +944 0xE4A8 //TX_AMS_RESRV_02 +945 0x1770 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -25001,14 +25001,14 @@ 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x206C //RX_RECVFUNC_MODE_0 +0 0x007C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA @@ -25030,32 +25030,32 @@ 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -25064,22 +25064,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -25113,24 +25113,24 @@ 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x03FC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0B50 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -25160,45 +25160,45 @@ 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -25207,22 +25207,517 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0073 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00E5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017B //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01EE //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -25257,542 +25752,47 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0029 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0039 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005F //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x032A //RX_TDDRC_DRC_GAIN +124 0x035A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x3B3B //RX_FDEQ_GAIN_1 -41 0x3942 //RX_FDEQ_GAIN_2 -42 0x4645 //RX_FDEQ_GAIN_3 -43 0x494A //RX_FDEQ_GAIN_4 -44 0x5D5A //RX_FDEQ_GAIN_5 -45 0x5B5B //RX_FDEQ_GAIN_6 -46 0x5A51 //RX_FDEQ_GAIN_7 -47 0x514F //RX_FDEQ_GAIN_8 -48 0x5568 //RX_FDEQ_GAIN_9 -49 0x7460 //RX_FDEQ_GAIN_10 -50 0x544E //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x484A //RX_FDEQ_GAIN_13 -53 0x5155 //RX_FDEQ_GAIN_14 -54 0x577B //RX_FDEQ_GAIN_15 +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -25801,22 +25801,22 @@ 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0308 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -25852,14 +25852,14 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 +157 0x007C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA @@ -25881,32 +25881,32 @@ 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -25915,22 +25915,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -25964,24 +25964,24 @@ 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03FC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0014 //RX_SPK_VOL +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0B50 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -26011,45 +26011,45 @@ 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -26058,319 +26058,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001D //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0035 //RX_FDDRC_BAND_MARGIN_1 -248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -249 0x0120 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x2000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x2000 //RX_FDDRC_THRD_3_2 -258 0x5000 //RX_FDDRC_THRD_3_3 -259 0x4000 //RX_FDDRC_SLANT_0_0 -260 0x4000 //RX_FDDRC_SLANT_0_1 -261 0x4000 //RX_FDDRC_SLANT_0_2 -262 0x4000 //RX_FDDRC_SLANT_0_3 -263 0x7FFF //RX_FDDRC_SLANT_1_0 -264 0x7FFF //RX_FDDRC_SLANT_1_1 -265 0x7FFF //RX_FDDRC_SLANT_1_2 -266 0x7FFF //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0029 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 -165 0x6000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7214 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 -275 0x6000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -26405,47 +26108,47 @@ 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0039 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 +#VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -26454,22 +26157,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -26502,49 +26205,346 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005F //RX_SPK_VOL +286 0x0054 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0085 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00C7 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0134 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0002 //RX_TDDRC_THRD_0 +269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x01EE //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8464 //RX_FDEQ_GAIN_0 +197 0x5150 //RX_FDEQ_GAIN_1 +198 0x555C //RX_FDEQ_GAIN_2 +199 0x6E75 //RX_FDEQ_GAIN_3 +200 0x8077 //RX_FDEQ_GAIN_4 +201 0x756D //RX_FDEQ_GAIN_5 +202 0x6667 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -26553,22 +26553,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -26601,49 +26601,49 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x008E //RX_SPK_VOL +286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03AD //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x5454 //RX_FDEQ_GAIN_4 -201 0x7C54 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F4F //RX_FDEQ_GAIN_1 +198 0x555A //RX_FDEQ_GAIN_2 +199 0x6069 //RX_FDEQ_GAIN_3 +200 0x7D86 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5860 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A52 //RX_FDEQ_GAIN_10 +207 0x535A //RX_FDEQ_GAIN_11 +208 0x6654 //RX_FDEQ_GAIN_12 +209 0x6068 //RX_FDEQ_GAIN_13 +210 0x6F69 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -26652,22 +26652,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 From 28970d2643991ae2efa6e1fd7e0109ceee197d04 Mon Sep 17 00:00:00 2001 From: Rick Yiu Date: Thu, 18 Aug 2022 03:21:50 +0000 Subject: [PATCH 026/124] Remove RestrictedCpuset hint With systemui now changed its cpuset in early stage, we no longer need RestrictedCpuset hint as workaround. Bug: 242775562 Test: build pass Change-Id: I8075188e82295f45fb7df1a88769eef37e7aec81 --- powerhint.json | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/powerhint.json b/powerhint.json index d0d30d8..67621d9 100644 --- a/powerhint.json +++ b/powerhint.json @@ -206,15 +206,6 @@ ], "ResetOnInit": true }, - { - "Name": "RestrictedCpuset", - "Path": "/dev/cpuset/restricted/cpus", - "Values": [ - "0-3", - "0-7" - ], - "ResetOnInit": false - }, { "Name": "CDHighCpusetCpus", "Path": "/dev/cpuset/camera-daemon-high-group/cpus", @@ -1826,18 +1817,6 @@ "Node": "PMQoSCpuDmaLatency", "Duration": 2000, "Value": "44" - }, - { - "PowerHint": "DEVICE_IDLE", - "Node": "RestrictedCpuset", - "Duration": 0, - "Value": "0-3" - }, - { - "PowerHint": "DISPLAY_INACTIVE", - "Node": "RestrictedCpuset", - "Duration": 0, - "Value": "0-3" } ], "AdpfConfig": [ From 4c821c04fc25b026f5fc8e9301758bf87dbb4a3e Mon Sep 17 00:00:00 2001 From: Ken Tsou Date: Thu, 1 Sep 2022 10:07:03 +0800 Subject: [PATCH 027/124] battery: disable wireless for pts battery test Disable wireless charging during drain, usb charging, and charger stress test - vendor.disable.wlc 1 If device is placed onto dreamliner and shutdwon(drain out), it would boot up by DC_CHG and keep shutdown(0%)-boot up (by DC_CHG) continuously. To avoid this symptom, limit wireless current_max as 75000 after device boot up - persist.vendor.limit.wlc.current=1 How to verify: adb shell setprop vendor.disable.wlc 1 adb shell cat /sys/class/power_supply/wireless/online >>>> 0 adb shell setprop persist.vendor.limit.wlc.current 1 adb shell cat /sys/class/power_supply/dc/current_max >>>> 75000 Bug: 230436380 Test: set the property manually and query the result from file node. Change-Id: I5bcf9baeb2818b439520167b518b2e5c5224d7e2 Signed-off-by: Ken Tsou (synced from commit 27b511c30292214dbb07f3009cbca8dee941f7f2) --- device-lynx.mk | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 29bdb51..623871e 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -226,3 +226,9 @@ PRODUCT_COPY_FILES += \ # Enable adpf cpu hint session for SurfaceFlinger PRODUCT_DEFAULT_PROPERTY_OVERRIDES += \ debug.sf.enable_adpf_cpu_hint=true + +# userdebug specific +ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT))) + PRODUCT_COPY_FILES += \ + device/google/gs201/init.hardware.wlc.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/init.wlc.rc +endif From a4a301a5fdfaaf0089264a57f00c795d409a88da Mon Sep 17 00:00:00 2001 From: Siddharth Kapoor Date: Thu, 25 Aug 2022 16:27:17 -0700 Subject: [PATCH 028/124] Replace GPUMinFreq 151000 with 202000 Bug: 240479599 Change-Id: If7a5970b4f6d6049fc0aee4fc7caeb99ccbbdf21 --- powerhint.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/powerhint.json b/powerhint.json index 67621d9..5fb842b 100644 --- a/powerhint.json +++ b/powerhint.json @@ -109,7 +109,7 @@ "572000", "471000", "302000", - "151000" + "202000" ], "ResetOnInit": true }, From 7d3ceaef315ef2693832034ce9d1a4730509f89a Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Mon, 12 Sep 2022 09:45:06 +0000 Subject: [PATCH 029/124] audio: Phase in fortemedia tuning tables Change List : Fortemedia: Handset : Optimal performance for Generic/TMOUS Handset NB/WB/SWB (TMO tuning / AMS tuning) Sync TX setting to HAC / TMO-HAC / HAC Reserve 2 SWB Files from the latest attachment on b/246260083 Bug: 246260083 Test: verified by hardware engineers Change-id: I8ea1537737620b8b2de9921b804c16abc226c027 --- audio/lynx/tuning/fortemedia/HANDSET.dat | Bin 255674 -> 255674 bytes audio/lynx/tuning/fortemedia/HANDSET.mods | 17088 ++++++++++---------- 2 files changed, 8544 insertions(+), 8544 deletions(-) diff --git a/audio/lynx/tuning/fortemedia/HANDSET.dat b/audio/lynx/tuning/fortemedia/HANDSET.dat index ba677d97ee9bfbbb5a83b4eb6dc426a63d141718..731e80498f9eb4510b5869a3974528c1663e0c8f 100644 GIT binary patch delta 3986 zcmeHKZA@EL7(O2bv4fQ@jRS-Y=O`2|^aDgzOX*mxm4G8lG>DTCV-zHwjZ#V?FTLfe`t*L+zTbbuX$-u6MwwP zeVX&U?|sjC&(r6IFYCgWbs^M3r;U2?_OEshWkO207f}7nVkSAPg}=~GlTzrJ_TGDs z`tWy$yIIi6j$#<1+r|phICutgFo+YtSr#ASK->r(oD1O^UUFLD8yVVqGz8pW7yu>f zrlT)?0YJ+XnBp%2z+VCp;ipubE&e=Y*V1>|Q>c5i5w=lrG*27heRzuR#tW@-ImGyx zV^*b}e^tFmB!qw9=}bq3WY`C9ro-2$A5{piq~Zi*268j0iN_YpF0@_*5xFe?C5veg zp%HEyn&CzNx6eTY^g{FfI2^wKpMgLlB=_N`sP@_pSWQjW4sNan??Mg=5Ey$QNa%wE z&_MhVX*dH9#w)wD4-$H(-GD+GT77-{W^kkvNBAxb*uKrNMy?(c60`6DrG?K{wE#*& zZ0)(Pa5znq1D$JtqpV+UWCUmGEiuRMWP(?9%Ua0?@G>N+j z|46>;>l2JibMJMa;+n?!5Lw9A(!^q_- zVZpS?WkW8eO)jQQk9$gy-Q!?7RmQ@}Vi&Tx%aPT!8|64%$Zmg>g`34=EQE=ETr8gY zzDu)KEtULP*nl0fepSl)Rc$0~OuvSE@<=emG0n;+!NCIZQP4!DJ~5N=&n;wN!b+Oh zv^F&rk;dmAB5yYc{=L{uZFBwfy%T2II$IKpe4=em17nd$s^D;JGKm#G#wL-xSMW)? zXZFQdG^k|j6nG1cNjm9(72iq{bQx&FlG|x93j8G6AflF0w8HnS#~-b1kS5cV7m()r zP!Rnq#a^~luct|Dn;Oyox)SwhjzehKqqP_%=|21q>`ts~r!19QF|3nDa`0Oa)`=st z*^o}_WyLcuLFTje%aN?X{8jb;S)%) z(r6NkcYFpIbwA5^$oLJtUgB$+@v%c14 delta 2265 zcmds1T}YEr82;Y(ojKQj3JDfw0iP zN$28VL~0jFls5S04v95kH)^Sa%DT~@Ai9W2U3TI6=5+l~U46*t;&9G$&dbYlp65Jg zY{oP;V@hDV_!gujvQ#t(*W~dBmvn4;VGCjLM$wqQF?cfr|G2^{_v z^SVy*7fyRSDF&r7;f|4}8YN_j=zY28rAr51mNsnW?m-HHop~1b=p^M56TUdzIajzu z>mS+Y^9ee=b%p)NJyO_fDujNh!2a$$uCm|1x&@nx)JoV|#NM^@eMS6HQ)~f^zu`y$ zUlz6@GK0w7f+hoB3era2ok24_b-FfdWIw?9l6t=Lste#ERnni2}xKtBx zy;Is`5dBv`pqieE_0Q@PQ&~I@6=Nx8r$E(QUbP6571ecmEu9xFT Date: Wed, 7 Sep 2022 01:10:51 +0000 Subject: [PATCH 030/124] audio: enable USB clock boost on SWB voice-call Bug: 245421488 Test: build pass Signed-off-by: Carter Hsu Change-Id: I57f4b31c4afdbeede7556abc1a65adab66a7541a --- audio/lynx/config/audio_platform_configuration.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/audio/lynx/config/audio_platform_configuration.xml b/audio/lynx/config/audio_platform_configuration.xml index 0d09371..01d1efc 100644 --- a/audio/lynx/config/audio_platform_configuration.xml +++ b/audio/lynx/config/audio_platform_configuration.xml @@ -290,7 +290,7 @@ - + From 3d70f91d8a9f24f87b63f9938ce1fa34a97ffc78 Mon Sep 17 00:00:00 2001 From: leohsieh Date: Mon, 12 Sep 2022 22:00:58 +0800 Subject: [PATCH 031/124] L10: Enable LHBM control from UDFPS HAL and ALS feed forward Bug: 246302409 Test: build and test fingerprint on device. Change-Id: Ie21192605a7c91ddd9f139096c0f6cd03bf4fc0b --- device-lynx.mk | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 623871e..06c44f4 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -190,6 +190,11 @@ PRODUCT_PRODUCT_PROPERTIES += \ PRODUCT_PRODUCT_PROPERTIES += \ ro.support_one_handed_mode=true +# Fingerprint als feed forward +PRODUCT_VENDOR_PROPERTIES += \ + persist.vendor.udfps.als_feed_forward_supported=true \ + persist.vendor.udfps.lhbm_controlled_in_hal_supported=true + # Hide cutout overlays PRODUCT_PACKAGES += \ NoCutoutOverlay \ From 7ae9da19b0c578d7bc54ed5ef8a00cd24f207d6d Mon Sep 17 00:00:00 2001 From: amyhsu Date: Fri, 26 Aug 2022 06:43:48 +0000 Subject: [PATCH 032/124] display: update display_colordata_dev_cal0.pb file Update smooth display compensation tuning for EVT1.1 Bug: 224528266 Test: measure by HW Change-Id: I2a7314c83b7beafdb9b2d1e49247a219518a19c6 --- lynx/display_colordata_dev_cal0.pb | Bin 1833 -> 552 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/lynx/display_colordata_dev_cal0.pb b/lynx/display_colordata_dev_cal0.pb index b0e7493f21e3809bd39d51079235b3f16460684f..f16431b840400b727bc0bf456d4cc25eb76ad905 100644 GIT binary patch delta 135 zcmZ3P411ST+RB9p`d7OgGJTpXq*raDFjCgwuR znYp?cxtIia6&e(@8W{7^N~J^jK;W3RqZrBb-sN* zsdc>8?(xxXU3uNuX>Ql+d-dbG*KECcdD8maYB#>Nn(pC++dS=jIcr?FN9SkfZTIZ- zu-#~1yyrf=dRHBClIR_HwVnN4&-lqn-x-P3WEb2jFfZN$GiJK%nC)^S4tV52Kmih% zfFveCL=jS$TBL^3QVP?HbeLIWLU|z%l!Y=-V|AcWjp&gc7?BZ}kr`N#6=b7qKR3_y z^HKiVzO#GI#PJK$!jIxzu~(Xw{PLviS0)vI3tZzl#T1@XO!YS>C3p7sYISdaom!W@ zVISBVZpjgT$q$5kAxtb2gJhf}A{E0_lp+$9f^?K78JZz7m5CB5ff}hqn`?c2re7N~ zqi<4^Sg|$8F0#X1oFn--Pi$%j&fI|l7NCelC}9c8ScVE#U<=o&Z8GMG+9qQj)#{#C z^A6Uk#Z16bw$IJD9zW-M!kyqJrU^eeP5RKen7k%Lm3!rnx>SeSLL2I_9vZPRG?!**QERwb s+8{?C-?4Ac>}!WQK_M!TVq6SMv_#6ZOe(ZOw&=R0Z8GMG*(PKD0(`)Y4FCWD From bd7e8ead244424cca886885a087ad4398d1399bc Mon Sep 17 00:00:00 2001 From: David Chao Date: Tue, 6 Sep 2022 15:53:29 +0800 Subject: [PATCH 033/124] thermal: update thermal config Based on EVT1.0 thermal results to adjust virtual sensor formula and WLC charging throttling. - Virtual-skin version v0.5 - Switch on temp 35C, target temp 39C, spower 2000 Bug: 236562040 Test: ThermalHAL throttling worked properly Change-Id: I4fb4a5da702a9b904a7377df55f0bb362c74199d --- thermal_info_config_charge_lynx.json | 14 +++++++------- thermal_info_config_lynx.json | 22 +++++++++++----------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/thermal_info_config_charge_lynx.json b/thermal_info_config_charge_lynx.json index 20f6fd2..4cca071 100644 --- a/thermal_info_config_charge_lynx.json +++ b/thermal_info_config_charge_lynx.json @@ -62,13 +62,13 @@ "Multiplier":0.001 }, { - "Name":"VIRTUAL-NEU-QUT-DISP-SKIN1-GNSS-BATT", + "Name":"VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["neutral_therm", "quiet_therm", "disp_therm", "skin_therm1", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.1, 0.4, 0.15, 0.1, 0.1, 0.15], + "Combination":["neutral_therm", "quiet_therm", "disp_therm", "gnss_tcxo_therm", "battery"], + "Coefficient":[0.28, 0.42, 0.1, 0.1, 0.1], "Multiplier":0.001 }, { @@ -78,7 +78,7 @@ "VirtualSensor":true, "Formula":"WEIGHTED_AVG", "Combination":["neutral_therm", "disp_therm", "skin_therm1", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.2, 0.26, 0.1, 0.19, 0.25], + "Coefficient":[0.27, 0.23, 0.1, 0.27, 0.13], "Multiplier":0.001 }, { @@ -108,7 +108,7 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-SKIN1-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], + "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], @@ -152,7 +152,7 @@ "Formula":"WEIGHTED_AVG", "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm"], "Coefficient":[0.51, 0.25, 0.24], - "HotThreshold":["NAN", 39.0, 41.0, 43.0, 45.0, 47.0, 55.0], + "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, "PollingDelay":300000, @@ -163,7 +163,7 @@ "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"], "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"], "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"], - "S_Power":["NAN", "NAN", 3600, "NAN", "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", 2000, "NAN", "NAN", "NAN", "NAN"], "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"], "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"], "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"] diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index eeead6f..e57b09d 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -62,13 +62,13 @@ "Multiplier":0.001 }, { - "Name":"VIRTUAL-NEU-QUT-DISP-SKIN1-GNSS-BATT", + "Name":"VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["neutral_therm", "quiet_therm", "disp_therm", "skin_therm1", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.1, 0.4, 0.15, 0.1, 0.1, 0.15], + "Combination":["neutral_therm", "quiet_therm", "disp_therm", "gnss_tcxo_therm", "battery"], + "Coefficient":[0.28, 0.42, 0.1, 0.1, 0.1], "Multiplier":0.001 }, { @@ -78,7 +78,7 @@ "VirtualSensor":true, "Formula":"WEIGHTED_AVG", "Combination":["neutral_therm", "disp_therm", "skin_therm1", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.2, 0.26, 0.1, 0.19, 0.25], + "Coefficient":[0.27, 0.23, 0.1, 0.27, 0.13], "Multiplier":0.001 }, { @@ -104,11 +104,11 @@ { "Name":"VIRTUAL-SKIN", "Type":"SKIN", - "Version":"0.4", + "Version":"0.5", "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-SKIN1-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], + "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", 39.0, 43.0, 45.0, 47.0, 52.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], @@ -131,7 +131,7 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-SKIN1-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], + "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", 39.0, 40.0, 41.0, 47.0, 52.0, 55.0], "HotHysteresis":[0.0, 0.9, 0.9, 0.9, 1.9, 1.9, 1.9], @@ -196,7 +196,7 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-SKIN1-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], + "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], @@ -239,7 +239,7 @@ "Formula":"WEIGHTED_AVG", "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm"], "Coefficient":[0.51, 0.25, 0.24], - "HotThreshold":["NAN", 39.0, 41.0, 43.0, 45.0, 47.0, 55.0], + "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, "PollingDelay":300000, @@ -250,7 +250,7 @@ "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"], "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"], "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"], - "S_Power":["NAN", "NAN", 3600, "NAN", "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", 2000, "NAN", "NAN", "NAN", "NAN"], "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"], "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"], "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"] @@ -278,7 +278,7 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-SKIN1-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], + "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 54.0, "NAN"], "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0], From cd57763357edd64595060b9607cae710084372fc Mon Sep 17 00:00:00 2001 From: Victor Hsu Date: Fri, 2 Sep 2022 13:21:20 +0000 Subject: [PATCH 034/124] wifi: Write fs_ready at eariler time wifi framework try to enable wifi before sys.boot_completed after factory reset. It causes fs_ready never to be written. Move the timing of fs_ready to be written when all modules ready. Bug: 244411535 Bug: 243876449 Test: reboot stress and factory reset stress test are passed. Change-Id: I1cac269ec6ed6eee5f34e72186c566c8cddd4925 --- conf/init.lynx.rc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc index 6892718..9ebba66 100644 --- a/conf/init.lynx.rc +++ b/conf/init.lynx.rc @@ -54,6 +54,9 @@ on post-fs-data # Wifi on property:sys.boot_completed=1 write /sys/bus/platform/drivers/cnss2/qcom,cnss-qca6490/fs_ready 1 + +on property:vendor.all.modules.ready=1 && property:vendor.all.devices.ready=1 + write /sys/bus/platform/drivers/cnss2/qcom,cnss-qca6490/fs_ready 1 # Create directories for wifihal services mkdir /dev/socket/wifihal 0770 wifi wifi chmod 2777 /dev/socket/wifihal From db08ec379b63e6de71767b78a5c84c2ae0573f51 Mon Sep 17 00:00:00 2001 From: gilliu Date: Tue, 13 Sep 2022 13:21:45 +0000 Subject: [PATCH 035/124] display: set config of frames to reach LHBM peak brightness Bug: 243975487 Test: adb shell getprop and dump trace to check latency Change-Id: I5aa70bf3a900ee2cb70bcb162758de77efb33a6f --- device-lynx.mk | 3 +++ 1 file changed, 3 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 06c44f4..425fa05 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -59,6 +59,9 @@ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.lbe.supported=1 PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.set_idle_timer_ms=1500 PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.ignore_hdr_camera_layers=true +#config of primary display frames to reach LHBM peak brightness +PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.primarydisplay.lhbm.frames_to_reach_peak_brightness=2 + # NFC PRODUCT_COPY_FILES += \ frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \ From 22d249036357414a4fda36e1b801648d5bf33ad3 Mon Sep 17 00:00:00 2001 From: Gary Jian Date: Wed, 14 Sep 2022 11:44:36 +0800 Subject: [PATCH 036/124] Add MMS UA, UAProf for L10 Bug: 239520846 Test: make Change-Id: Iebee36c80d3fa4e529218b6563333f4339750b9f --- lynx/overlay/frameworks/base/core/res/res/values/config.xml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml index f840d88..78f3852 100644 --- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml +++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml @@ -256,4 +256,9 @@ true + + + gwkk3 + + http://www.gstatic.com/android/sms/GWKK3.xml From 564f900b3505b146732295c164c8779c8f287766 Mon Sep 17 00:00:00 2001 From: TeYuan Wang Date: Thu, 15 Sep 2022 22:18:42 +0800 Subject: [PATCH 037/124] Remove frequency boost of big cores for FACE_UNLOCK Bug: 245619770 Test: build Change-Id: I46d29985e3ae859e61d9757d5451bd8509d31797 --- powerhint.json | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/powerhint.json b/powerhint.json index 5fb842b..6430e54 100644 --- a/powerhint.json +++ b/powerhint.json @@ -1734,18 +1734,6 @@ "Duration": 0, "Value": "0,1,2,3" }, - { - "PowerHint": "FACE_UNLOCK_BOOST", - "Node": "CPUBigClusterMaxFreq", - "Duration": 1000, - "Value": "9999999" - }, - { - "PowerHint": "FACE_UNLOCK_BOOST", - "Node": "CPUBigClusterMinFreq", - "Duration": 1000, - "Value": "9999999" - }, { "PowerHint": "FACE_UNLOCK_BOOST", "Node": "CPU_LITTLE_TSKIN_BYPASS", From cbc9240330518356b85ebc3cbba05085a6d14cb5 Mon Sep 17 00:00:00 2001 From: Chase Wu Date: Tue, 13 Sep 2022 21:20:32 +0800 Subject: [PATCH 038/124] vibrator: enable f0 and disable redc compensation Bug: 241353178 Test: check the value after device boot up Test: update PtsHapticsTestCases and run it Signed-off-by: Chase Wu Change-Id: Iab9f64d19bd1be6a162aef008c6f77bb48dd64ae Merged-In: Iab9f64d19bd1be6a162aef008c6f77bb48dd64ae --- device-lynx.mk | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/device-lynx.mk b/device-lynx.mk index 425fa05..5c46ad7 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -147,7 +147,9 @@ endif # Vibrator HAL PRODUCT_VENDOR_PROPERTIES += \ - ro.vendor.vibrator.hal.supported_primitives=243 + ro.vendor.vibrator.hal.supported_primitives=243 \ + ro.vendor.vibrator.hal.f0.comp.enabled=1 \ + ro.vendor.vibrator.hal.redc.comp.enabled=0 # Trusty liboemcrypto.so PRODUCT_SOONG_NAMESPACES += vendor/google_devices/lynx/prebuilts From ae199e37554a088682898b968b63e0339ceef042 Mon Sep 17 00:00:00 2001 From: Hsiu-Chang Chen Date: Thu, 15 Sep 2022 12:18:29 +0800 Subject: [PATCH 039/124] wlan: Disable 6GHz for softap Bug: 246872050 Test: softap doesn't enable on 6GHz channel Change-Id: Ic313d6b0da7ba6a43771ea0493c468475250f819 --- rro_overlays/WifiOverlay/res/values/config.xml | 3 --- 1 file changed, 3 deletions(-) diff --git a/rro_overlays/WifiOverlay/res/values/config.xml b/rro_overlays/WifiOverlay/res/values/config.xml index 070422c..4fa03d2 100644 --- a/rro_overlays/WifiOverlay/res/values/config.xml +++ b/rro_overlays/WifiOverlay/res/values/config.xml @@ -109,9 +109,6 @@ be checked via NL80211 interface --> true - - true - true From 8c5b4c367a0ff0f98362afcb752e5e1e5e89840f Mon Sep 17 00:00:00 2001 From: Richard Chang Date: Fri, 16 Sep 2022 07:50:19 +0000 Subject: [PATCH 040/124] powerhint: clean up unused hints in L10 INTERACTION is removed but some actions still use it. Bug: 246738037 Test: pts-tradefed run commandAndExit pts -m PtsPerformanceTestCases -t com.google.android.perf.pts.PowerHintJsonVerifyTest Change-Id: Id7028106ac7ff1d41dc7d325aad5fa4d69bc2a54 --- powerhint.json | 5 ----- 1 file changed, 5 deletions(-) diff --git a/powerhint.json b/powerhint.json index 6430e54..a441693 100644 --- a/powerhint.json +++ b/powerhint.json @@ -1286,11 +1286,6 @@ "Duration": 0, "Value": "1" }, - { - "PowerHint": "DISPLAY_IDLE", - "Type": "EndHint", - "Value": "INTERACTION" - }, { "PowerHint": "DISPLAY_IDLE", "Type": "EndHint", From cfad191e5a58ac7b3c638a9fcfc0d950fdcb1a8c Mon Sep 17 00:00:00 2001 From: shihchienc Date: Mon, 25 Jul 2022 04:26:27 +0000 Subject: [PATCH 041/124] Add by project le audio offload capabilities config file We create by project offload capabilities config file to make each project have its own customized default device offload capabilities. Bug: 238983662 Test: make sure file added in config folder can be copied into devices Change-Id: I517ad3db7d60e1fd8647561387cebd9524fe4f2f --- .../lynx/le_audio_codec_capabilities.xml | 84 +++++++++++++++++++ bluetooth/qti_default.mk | 4 + 2 files changed, 88 insertions(+) create mode 100644 bluetooth/lynx/le_audio_codec_capabilities.xml diff --git a/bluetooth/lynx/le_audio_codec_capabilities.xml b/bluetooth/lynx/le_audio_codec_capabilities.xml new file mode 100644 index 0000000..cfb915b --- /dev/null +++ b/bluetooth/lynx/le_audio_codec_capabilities.xml @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk index 6132dec..5f508b8 100644 --- a/bluetooth/qti_default.mk +++ b/bluetooth/qti_default.mk @@ -36,6 +36,10 @@ PRODUCT_PRODUCT_PROPERTIES += \ persist.bluetooth.leaudio_offload.disabled=false \ ro.vendor.audio_hal.ble_use_stream_id=true +# LE Auido Offload Capabilities setting +PRODUCT_COPY_FILES += \ + device/google/lynx/bluetooth/lynx/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml + # Bluetooth HAL and Pixel extension DEVICE_MANIFEST_FILE += \ device/google/lynx/bluetooth/manifest_bluetooth.xml From 1f23bcddd1017991ad6b9d9da311c24409912fc8 Mon Sep 17 00:00:00 2001 From: Ilya Matyukhin Date: Mon, 19 Sep 2022 23:25:01 +0000 Subject: [PATCH 042/124] L10: Disable support for fingerprint gestures Bug: 239640928 Test: on device Change-Id: I63b81380eef73718c25e49423674f071176e101c --- lynx/overlay/frameworks/base/core/res/res/values/config.xml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml index 78f3852..1e045af 100644 --- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml +++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml @@ -253,6 +253,9 @@ com.google.sensor.long_press + + false + true From 554e1ecc4785c14d2737b029327d32d8543bcb12 Mon Sep 17 00:00:00 2001 From: pointerkung Date: Tue, 30 Aug 2022 19:53:12 +0800 Subject: [PATCH 043/124] Change util threshold of camera streaming high Fine-tune the util threshold to "1100 1078 1024" Bug: 243729855 Test: Build pass, GCA, 60fps recording power and performance test Change-Id: I4a348127b913aa4783f69ba468be1fd77f784def --- powerhint.json | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/powerhint.json b/powerhint.json index a441693..08790a3 100644 --- a/powerhint.json +++ b/powerhint.json @@ -136,7 +136,7 @@ "Path": "/proc/vendor_sched/util_threshold", "Values": [ "1280", - "1100" + "1100 1078 1024" ], "DefaultIndex": 0, "ResetOnInit": true @@ -900,7 +900,7 @@ "PowerHint": "CAMERA_STREAMING_HIGH", "Node": "CPUUtilThreshold", "Duration": 0, - "Value": "1100" + "Value": "1100 1078 1024" }, { "PowerHint": "CAMERA_STREAMING_HIGH", From afbec8c62bc3c83fb1ac6c26c78c0ff15dac358a Mon Sep 17 00:00:00 2001 From: vincenttew Date: Tue, 20 Sep 2022 07:31:42 +0000 Subject: [PATCH 044/124] audio: extand the period number of hifi usecase extend this to prevent alsa trigger stop playback and causing pop Bug: 238056484 Signed-off-by: vincenttew Change-Id: If9866a5755178a7c76b22dcbd75b9b9e1dc87620 --- audio/lynx/config/audio_platform_configuration.xml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/audio/lynx/config/audio_platform_configuration.xml b/audio/lynx/config/audio_platform_configuration.xml index 01d1efc..26f75f7 100644 --- a/audio/lynx/config/audio_platform_configuration.xml +++ b/audio/lynx/config/audio_platform_configuration.xml @@ -199,8 +199,8 @@ - - + + From 7daee8149e9a07c648a7f9e4edfab3f0c91abfdc Mon Sep 17 00:00:00 2001 From: Cheney Ni Date: Fri, 16 Sep 2022 16:06:19 +0800 Subject: [PATCH 045/124] Bluetooth: Built-in SAR tool if supporting SAR HAL Bug: 247430516 Test: Pass Android build Change-Id: I8e5510dfee461904fa5438dfc6890fb1fe6b7a5f --- bluetooth/qti_default.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk index 5f508b8..8e6b92a 100644 --- a/bluetooth/qti_default.mk +++ b/bluetooth/qti_default.mk @@ -80,7 +80,7 @@ PRODUCT_COPY_FILES += \ device/google/lynx/bluetooth/bluetooth_power_limits_L10_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_US.csv # Bluetooth SAR test tools -ifeq ($(TARGET_USE_QTI_BT_SAR_V1_1)$(TARGET_USE_QTI_BT_SAR),true) +ifneq (,$(filter true, $(TARGET_USE_QTI_BT_SAR_V1_1) $(TARGET_USE_QTI_BT_SAR))) PRODUCT_PACKAGES_DEBUG += bluetooth_sar_test endif From 5b9468e28769a6ad84489493e39200868afa8077 Mon Sep 17 00:00:00 2001 From: Shanmuga Pandi M Date: Tue, 20 Sep 2022 07:04:51 +0000 Subject: [PATCH 046/124] Enable the flag to increase thread priority for nodes stop Bug: 245652771 Test: GCA, CTS Change-Id: If0d61dcc3c43f64070e4a967a6678dea652c489d --- device-lynx.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 5c46ad7..2df0db7 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -222,6 +222,10 @@ PRODUCT_VENDOR_PROPERTIES += \ PRODUCT_VENDOR_PROPERTIES += \ persist.vendor.camera.1080P_60fps_binning_except_rear_main=true +# Increase thread priority for nodes stop +PRODUCT_VENDOR_PROPERTIES += \ + persist.vendor.camera.increase_thread_priority_nodes_stop=true + # OIS with system imu PRODUCT_VENDOR_PROPERTIES += \ persist.vendor.camera.ois_with_system_imu=true From cca9b0060924ffc870cb682c4343ff0bbcc5f71e Mon Sep 17 00:00:00 2001 From: Yanting Yang Date: Thu, 22 Sep 2022 12:31:54 +0800 Subject: [PATCH 047/124] Add initial MIC e-label for JP SKU of L10 Bug: 238038220 Test: visual Change-Id: I880bb59217f59af352dfab25e5844e54b49bdf38 --- device-lynx.mk | 8 +++++++- .../SettingsOverlayG82U8/Android.bp | 8 ++++++++ .../SettingsOverlayG82U8/AndroidManifest.xml | 9 +++++++++ .../res/drawable/regulatory_info.png | Bin 0 -> 25898 bytes 4 files changed, 24 insertions(+), 1 deletion(-) create mode 100644 lynx/overlay_packages/SettingsOverlayG82U8/Android.bp create mode 100644 lynx/overlay_packages/SettingsOverlayG82U8/AndroidManifest.xml create mode 100644 lynx/overlay_packages/SettingsOverlayG82U8/res/drawable/regulatory_info.png diff --git a/device-lynx.mk b/device-lynx.mk index 2df0db7..9fa0141 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -101,7 +101,9 @@ PRODUCT_COPY_FILES += \ device/google/lynx/powerhint.json:$(TARGET_COPY_OUT_VENDOR)/etc/powerhint.json # PowerStats HAL -PRODUCT_SOONG_NAMESPACES += device/google/lynx/powerstats +PRODUCT_SOONG_NAMESPACES += \ + device/google/lynx/powerstats \ + device/google/lynx # Bluetooth HAL and Pixel extension include device/google/lynx/bluetooth/qti_default.mk @@ -246,3 +248,7 @@ ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT))) PRODUCT_COPY_FILES += \ device/google/gs201/init.hardware.wlc.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/init.wlc.rc endif + +# SKU specific RROs +PRODUCT_PACKAGES += \ + SettingsOverlayG82U8 diff --git a/lynx/overlay_packages/SettingsOverlayG82U8/Android.bp b/lynx/overlay_packages/SettingsOverlayG82U8/Android.bp new file mode 100644 index 0000000..1af1f37 --- /dev/null +++ b/lynx/overlay_packages/SettingsOverlayG82U8/Android.bp @@ -0,0 +1,8 @@ +package { + default_applicable_licenses: ["Android-Apache-2.0"], +} + +runtime_resource_overlay { + name: "SettingsOverlayG82U8", + product_specific: true, +} diff --git a/lynx/overlay_packages/SettingsOverlayG82U8/AndroidManifest.xml b/lynx/overlay_packages/SettingsOverlayG82U8/AndroidManifest.xml new file mode 100644 index 0000000..8cb5a67 --- /dev/null +++ b/lynx/overlay_packages/SettingsOverlayG82U8/AndroidManifest.xml @@ -0,0 +1,9 @@ + + + + + diff --git a/lynx/overlay_packages/SettingsOverlayG82U8/res/drawable/regulatory_info.png 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zJ$KqN4#6-_L3LgQ^z~vWntYLgRmlT9yz~W4Tc%LMCV06tp7p;E`r)a8iAGb*pb0pk zOTKALdUF{9nhS6BH`3XyB}|f$kjTELe@N*9EUs9?OjIn9 z9*|(N^A^x8QWA@_kFD#i4LfL(aO}#vWVQgs8uXRmOY{xF_ayivm8o*CpKLOX*Z(!2=7Ap!;Yci(Jv5+)zslAM|a3*8`Bf7)zBOAyJ?d< zGRI|(vl%^3l+|I!^Xw^6Vx(K1z%Zayz?iOTZlBt#4)*6Z9fw8PbDX%jy;bl?i*o)E zYX9sgBReL={FwuzTg5WaccQSOzRpl5Jj9%O`1js?0k`n%CFzWF#rp||a*PamApTxa zOc?yNYhr0|VXoSkDj#>9SMjcXMj~sv&${+|QHg?g-m< zupF$cd@e)|8x7%e;31BjWxC!G{AFLF_&>%9RSxXF5-}{tZt39Mw3!^v4aDgiNT(Hr z__U+AJ!E69E@n$VFMsF5bWJ5>6Cs_4b(x}vJo5dEHAH&_?AR0{aA5Os_zvni1CuM= z$GhUIy&4HV@XihI<`K@s6$}v`8mNeJ4i==H#nldAf`$L~WwEB&Nw6s&sO?I2J6xgu zhRPgN#;9XE*O4I%ALfz_*cgVZl3ylM?Mko7>^e_Wo0n(pXXL#m)3@-=nWe>sF<{5Bi((yK(pAGZX*oQNaIif3V{J i+b?bWumA90x4#}XEt?r1n8G(u$PD$&bRS@@#QhHwD!mc_ literal 0 HcmV?d00001 From 32f4c7a96b9e5a79ad32566c0c26bcdcc7246bec Mon Sep 17 00:00:00 2001 From: Carter Hsu Date: Fri, 16 Sep 2022 16:02:01 +0800 Subject: [PATCH 048/124] audio: update CCA default setting Bug: 248151108 Test: build pass Signed-off-by: Carter Hsu Change-Id: If8e5b6be12a56db7177f3f784a0dcb1f8957e684 --- device-lynx.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 9fa0141..89c3570 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -243,6 +243,10 @@ PRODUCT_COPY_FILES += \ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += \ debug.sf.enable_adpf_cpu_hint=true +##Audio Vendor property +PRODUCT_PROPERTY_OVERRIDES += \ + persist.vendor.audio.cca.enabled=true + # userdebug specific ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT))) PRODUCT_COPY_FILES += \ From 8e8d9e5c7af977e72d30fcd9c297737b75fb7294 Mon Sep 17 00:00:00 2001 From: Carter Hsu Date: Wed, 21 Sep 2022 11:40:14 +0800 Subject: [PATCH 049/124] audio: allow Fortemedia to notify setting to CCA Bug: 237720492 Test: build pass Signed-off-by: Carter Hsu Change-Id: I9946644bbf213dc9dc7226cc684923ac7eb53351 --- audio/lynx/config/audio_platform_configuration.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/audio/lynx/config/audio_platform_configuration.xml b/audio/lynx/config/audio_platform_configuration.xml index 26f75f7..8e24187 100644 --- a/audio/lynx/config/audio_platform_configuration.xml +++ b/audio/lynx/config/audio_platform_configuration.xml @@ -290,7 +290,7 @@ - + From fc3b4c71994217722b084d6a2166f38ab26127f3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Kosi=C5=84ski?= Date: Tue, 13 Sep 2022 01:59:02 +0000 Subject: [PATCH 050/124] Set Lyric camera_hardware variable. Bug: 240478511 Test: presubmit Change-Id: I79a6c65e73a5813e3e10749564a1e8dae50c45a0 Merged-In: I79a6c65e73a5813e3e10749564a1e8dae50c45a0 --- device-lynx.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 89c3570..be796f7 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -29,6 +29,8 @@ include device/google/lynx/audio/lynx/audio-tables.mk include device/google/gs201/device-shipping-common.mk include hardware/google/pixel/vibrator/cs40l26/device.mk +# go/lyric-soong-variables +$(call soong_config_set,lyric,camera_hardware,lynx) $(call soong_config_set,lyric,tuning_product,lynx) $(call soong_config_set,google3a_config,target_device,lynx) From b2ea83dee1841e1280cc048c64a98f5cd1adb38b Mon Sep 17 00:00:00 2001 From: Taeju Park Date: Fri, 23 Sep 2022 13:38:06 -0700 Subject: [PATCH 051/124] Add Ownership to powerhint files Bug: 248115959 Signed-off-by: Taeju Park Change-Id: I3a921c6d09bbf116df0674da1f83efa8a9d90a22 --- OWNERS | 1 + 1 file changed, 1 insertion(+) create mode 100644 OWNERS diff --git a/OWNERS b/OWNERS new file mode 100644 index 0000000..1451bd8 --- /dev/null +++ b/OWNERS @@ -0,0 +1 @@ +per-file powerhint.json = jychen@google.com,jenhaochen@google.com,wvw@google.com,joaodias@google.com From 9f17360f7b43261874c0ffd96114b430209738fe Mon Sep 17 00:00:00 2001 From: David Chao Date: Wed, 28 Sep 2022 19:01:48 +0800 Subject: [PATCH 052/124] thermal: more aggressive thermal throttling policy - CPU/GPU more aggressive throttling Bug: 248392264 Test: boot to home and thermal throttling worked properly Change-Id: Idfa7ec21877a11000d2c6d17e4bbcabc9606f58c --- powerhint.json | 136 +++++++++++++++++----------------- thermal_info_config_lynx.json | 35 ++++++--- 2 files changed, 92 insertions(+), 79 deletions(-) diff --git a/powerhint.json b/powerhint.json index 08790a3..8b7b688 100644 --- a/powerhint.json +++ b/powerhint.json @@ -1322,409 +1322,409 @@ "Value": "572000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "PMU_POLL", "Duration": 0, "Value": "1" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "BigControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "MidControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "LittleControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "G3dControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "TpuControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "BigSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "MidSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "LittleSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "G3dSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "TpuSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "Dex2oatThreads", "Duration": 0, "Value": "6" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT", "Node": "Dex2oatCPUSet", "Duration": 0, "Value": "0,1,2,3,4,5" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "PMU_POLL", "Duration": 0, "Value": "1" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "BigControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "MidControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "LittleControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "G3dControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "TpuControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "BigSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "MidSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "LittleSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "G3dSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "TpuSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "Dex2oatThreads", "Duration": 0, "Value": "4" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_MODERATE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE", "Node": "Dex2oatCPUSet", "Duration": 0, "Value": "0,1,2,3" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "PMU_POLL", "Duration": 0, "Value": "1" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "BigControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "MidControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "LittleControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "G3dControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "TpuControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "BigSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "MidSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "LittleSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "G3dSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "TpuSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "Dex2oatThreads", "Duration": 0, "Value": "4" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_SEVERE", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE", "Node": "Dex2oatCPUSet", "Duration": 0, "Value": "0,1,2,3" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "PMU_POLL", "Duration": 0, "Value": "1" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "BigControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "MidControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "LittleControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "G3dControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "TpuControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "BigSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "MidSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "LittleSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "G3dSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "TpuSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "Dex2oatThreads", "Duration": 0, "Value": "2" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_CRITICAL", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL", "Node": "Dex2oatCPUSet", "Duration": 0, "Value": "0,1,2,3" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "PMU_POLL", "Duration": 0, "Value": "1" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "CPU_LITTLE_TSKIN_BYPASS", "Duration": 0, "Value": "0" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "CPU_MID_TSKIN_BYPASS", "Duration": 0, "Value": "0" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "CPU_BIG_TSKIN_BYPASS", "Duration": 0, "Value": "0" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "BigControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "MidControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "LittleControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "G3dControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "TpuControlTempSet", "Duration": 0, "Value": "80000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "BigSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "MidSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "LittleSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "G3dSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "TpuSwitchOnTempSet", "Duration": 0, "Value": "60000" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "Dex2oatThreads", "Duration": 0, "Value": "1" }, { - "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY", + "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY", "Node": "Dex2oatCPUSet", "Duration": 0, "Value": "0,1,2,3" diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index e57b09d..92ddca6 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -113,7 +113,6 @@ "HotThreshold":["NAN", 39.0, 43.0, 45.0, 47.0, 52.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, - "SendPowerHint":true, "Monitor":true, "PollingDelay":300000, "PassiveDelay":7000, @@ -124,6 +123,21 @@ } ] }, + { + "Name":"VIRTUAL-SKIN-HINT", + "Type":"UNKNOWN", + "VirtualSensor":true, + "TriggerSensor":"skin_therm1", + "Formula":"MAXIMUM", + "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], + "HotThreshold":["NAN", 37.0, 43.0, 45.0, 47.0, 52.0, 55.0], + "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], + "Multiplier":0.001, + "SendPowerHint":true, + "PollingDelay":300000, + "PassiveDelay":7000 + }, { "Name":"VIRTUAL-SKIN-CPU-GPU", "Type":"UNKNOWN", @@ -133,22 +147,21 @@ "Formula":"MAXIMUM", "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP"], "Coefficient":[1.0, 1.0, 1.0, 1.0], - "HotThreshold":["NAN", 39.0, 40.0, 41.0, 47.0, 52.0, 55.0], + "HotThreshold":["NAN", 37.0, 39.0, 41.0, 47.0, 52.0, 55.0], "HotHysteresis":[0.0, 0.9, 0.9, 0.9, 1.9, 1.9, 1.9], "Multiplier":0.001, "PollingDelay":300000, "PassiveDelay":7000, "PIDInfo": { - "K_Po":["NAN", "NAN", 1800, 500, "NAN", "NAN", "NAN"], - "K_Pu":["NAN", "NAN", 1800, 500, "NAN", "NAN", "NAN"], - "K_I":["NAN", "NAN", 20, 5, "NAN", "NAN", "NAN"], + "K_Po":["NAN", "NAN", 400, 500, "NAN", "NAN", "NAN"], + "K_Pu":["NAN", "NAN", 400, 500, "NAN", "NAN", "NAN"], + "K_I":["NAN", "NAN", 0, 5, "NAN", "NAN", "NAN"], "K_D":["NAN", "NAN", 0, 0, "NAN", "NAN", "NAN"], - "I_Max":["NAN", "NAN", 1500, 100, "NAN", "NAN", "NAN"], - "S_Power":["NAN", "NAN", 1500, 800, "NAN", "NAN", "NAN"], - "MinAllocPower":["NAN", "NAN", 2000, 800, "NAN", "NAN", "NAN"], - "MaxAllocPower":["NAN", "NAN", 10000, 4000, "NAN", "NAN", "NAN"], - "I_Cutoff":["NAN", "NAN", 2, 2, "NAN", "NAN", "NAN"], - "I_Default": 1000, + "I_Max":["NAN", "NAN", 0, 300, "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", 2000, 1100, "NAN", "NAN", "NAN"], + "MinAllocPower":["NAN", "NAN", 1200, 800, "NAN", "NAN", "NAN"], + "MaxAllocPower":["NAN", "NAN", 10000, 10000, "NAN", "NAN", "NAN"], + "I_Cutoff":["NAN", "NAN", 0, 2, "NAN", "NAN", "NAN"], "TranCycle": 5 }, "BindedCdevInfo": [ From 3e50915d85446f91c32d263b8aec25b57a814bcd Mon Sep 17 00:00:00 2001 From: David Chao Date: Wed, 28 Sep 2022 19:02:40 +0800 Subject: [PATCH 053/124] thermal: more aggressive thermal throttling policy - Lower Spower from 1500 to 1200 for Wired charging Bug: 249464740 Test: boot to home and thermal throttling worked properly Change-Id: Ibfebb23b74fcd6d8670e05c0b023157f4fd34141 --- thermal_info_config_charge_lynx.json | 2 +- thermal_info_config_lynx.json | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/thermal_info_config_charge_lynx.json b/thermal_info_config_charge_lynx.json index 4cca071..27b74ca 100644 --- a/thermal_info_config_charge_lynx.json +++ b/thermal_info_config_charge_lynx.json @@ -121,7 +121,7 @@ "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"], "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"], "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"], - "S_Power":["NAN", "NAN", 1500, "NAN", "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", 1200, "NAN", "NAN", "NAN", "NAN"], "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"], "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"], "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"] diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index 92ddca6..52020f0 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -222,7 +222,7 @@ "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"], "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"], "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"], - "S_Power":["NAN", "NAN", 1500, "NAN", "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", 1200, "NAN", "NAN", "NAN", "NAN"], "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"], "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"], "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"] From 48a8251b5ad6df53597ddc985f716977449c4dd1 Mon Sep 17 00:00:00 2001 From: Patty Huang Date: Tue, 27 Sep 2022 17:58:53 +0800 Subject: [PATCH 054/124] Apply the workaround for the CIS->SCO handover Set the system property persist.bluetooth.leaudio.notify.idle.during.call to true to receive the notification when LeAudio group turned idle Bug: 244524929 Bug: 244391698 Test: Switch LE Audio device to HFP device during phone call, and make sure the HFP device can hear sound. Change-Id: I0a0ad4ef97e61deb528c6f8180317bda8b2512be --- bluetooth/qti_default.mk | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk index 8e6b92a..5c33b60 100644 --- a/bluetooth/qti_default.mk +++ b/bluetooth/qti_default.mk @@ -36,6 +36,12 @@ PRODUCT_PRODUCT_PROPERTIES += \ persist.bluetooth.leaudio_offload.disabled=false \ ro.vendor.audio_hal.ble_use_stream_id=true +# Bluetooth LE Audio CIS handover to SCO +# Set the property only if the controller doesn't support CIS and SCO +# simultaneously. More details in b/242908683. +PRODUCT_PRODUCT_PROPERTIES += \ + persist.bluetooth.leaudio.notify.idle.during.call=true + # LE Auido Offload Capabilities setting PRODUCT_COPY_FILES += \ device/google/lynx/bluetooth/lynx/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml From 9342bb887b3d39a61967ea4aec3e8b10d6ef227f Mon Sep 17 00:00:00 2001 From: Shanmuga Pandi M Date: Fri, 23 Sep 2022 08:18:07 +0000 Subject: [PATCH 055/124] [L10] Relax CPU minimum frequency boost for LAUNCH_CAMERA Bug: 248960565 Test: CTS testCameraLaunch, GCA Change-Id: I075b7f4447327be4ef601c531b43473f79dbc74a --- powerhint.json | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/powerhint.json b/powerhint.json index 8b7b688..3a1fef8 100644 --- a/powerhint.json +++ b/powerhint.json @@ -41,6 +41,7 @@ "Path": "/sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq", "Values": [ "9999999", + "1401000", "1197000", "0" ], @@ -68,6 +69,7 @@ "Path": "/sys/devices/system/cpu/cpu4/cpufreq/scaling_min_freq", "Values": [ "9999999", + "1836000", "1197000", "0" ], @@ -95,6 +97,7 @@ "Path": "/sys/devices/system/cpu/cpu6/cpufreq/scaling_min_freq", "Values": [ "9999999", + "1826000", "1106000", "0" ], @@ -151,6 +154,15 @@ ], "ResetOnInit": true }, + { + "Name": "CAMUClampBoost", + "Path": "/proc/vendor_sched/cam_uclamp_min", + "Values": [ + "612", + "0" + ], + "ResetOnInit": true + }, { "Name": "TAUClampBoost", "Path": "/proc/vendor_sched/ta_uclamp_min", @@ -576,7 +588,7 @@ "PowerHint": "CAMERA_LAUNCH", "Node": "CPUBigClusterMinFreq", "Duration": 1000, - "Value": "9999999" + "Value": "1826000" }, { "PowerHint": "CAMERA_LAUNCH", @@ -588,7 +600,7 @@ "PowerHint": "CAMERA_LAUNCH", "Node": "CPUMidClusterMinFreq", "Duration": 1000, - "Value": "9999999" + "Value": "1836000" }, { "PowerHint": "CAMERA_LAUNCH", @@ -600,7 +612,13 @@ "PowerHint": "CAMERA_LAUNCH", "Node": "CPULittleClusterMinFreq", "Duration": 1000, - "Value": "9999999" + "Value": "1401000" + }, + { + "PowerHint": "CAMERA_LAUNCH", + "Node": "CAMUClampBoost", + "Duration": 1000, + "Value": "612" }, { "PowerHint": "CAMERA_LAUNCH", From d6f8a94b6d3ae60cdeb72e41125ae3acd0ef7f54 Mon Sep 17 00:00:00 2001 From: Cyan_Hsieh Date: Thu, 29 Sep 2022 14:24:08 +0800 Subject: [PATCH 056/124] Set audio.camerasound.force for JP devices Test: set to JP sku and check No camera sound option Bug: 247935640 Change-Id: I08f6e9c187a47be289ef8a5e24b6724c353a680d --- conf/init.lynx.rc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc index 9ebba66..55cc13b 100644 --- a/conf/init.lynx.rc +++ b/conf/init.lynx.rc @@ -100,3 +100,9 @@ on property:sys.boot_completed=1 on override-sf-uclamp write /proc/vendor_sched/rt_uclamp_min 0 write /proc/vendor_sched/sf_uclamp_min 0 + +# For Japan sku, always enforce camera shutter sound +# Since this property is read by the audio server in system service, +# it should be written by the system init. +on property:ro.boot.hardware.sku=G82U8 + setprop audio.camerasound.force true From f8ee9754656b8e8d193207e29c7c6c99b9e4a89c Mon Sep 17 00:00:00 2001 From: David Chao Date: Tue, 4 Oct 2022 17:28:03 +0800 Subject: [PATCH 057/124] thermal: more aggressive CPU/GPU thermal throttling policy - Spower change from 1100 to 800 Bug: 248392264 Test: boot to home and thermal throttling worked properly Change-Id: I760072cdec8523deb6075280912b0c264db2e36a --- thermal_info_config_lynx.json | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index 52020f0..0aaf0d8 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -153,12 +153,12 @@ "PollingDelay":300000, "PassiveDelay":7000, "PIDInfo": { - "K_Po":["NAN", "NAN", 400, 500, "NAN", "NAN", "NAN"], - "K_Pu":["NAN", "NAN", 400, 500, "NAN", "NAN", "NAN"], + "K_Po":["NAN", "NAN", 600, 500, "NAN", "NAN", "NAN"], + "K_Pu":["NAN", "NAN", 600, 500, "NAN", "NAN", "NAN"], "K_I":["NAN", "NAN", 0, 5, "NAN", "NAN", "NAN"], "K_D":["NAN", "NAN", 0, 0, "NAN", "NAN", "NAN"], "I_Max":["NAN", "NAN", 0, 300, "NAN", "NAN", "NAN"], - "S_Power":["NAN", "NAN", 2000, 1100, "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", 2000, 800, "NAN", "NAN", "NAN"], "MinAllocPower":["NAN", "NAN", 1200, 800, "NAN", "NAN", "NAN"], "MaxAllocPower":["NAN", "NAN", 10000, 10000, "NAN", "NAN", "NAN"], "I_Cutoff":["NAN", "NAN", 0, 2, "NAN", "NAN", "NAN"], From 96603477458b2cf7fa8c0da7526471f63766ecae Mon Sep 17 00:00:00 2001 From: David Chao Date: Tue, 4 Oct 2022 17:28:53 +0800 Subject: [PATCH 058/124] thermal: modify GPU thermal throttling policy - Change GPU CdevCeiling because GPU available_frequencies has been increased 2 states from 10 to 12. Bug: 250502714 Test: boot to home and thermal throttling worked properly Change-Id: I65751bd91c2767389732e5ca0160afb8b3ef42ad --- thermal_info_config_lynx.json | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index 0aaf0d8..cb48e5a 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -198,8 +198,8 @@ "MaxReleaseStep": 1, "MaxThrottleStep": 1, "BindedPowerRail": "S2S_VDD_G3D", - "CdevCeiling": [0, 8, 8, 8, 8, 11, 11], - "LimitInfo": [0, 0, 0, 0, 8, 11, 11] + "CdevCeiling": [0, 10, 10, 10, 10, 12, 12], + "LimitInfo": [0, 0, 0, 0, 10, 12, 12] } ] }, @@ -458,7 +458,7 @@ "BindedCdevInfo": [ { "CdevRequest": "thermal-gpufreq-0", - "LimitInfo": [0, 0, 0, 0, 9, 9, 9] + "LimitInfo": [0, 0, 0, 0, 11, 11, 11] } ] }, @@ -477,7 +477,7 @@ "BindedCdevInfo": [ { "CdevRequest": "thermal-gpufreq-0", - "LimitInfo": [0, 0, 0, 0, 9, 9, 9] + "LimitInfo": [0, 0, 0, 0, 11, 11, 11] } ] }, @@ -515,7 +515,7 @@ "BindedCdevInfo": [ { "CdevRequest": "thermal-gpufreq-0", - "LimitInfo": [0, 0, 0, 0, 4, 4, 4] + "LimitInfo": [0, 0, 0, 0, 5, 5, 5] } ] }, @@ -554,7 +554,7 @@ }, { "CdevRequest": "thermal-gpufreq-0", - "LimitInfo": [0, 0, 0, 0, 3, 3, 3] + "LimitInfo": [0, 0, 0, 0, 4, 4, 4] }, { "CdevRequest": "tpu_cooling", @@ -608,7 +608,7 @@ }, { "CdevRequest": "thermal-gpufreq-0", - "LimitInfo": [0, 0, 0, 0, 4, 4, 4] + "LimitInfo": [0, 0, 0, 0, 5, 5, 5] }, { "CdevRequest": "tpu_cooling", @@ -629,7 +629,7 @@ }, { "CdevRequest": "thermal-gpufreq-0", - "LimitInfo": [0, 0, 0, 0, 3, 3, 3] + "LimitInfo": [0, 0, 0, 0, 4, 4, 4] }, { "CdevRequest": "tpu_cooling", From 3d90324dfd9e5b1f128498f2a98c0012351861a1 Mon Sep 17 00:00:00 2001 From: Ching-Sung Li Date: Mon, 26 Sep 2022 12:20:32 +0800 Subject: [PATCH 059/124] Build L10 default CMF color wallpaper Bug: 239505528 Test: Build pass; manual Change-Id: I698d54e6fec71c09c726c4f72917db247448c64d --- device-lynx.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/device-lynx.mk b/device-lynx.mk index be796f7..a510697 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -22,6 +22,7 @@ $(call inherit-product-if-exists, vendor/google_devices/gs201/prebuilts/device-v $(call inherit-product-if-exists, vendor/google_devices/gs201/proprietary/device-vendor.mk) $(call inherit-product-if-exists, vendor/google_devices/lynx/proprietary/lynx/device-vendor-lynx.mk) $(call inherit-product-if-exists, vendor/google_devices/lynx/proprietary/device-vendor.mk) +$(call inherit-product-if-exists, vendor/google_devices/lynx/proprietary/WallpapersLynx.mk) DEVICE_PACKAGE_OVERLAYS += device/google/lynx/lynx/overlay From 7aa4e0816f145067df4c2de74e8e0d8b3942b695 Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Tue, 27 Sep 2022 08:51:23 +0000 Subject: [PATCH 060/124] audio: Phase in fortemedia tuning tables Change List : Fortemedia: Handset: Optimize AMS threshold and performacne Sync AMS setting to TMO / Reserve 2 SWB/ HAC / TMO-HAC / HAC Reserve 2 SWB Handheld: Optimize NS performance / FFP performance / AMS threshold Sync TX setting to - BT-HAC / Condor-Headphone / TTY-VCO (NB/WB) - BT-HAC SWB / BT-HAC Reserve2 SWB / Condor-Headphone SWB / TTY-VCO SWB / Condor-Headphone Reserve2 SWB / TTY-VCO Reserve2 / Reserve2 SWB Sync RX setting to - TTY-HCO (NB/WB) - TTY-HCO SWB / TTY-HCO Reserve2 SWB / Reserve2 SWB SS to Reserve2 SWB (FFP on, stereo on, RX setting to RX2) Files from the latest attachment on b/249219200 Bug: 249219200 Test: verified by hardware engineers Change-id: I490303b60ce6b67a1ad930e5739af98898401bbe --- audio/lynx/tuning/fortemedia/BLUETOOTH.dat | Bin 276978 -> 276978 bytes audio/lynx/tuning/fortemedia/BLUETOOTH.mods | 94 +- audio/lynx/tuning/fortemedia/HANDSET.dat | Bin 255674 -> 255674 bytes audio/lynx/tuning/fortemedia/HANDSET.mods | 5506 ++++----- audio/lynx/tuning/fortemedia/HANDSFREE.dat | Bin 117198 -> 117198 bytes audio/lynx/tuning/fortemedia/HANDSFREE.mods | 10740 +++++++++--------- audio/lynx/tuning/fortemedia/HEADSET.dat | Bin 426106 -> 426106 bytes audio/lynx/tuning/fortemedia/HEADSET.mods | 192 +- 8 files changed, 8266 insertions(+), 8266 deletions(-) diff --git a/audio/lynx/tuning/fortemedia/BLUETOOTH.dat b/audio/lynx/tuning/fortemedia/BLUETOOTH.dat index e6e60cee93a02c59db0318840b3f13eaa423b973..da466cbf4a8d6b35a8294df3b0d18a95fcc0b3a2 100644 GIT binary patch delta 341 zcmezLS>V%WfepfXj2x3Ugo{ts*5hXsooub=!>BU3L(iO1VDbUIb5hC-`HcVT3xK$g z@dA4h<6Gup#y2`8j2TXwSLoknXLOjXkQl|Pz}(E7viY&OgMz4nE+d129wUQ*J|lyJ z0po!HLm+>0!D=t2|MimV%WfepfXlbf$dOxD)pXB3}ot>?oiFu6m|oKa!&0ljn6_vJGSaJ^+NW_+Mm z!l)6td4>LM_UZl$nS*&Pl^dBA7@C+Bn46gcHa|9ZP?#LOddKA35z%6Gj75wFOvQ|o zOiCCP{7M;jgqATr^W5wcsmH-|fO&IGqBBS>KO2LCAtQss^fP(PN@D-(tr`E<+W@gG z5ZeKn+a diff --git a/audio/lynx/tuning/fortemedia/BLUETOOTH.mods b/audio/lynx/tuning/fortemedia/BLUETOOTH.mods index 0c19e7c..2562652 100644 --- a/audio/lynx/tuning/fortemedia/BLUETOOTH.mods +++ b/audio/lynx/tuning/fortemedia/BLUETOOTH.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG BLUETOOTH #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-08-19 11:54:13 +#SAVE_TIME 2022-09-27 16:33:33 #CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB #PARAM_MODE FULL @@ -2950,7 +2950,7 @@ 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH +272 0x0800 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L @@ -2960,7 +2960,7 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0017 //TX_NS_LVL_CTRL_1 +282 0x0015 //TX_NS_LVL_CTRL_1 283 0x0015 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 @@ -2979,7 +2979,7 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1000 //TX_SNRI_SUP_1 +301 0x2400 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x2400 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 @@ -2993,7 +2993,7 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x2000 //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x1000 //TX_A_POST_FILT_S_3 318 0x3000 //TX_A_POST_FILT_S_4 @@ -3045,13 +3045,13 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0023 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 +372 0x2CEC //TX_NOISE_TH_3 +373 0x4268 //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 @@ -3554,7 +3554,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -3569,7 +3569,7 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -3578,7 +3578,7 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x0050 //TX_MICMUTE_AMP_THR +900 0x0064 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x000C //TX_MICMUTE_CVG_TIME @@ -5649,12 +5649,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x1000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -5673,7 +5673,7 @@ 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 +325 0x7FFF //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -5718,12 +5718,12 @@ 367 0x0032 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 +370 0x0320 //TX_NOISE_TH_1 371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 +372 0x2CEC //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 @@ -6247,7 +6247,7 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x03C0 //TX_MICMUTE_RATIO_THR +899 0x04B0 //TX_MICMUTE_RATIO_THR 900 0x0122 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH @@ -8319,12 +8319,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -8333,12 +8333,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 @@ -8390,9 +8390,9 @@ 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 @@ -8917,8 +8917,8 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x01C2 //TX_MICMUTE_AMP_THR +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x01A4 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME @@ -50734,7 +50734,7 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB -#PARAM_MODE Full +#PARAM_MODE FULL #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -56379,12 +56379,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -56393,12 +56393,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 @@ -56450,9 +56450,9 @@ 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 @@ -56977,8 +56977,8 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x01C2 //TX_MICMUTE_AMP_THR +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x01A4 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME diff --git a/audio/lynx/tuning/fortemedia/HANDSET.dat b/audio/lynx/tuning/fortemedia/HANDSET.dat index 731e80498f9eb4510b5869a3974528c1663e0c8f..d0083934a66719e3c0210266bf4466cf39185272 100644 GIT binary patch delta 375 zcmdmWmVeh-{tcV9aJDcvGwU$6Ff(l4y=A&4>jW?}{N7|uunY$iP-eUTX=Y}|?REal z1yYmsF7Qk~r75z#O__0yIYRe#?Px}r_U*@87}52gXWqVRGouFM_NdK_7JdkQKwC?s zxAV&~Df7YYE|H!N6yToTb(l$HI$stu&vw39Oh-7jYprB7V8!mN>3p(GaCg;eZht(J zNuCc?X}0v_cQu^b>kl)1?n0G;_-%p)!c`#O09~9{%M5feUoCTo7^-8w@S>UkHd|z~ b)ddNtFF-*6G=OV4(17XtIvEo{Oc5~v8I5!! delta 354 zcmdmWmVeh-{tcV9a4Il2GcRChVP@I9d&_i9RtH8PbG!d(W@g6CQTHckaBg5}W?ljo ztoCCrmY%G4foJk5O_A+w%8YZ&5xTc)M>8U8KhL~fu8UEFar?eb#yKiTrf{!d0?O^$ z43dl5%xK|3p(Ga5vU!Zht(JNuCc$5zqzc%aHg$O_Mbdt^oN2=)$~OW}plCYMDF4Hd|eg YKyp#G^yGInBB*Zp!i!`e(1L7f08U+QOaK4? diff --git a/audio/lynx/tuning/fortemedia/HANDSET.mods b/audio/lynx/tuning/fortemedia/HANDSET.mods index 7351b6b..81cf001 100644 --- a/audio/lynx/tuning/fortemedia/HANDSET.mods +++ b/audio/lynx/tuning/fortemedia/HANDSET.mods @@ -1,12 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-09-12 17:24:50 +#SAVE_TIME 2022-09-22 17:52:28 #CASE_NAME HANDSET-HANDSET-RESERVE1-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -2675,8 +2675,8 @@ #CASE_NAME HANDSET-HANDSET-CUSTOM2-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -5345,8 +5345,8 @@ #CASE_NAME HANDSET-HANDSET-CUSTOM1-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -8015,8 +8015,8 @@ #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -10685,8 +10685,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -11587,9 +11587,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x00A0 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x012C //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0012 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -13355,8 +13355,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -14258,8 +14258,8 @@ 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 899 0x0384 //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +900 0x0190 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x000A //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -16025,8 +16025,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -16927,9 +16927,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x04B0 //TX_MICMUTE_RATIO_THR -900 0x01A4 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x0208 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -18695,8 +18695,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -21365,8 +21365,8 @@ #CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -22267,9 +22267,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x00A0 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x012C //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0012 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -24035,8 +24035,8 @@ #CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -24938,8 +24938,8 @@ 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 899 0x0384 //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +900 0x0190 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x000A //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -26705,8 +26705,8 @@ #CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -27607,9 +27607,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x04B0 //TX_MICMUTE_RATIO_THR -900 0x01A4 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x0208 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -29375,8 +29375,8 @@ #CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -32045,8 +32045,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -32947,9 +32947,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x00A0 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x012C //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0012 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -34715,8 +34715,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -35618,8 +35618,8 @@ 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 899 0x0384 //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +900 0x0190 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x000A //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -37385,8 +37385,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -38287,9 +38287,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x04B0 //TX_MICMUTE_RATIO_THR -900 0x01A4 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x0208 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -40055,8 +40055,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -42725,8 +42725,8 @@ #CASE_NAME HANDSET-HANDSET-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -43627,9 +43627,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x04B0 //TX_MICMUTE_RATIO_THR -900 0x01A4 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x0208 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -45395,8 +45395,8 @@ #CASE_NAME HANDSET-HANDSET-CUSTOM1-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -48065,8 +48065,8 @@ #CASE_NAME HANDSET-HANDSET-CUSTOM2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -50735,8 +50735,8 @@ #CASE_NAME HANDSET-HANDSET-RESERVE1-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -53405,8 +53405,8 @@ #CASE_NAME HANDSET-HANDSET_HAC-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -54307,9 +54307,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x04B0 //TX_MICMUTE_RATIO_THR -900 0x01A4 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x0208 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -56075,8 +56075,8 @@ #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -56977,9 +56977,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x00A0 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x012C //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0012 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -58743,2680 +58743,10 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG -3 0x2F7F //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0800 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x0200 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x0400 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x0400 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0260 //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x0100 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6978 //TX_DTD_THR1_0 -198 0x7D00 //TX_DTD_THR1_1 -199 0x7FC6 //TX_DTD_THR1_2 -200 0x7F00 //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7F00 //TX_DTD_THR1_5 -203 0x7F00 //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0000 //TX_RATIO_DT_L_TH_LOW -224 0x0000 //TX_RATIO_DT_H_TH_LOW -225 0x0000 //TX_RATIO_DT_L_TH_HIGH -226 0x0000 //TX_RATIO_DT_H_TH_HIGH -227 0x0000 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x0000 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF600 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFB00 //TX_THR_SN_EST_2 -245 0xF800 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x5000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x0000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x2000 //TX_MAINREFRTOH_TH_H -275 0x1400 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0000 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x4000 //TX_B_POST_FLT_1 -281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x001A //TX_NS_LVL_CTRL_4 -286 0x001E //TX_NS_LVL_CTRL_5 -287 0x001C //TX_NS_LVL_CTRL_6 -288 0x001C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0012 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0018 //TX_MIN_GAIN_S_4 -294 0x0018 //TX_MIN_GAIN_S_5 -295 0x0018 //TX_MIN_GAIN_S_6 -296 0x0018 //TX_MIN_GAIN_S_7 -297 0x5000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x5000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x4000 //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7000 //TX_A_POST_FILT_S_0 -315 0x3000 //TX_A_POST_FILT_S_1 -316 0x3000 //TX_A_POST_FILT_S_2 -317 0x2000 //TX_A_POST_FILT_S_3 -318 0x7000 //TX_A_POST_FILT_S_4 -319 0x7000 //TX_A_POST_FILT_S_5 -320 0x7000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x5000 //TX_B_POST_FILT_6 -329 0x4000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C29 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0600 //TX_A_PEPPER -349 0x1D4C //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x0139 //TX_NOISE_TH_1 -371 0x0479 //TX_NOISE_TH_2 -372 0x2328 //TX_NOISE_TH_3 -373 0x4422 //TX_NOISE_TH_4 -374 0x5586 //TX_NOISE_TH_5 -375 0x4425 //TX_NOISE_TH_5_2 -376 0x0032 //TX_NOISE_TH_5_3 -377 0x4E20 //TX_NOISE_TH_5_4 -378 0x21E8 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x6D60 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x3000 //TX_POST_MASK_SUP_HSNE -392 0x07D0 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0500 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4900 //TX_MIN_G_CTRL_SSNS -409 0x1000 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2800 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK -426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x05A8 //TX_SB_RHO_MEAN2_TH -441 0x0384 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x0001 //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x001E //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0280 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0200 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x0000 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0010 //TX_WIND_SUPRTO -540 0x0014 //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x3000 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0200 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 -569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x4245 //TX_FDEQ_GAIN_5 -573 0x4B53 //TX_FDEQ_GAIN_6 -574 0x564A //TX_FDEQ_GAIN_7 -575 0x3D3A //TX_FDEQ_GAIN_8 -576 0x3838 //TX_FDEQ_GAIN_9 -577 0x3836 //TX_FDEQ_GAIN_10 -578 0x3633 //TX_FDEQ_GAIN_11 -579 0x3838 //TX_FDEQ_GAIN_12 -580 0x4048 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0104 //TX_FDEQ_BIN_1 -593 0x0502 //TX_FDEQ_BIN_2 -594 0x0202 //TX_FDEQ_BIN_3 -595 0x0504 //TX_FDEQ_BIN_4 -596 0x0708 //TX_FDEQ_BIN_5 -597 0x0808 //TX_FDEQ_BIN_6 -598 0x050E //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 -601 0x0F0F //TX_FDEQ_BIN_10 -602 0x0F28 //TX_FDEQ_BIN_11 -603 0x0611 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x251A //TX_PREEQ_BIN_MIC0_0 -642 0x0F0F //TX_PREEQ_BIN_MIC0_1 -643 0x0C0C //TX_PREEQ_BIN_MIC0_2 -644 0x0C0F //TX_PREEQ_BIN_MIC0_3 -645 0x0F0F //TX_PREEQ_BIN_MIC0_4 -646 0x0F09 //TX_PREEQ_BIN_MIC0_5 -647 0x0909 //TX_PREEQ_BIN_MIC0_6 -648 0x0908 //TX_PREEQ_BIN_MIC0_7 -649 0x0700 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 -676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 -677 0x5052 //TX_PREEQ_GAIN_MIC1_11 -678 0x5454 //TX_PREEQ_GAIN_MIC1_12 -679 0x5454 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1104 //TX_PREEQ_BIN_MIC1_12 -703 0x101B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0005 //TX_GAIN_LIMIT_2 -776 0x0007 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0002 //TX_TDDRC_THRD_0 -855 0x0003 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x7FFF //TX_TDDRC_SLANT_0 -859 0x7FFF //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x199A //TX_TFMASKLTH_BINVAD -873 0xFCCD //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x2000 //TX_B_LESSCUT_RTO_MASK -877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2329 //TX_SENDFUNC_REG_MICMUTE -898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0384 //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FC6 //TX_DTD_THR1_MICMUTE_0 -912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x2000 //TX_DTD_THR2_MICMUTE_0 -916 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0100 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x3E80 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x012C //TX_MIC1MUTE_RATIO_THR -940 0x0190 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x05A0 //TX_AMS_RESRV_01 -944 0xFFFF //TX_AMS_RESRV_02 -945 0x7FDC //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x243C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0480 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x1000 //RX_LMT_THRD -37 0x7FDF //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 -47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 -51 0x7068 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x1450 //RX_TPKA_FP -127 0x0400 //RX_MIN_G_FP -128 0x0700 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AD //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 -44 0x9C96 //RX_FDEQ_GAIN_5 -45 0x908E //RX_FDEQ_GAIN_6 -46 0x9296 //RX_FDEQ_GAIN_7 -47 0x949C //RX_FDEQ_GAIN_8 -48 0xA4B4 //RX_FDEQ_GAIN_9 -49 0xA298 //RX_FDEQ_GAIN_10 -50 0x848C //RX_FDEQ_GAIN_11 -51 0x7868 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D16 //RX_FDEQ_BIN_9 -73 0x0A07 //RX_FDEQ_BIN_10 -74 0x130E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AD //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 -44 0x9C96 //RX_FDEQ_GAIN_5 -45 0x908E //RX_FDEQ_GAIN_6 -46 0x9296 //RX_FDEQ_GAIN_7 -47 0x949C //RX_FDEQ_GAIN_8 -48 0xA4B4 //RX_FDEQ_GAIN_9 -49 0xA298 //RX_FDEQ_GAIN_10 -50 0x848C //RX_FDEQ_GAIN_11 -51 0x7868 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D16 //RX_FDEQ_BIN_9 -73 0x0A07 //RX_FDEQ_BIN_10 -74 0x130E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0017 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AD //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 -44 0x9C96 //RX_FDEQ_GAIN_5 -45 0x908E //RX_FDEQ_GAIN_6 -46 0x9296 //RX_FDEQ_GAIN_7 -47 0x949C //RX_FDEQ_GAIN_8 -48 0xA4B4 //RX_FDEQ_GAIN_9 -49 0xA298 //RX_FDEQ_GAIN_10 -50 0x848C //RX_FDEQ_GAIN_11 -51 0x7868 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D16 //RX_FDEQ_BIN_9 -73 0x0A07 //RX_FDEQ_BIN_10 -74 0x130E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0025 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AD //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 -44 0x9C96 //RX_FDEQ_GAIN_5 -45 0x908E //RX_FDEQ_GAIN_6 -46 0x9296 //RX_FDEQ_GAIN_7 -47 0x949C //RX_FDEQ_GAIN_8 -48 0xA4B4 //RX_FDEQ_GAIN_9 -49 0xA298 //RX_FDEQ_GAIN_10 -50 0x848C //RX_FDEQ_GAIN_11 -51 0x7868 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D16 //RX_FDEQ_BIN_9 -73 0x0A07 //RX_FDEQ_BIN_10 -74 0x130E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AD //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 -44 0x9C96 //RX_FDEQ_GAIN_5 -45 0x908E //RX_FDEQ_GAIN_6 -46 0x9296 //RX_FDEQ_GAIN_7 -47 0x949C //RX_FDEQ_GAIN_8 -48 0xA4B4 //RX_FDEQ_GAIN_9 -49 0xA298 //RX_FDEQ_GAIN_10 -50 0x848C //RX_FDEQ_GAIN_11 -51 0x7868 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D16 //RX_FDEQ_BIN_9 -73 0x0A07 //RX_FDEQ_BIN_10 -74 0x130E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AD //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 -44 0x9C96 //RX_FDEQ_GAIN_5 -45 0x908E //RX_FDEQ_GAIN_6 -46 0x9296 //RX_FDEQ_GAIN_7 -47 0x949C //RX_FDEQ_GAIN_8 -48 0xA4B4 //RX_FDEQ_GAIN_9 -49 0xA298 //RX_FDEQ_GAIN_10 -50 0x848C //RX_FDEQ_GAIN_11 -51 0x7868 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D16 //RX_FDEQ_BIN_9 -73 0x0A07 //RX_FDEQ_BIN_10 -74 0x130E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0094 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AD //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 -44 0x9C96 //RX_FDEQ_GAIN_5 -45 0x908E //RX_FDEQ_GAIN_6 -46 0x9296 //RX_FDEQ_GAIN_7 -47 0x949C //RX_FDEQ_GAIN_8 -48 0xA4B4 //RX_FDEQ_GAIN_9 -49 0xA298 //RX_FDEQ_GAIN_10 -50 0x848C //RX_FDEQ_GAIN_11 -51 0x7868 //RX_FDEQ_GAIN_12 -52 0x6050 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D16 //RX_FDEQ_BIN_9 -73 0x0A07 //RX_FDEQ_BIN_10 -74 0x130E //RX_FDEQ_BIN_11 -75 0x100D //RX_FDEQ_BIN_12 -76 0x110A //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x003C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0600 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0014 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x1000 //RX_LMT_THRD -194 0x7FDF //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x13E0 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0012 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001E //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0031 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0050 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0086 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7000 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04E6 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4840 //RX_FDEQ_GAIN_0 -197 0x4040 //RX_FDEQ_GAIN_1 -198 0x4659 //RX_FDEQ_GAIN_2 -199 0x6474 //RX_FDEQ_GAIN_3 -200 0x7A82 //RX_FDEQ_GAIN_4 -201 0x8180 //RX_FDEQ_GAIN_5 -202 0x8084 //RX_FDEQ_GAIN_6 -203 0x8A88 //RX_FDEQ_GAIN_7 -204 0x8C8C //RX_FDEQ_GAIN_8 -205 0x8A95 //RX_FDEQ_GAIN_9 -206 0x978E //RX_FDEQ_GAIN_10 -207 0x8C8C //RX_FDEQ_GAIN_11 -208 0x7068 //RX_FDEQ_GAIN_12 -209 0x6050 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F0E //RX_FDEQ_BIN_11 -232 0x100D //RX_FDEQ_BIN_12 -233 0x110A //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -62317,9 +59647,9 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x04B0 //TX_MICMUTE_RATIO_THR -900 0x01A4 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x0208 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME @@ -64083,3 +61413,2673 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 +#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x2F7F //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x0100 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x6978 //TX_DTD_THR1_0 +198 0x7D00 //TX_DTD_THR1_1 +199 0x7FC6 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7FFF //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x2000 //TX_MAINREFRTOH_TH_H +275 0x1400 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0018 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 +288 0x001C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0018 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x4000 //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7000 //TX_A_POST_FILT_S_0 +315 0x3000 //TX_A_POST_FILT_S_1 +316 0x3000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 +319 0x7000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x5000 //TX_B_POST_FILT_6 +329 0x4000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C29 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0600 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0139 //TX_NOISE_TH_1 +371 0x0479 //TX_NOISE_TH_2 +372 0x2328 //TX_NOISE_TH_3 +373 0x4422 //TX_NOISE_TH_4 +374 0x5586 //TX_NOISE_TH_5 +375 0x4425 //TX_NOISE_TH_5_2 +376 0x0032 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x21E8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0500 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x1000 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x05A8 //TX_SB_RHO_MEAN2_TH +441 0x0384 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0280 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0200 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3836 //TX_FDEQ_GAIN_10 +578 0x3633 //TX_FDEQ_GAIN_11 +579 0x3838 //TX_FDEQ_GAIN_12 +580 0x4048 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0F0F //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x0611 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x0700 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x484A //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5454 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1104 //TX_PREEQ_BIN_MIC1_12 +703 0x101B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0005 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x199A //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x2000 //TX_B_LESSCUT_RTO_MASK +877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2329 //TX_SENDFUNC_REG_MICMUTE +898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x0190 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x000A //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0028 //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7FC6 //TX_DTD_THR1_MICMUTE_0 +912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x2000 //TX_DTD_THR2_MICMUTE_0 +916 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x7FFF //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0100 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x3E80 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x012C //TX_MIC1MUTE_RATIO_THR +940 0x0190 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x05A0 //TX_AMS_RESRV_01 +944 0xFFFF //TX_AMS_RESRV_02 +945 0x7FDC //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x243C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0480 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0006 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7CCD //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x1000 //RX_LMT_THRD +37 0x7FDF //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x1450 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0700 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03AD //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x3C3C //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4856 //RX_FDEQ_GAIN_2 +42 0x687E //RX_FDEQ_GAIN_3 +43 0x8E9A //RX_FDEQ_GAIN_4 +44 0x9C96 //RX_FDEQ_GAIN_5 +45 0x908E //RX_FDEQ_GAIN_6 +46 0x9296 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0xA4B4 //RX_FDEQ_GAIN_9 +49 0xA298 //RX_FDEQ_GAIN_10 +50 0x848C //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D16 //RX_FDEQ_BIN_9 +73 0x0A07 //RX_FDEQ_BIN_10 +74 0x130E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03AD //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x3C3C //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4856 //RX_FDEQ_GAIN_2 +42 0x687E //RX_FDEQ_GAIN_3 +43 0x8E9A //RX_FDEQ_GAIN_4 +44 0x9C96 //RX_FDEQ_GAIN_5 +45 0x908E //RX_FDEQ_GAIN_6 +46 0x9296 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0xA4B4 //RX_FDEQ_GAIN_9 +49 0xA298 //RX_FDEQ_GAIN_10 +50 0x848C //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D16 //RX_FDEQ_BIN_9 +73 0x0A07 //RX_FDEQ_BIN_10 +74 0x130E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0017 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03AD //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x3C3C //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4856 //RX_FDEQ_GAIN_2 +42 0x687E //RX_FDEQ_GAIN_3 +43 0x8E9A //RX_FDEQ_GAIN_4 +44 0x9C96 //RX_FDEQ_GAIN_5 +45 0x908E //RX_FDEQ_GAIN_6 +46 0x9296 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0xA4B4 //RX_FDEQ_GAIN_9 +49 0xA298 //RX_FDEQ_GAIN_10 +50 0x848C //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D16 //RX_FDEQ_BIN_9 +73 0x0A07 //RX_FDEQ_BIN_10 +74 0x130E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03AD //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x3C3C //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4856 //RX_FDEQ_GAIN_2 +42 0x687E //RX_FDEQ_GAIN_3 +43 0x8E9A //RX_FDEQ_GAIN_4 +44 0x9C96 //RX_FDEQ_GAIN_5 +45 0x908E //RX_FDEQ_GAIN_6 +46 0x9296 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0xA4B4 //RX_FDEQ_GAIN_9 +49 0xA298 //RX_FDEQ_GAIN_10 +50 0x848C //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D16 //RX_FDEQ_BIN_9 +73 0x0A07 //RX_FDEQ_BIN_10 +74 0x130E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03AD //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x3C3C //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4856 //RX_FDEQ_GAIN_2 +42 0x687E //RX_FDEQ_GAIN_3 +43 0x8E9A //RX_FDEQ_GAIN_4 +44 0x9C96 //RX_FDEQ_GAIN_5 +45 0x908E //RX_FDEQ_GAIN_6 +46 0x9296 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0xA4B4 //RX_FDEQ_GAIN_9 +49 0xA298 //RX_FDEQ_GAIN_10 +50 0x848C //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D16 //RX_FDEQ_BIN_9 +73 0x0A07 //RX_FDEQ_BIN_10 +74 0x130E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03AD //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x3C3C //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4856 //RX_FDEQ_GAIN_2 +42 0x687E //RX_FDEQ_GAIN_3 +43 0x8E9A //RX_FDEQ_GAIN_4 +44 0x9C96 //RX_FDEQ_GAIN_5 +45 0x908E //RX_FDEQ_GAIN_6 +46 0x9296 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0xA4B4 //RX_FDEQ_GAIN_9 +49 0xA298 //RX_FDEQ_GAIN_10 +50 0x848C //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D16 //RX_FDEQ_BIN_9 +73 0x0A07 //RX_FDEQ_BIN_10 +74 0x130E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0094 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03AD //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x3C3C //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4856 //RX_FDEQ_GAIN_2 +42 0x687E //RX_FDEQ_GAIN_3 +43 0x8E9A //RX_FDEQ_GAIN_4 +44 0x9C96 //RX_FDEQ_GAIN_5 +45 0x908E //RX_FDEQ_GAIN_6 +46 0x9296 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0xA4B4 //RX_FDEQ_GAIN_9 +49 0xA298 //RX_FDEQ_GAIN_10 +50 0x848C //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D16 //RX_FDEQ_BIN_9 +73 0x0A07 //RX_FDEQ_BIN_10 +74 0x130E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0031 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + diff --git a/audio/lynx/tuning/fortemedia/HANDSFREE.dat b/audio/lynx/tuning/fortemedia/HANDSFREE.dat index 187e010984b138aa1ce2f2ba4b39f4f5e0fbb0e4..8e3ab285d193e5692402576bbab4f5eb07251081 100644 GIT binary patch delta 455 zcmX>%nf=^k_6WM1oGBPOW0kJ+KgM$GO8v@zW9|STgi7_}>1Nk;UY|Hq+ z-VTWEf$Yf-{+;9EF(_daP%i}vZT}F&XvD$V!raWfWczz|Mh-?smhA>HjQ<#!7zDN( z#4%cP0|hSFLj^84G8%JFjt=IYzN(B-WP6)3}! z^ilyX2m-(ZwAoZ(3s$mP`@$ZZrlQ)EmPrv`2k)Kg?`up#UK8z~UZGJGCGYU*E`N4QjN|_;_ z@qc{*5En9DU@u~P%UsO(MyG@^!)bfWPsZEq(>Iqh3r{}Rr8%8nn@OHkfw`GEW&3nS zCIS^nf3X^3%DMn6#Px*H14fWeT6(uf!BBroddp zXut$9yTPs$XkQr+Z&PN{<6zprvfV(N$yq@XW}*VbL2}MHv}@z z(gZT50~zPGzp7?FqX81WBf^#^G5uX8GtYLTz06N_X%lA8zc5od%o^laXccDd@*XVP sg8%>k delta 657 zcmey>AoZ(3s$mP`@$Zv`^(3a>|IWzIC_erDcSavZf$26s7|j_KrkDI+JU6|{he?3z zEpsvB1HBSPjnM5eKN)YcPw!`EG?{K+$D};HkCBOkF<|?2MkWV^>HMWkJEr$5F-42j zF%~fzFcmXSGAUtH@GE895n9Ih%yXMElO6}t0p{%n+Dy)1<@{U>4u*^j4n{yc{evQt zl+^!vE5`rz)bmUW+jXQ>ZOctbhgj%VKU-iRbXyrKD7OO z2-EsMOaa{68v>bUX#yG3fsAw8UsW@o(EthG5n;=dnEo!4nP2&3krK`1||pN_Us(ie5vh1w^&bDK||17ma5hO9bYcJ{aF~> G6iom-W!t>~ diff --git a/audio/lynx/tuning/fortemedia/HEADSET.mods b/audio/lynx/tuning/fortemedia/HEADSET.mods index 5d3fba7..4e22707 100644 --- a/audio/lynx/tuning/fortemedia/HEADSET.mods +++ b/audio/lynx/tuning/fortemedia/HEADSET.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HEADSET #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-08-19 11:54:40 +#SAVE_TIME 2022-09-27 16:34:30 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_MODE FULL @@ -32320,7 +32320,7 @@ 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH +272 0x0800 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L @@ -32330,7 +32330,7 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0017 //TX_NS_LVL_CTRL_1 +282 0x0015 //TX_NS_LVL_CTRL_1 283 0x0015 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 @@ -32349,7 +32349,7 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1000 //TX_SNRI_SUP_1 +301 0x2400 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x2400 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 @@ -32363,7 +32363,7 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x2000 //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x1000 //TX_A_POST_FILT_S_3 318 0x3000 //TX_A_POST_FILT_S_4 @@ -32415,13 +32415,13 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0023 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 +372 0x2CEC //TX_NOISE_TH_3 +373 0x4268 //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 @@ -32924,7 +32924,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -32939,7 +32939,7 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -32948,7 +32948,7 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x0050 //TX_MICMUTE_AMP_THR +900 0x0064 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x000C //TX_MICMUTE_CVG_TIME @@ -35019,12 +35019,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x1000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -35043,7 +35043,7 @@ 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 +325 0x7FFF //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -35088,12 +35088,12 @@ 367 0x0032 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 +370 0x0320 //TX_NOISE_TH_1 371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 +372 0x2CEC //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 @@ -35617,7 +35617,7 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x03C0 //TX_MICMUTE_RATIO_THR +899 0x04B0 //TX_MICMUTE_RATIO_THR 900 0x0122 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH @@ -37689,12 +37689,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -37703,12 +37703,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 @@ -37760,9 +37760,9 @@ 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 @@ -38287,8 +38287,8 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x01C2 //TX_MICMUTE_AMP_THR +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x01A4 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME @@ -54499,7 +54499,7 @@ 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP -128 0x0B50 //RX_MAX_G_FP +128 0x1000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG @@ -57169,7 +57169,7 @@ 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP -128 0x0B50 //RX_MAX_G_FP +128 0x1000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG @@ -59839,7 +59839,7 @@ 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP -128 0x0B50 //RX_MAX_G_FP +128 0x1000 //RX_MAX_G_FP 129 0x0058 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG @@ -64360,7 +64360,7 @@ 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH +272 0x0800 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L @@ -64370,7 +64370,7 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0017 //TX_NS_LVL_CTRL_1 +282 0x0015 //TX_NS_LVL_CTRL_1 283 0x0015 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 @@ -64389,7 +64389,7 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1000 //TX_SNRI_SUP_1 +301 0x2400 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x2400 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 @@ -64403,7 +64403,7 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x2000 //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x1000 //TX_A_POST_FILT_S_3 318 0x3000 //TX_A_POST_FILT_S_4 @@ -64455,13 +64455,13 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0023 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 +372 0x2CEC //TX_NOISE_TH_3 +373 0x4268 //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 @@ -64964,7 +64964,7 @@ 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK +876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 @@ -64979,7 +64979,7 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -64988,7 +64988,7 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x0050 //TX_MICMUTE_AMP_THR +900 0x0064 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x000C //TX_MICMUTE_CVG_TIME @@ -67059,12 +67059,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x1000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -67083,7 +67083,7 @@ 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 +325 0x7FFF //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -67128,12 +67128,12 @@ 367 0x0032 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 +370 0x0320 //TX_NOISE_TH_1 371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 +372 0x2CEC //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 @@ -67657,7 +67657,7 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x03C0 //TX_MICMUTE_RATIO_THR +899 0x04B0 //TX_MICMUTE_RATIO_THR 900 0x0122 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH @@ -69729,12 +69729,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -69743,12 +69743,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 @@ -69800,9 +69800,9 @@ 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 @@ -70327,8 +70327,8 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x01C2 //TX_MICMUTE_AMP_THR +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x01A4 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME @@ -93759,12 +93759,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -93773,12 +93773,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 @@ -93830,9 +93830,9 @@ 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 @@ -94357,8 +94357,8 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x01C2 //TX_MICMUTE_AMP_THR +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x01A4 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME @@ -99889,7 +99889,7 @@ 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP -128 0x0B50 //RX_MAX_G_FP +128 0x1000 //RX_MAX_G_FP 129 0x0058 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG @@ -101464,7 +101464,7 @@ 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-RESERVE2-SWB -#PARAM_MODE Full +#PARAM_MODE FULL #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX @@ -101769,12 +101769,12 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -101783,12 +101783,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x7FFF //TX_A_POST_FILT_S_2 -317 0x7FFF //TX_A_POST_FILT_S_3 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 @@ -101840,9 +101840,9 @@ 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 +372 0x300C //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 +374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 @@ -102367,8 +102367,8 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x01C2 //TX_MICMUTE_AMP_THR +899 0x0384 //TX_MICMUTE_RATIO_THR +900 0x01A4 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME From f6d4e039c9ad85db613c6b6392cddb240f34108c Mon Sep 17 00:00:00 2001 From: Junkyu Kang Date: Wed, 5 Oct 2022 06:46:20 +0000 Subject: [PATCH 061/124] Revert "Remove carrier location permission backdoor" Revert submission 18558007 Bug: 246686326 Reason for revert: TMOUS AGPS test issue Reverted Changes: I70a7439ac:Remove carrier location permission backdoor I6c038cb0f:Remove carrier location permission backdoor Change-Id: I80366cbd04b4845456d1ed8987bfc6bbfc678be1 --- location/gps.xml.l10 | 2 ++ location/gps_user.xml.l10 | 2 ++ 2 files changed, 4 insertions(+) diff --git a/location/gps.xml.l10 b/location/gps.xml.l10 index 0400cef..c243cd3 100644 --- a/location/gps.xml.l10 +++ b/location/gps.xml.l10 @@ -53,6 +53,8 @@ CpLppGuardTimeSec="1" IgnoreInjectedSystemTime="true" + AttributionAppPkgName="com.google.android.carrierlocation" + AssertEnabled="true" CpLppeCancelDbhOnAgnssProvideLoc="true" CpLppeUseAgnssLocForEmptyDbh="true" diff --git a/location/gps_user.xml.l10 b/location/gps_user.xml.l10 index c347740..8eba118 100644 --- a/location/gps_user.xml.l10 +++ b/location/gps_user.xml.l10 @@ -52,6 +52,8 @@ CpLppGuardTimeSec="1" IgnoreInjectedSystemTime="true" + AttributionAppPkgName="com.google.android.carrierlocation" + AssertEnabled="false" CpLppeCancelDbhOnAgnssProvideLoc="true" CpLppeUseAgnssLocForEmptyDbh="true" From 40311cd79675ee42f75bb066b92b6bbae6bc8b9f Mon Sep 17 00:00:00 2001 From: Beverly Date: Thu, 6 Oct 2022 16:12:32 +0000 Subject: [PATCH 062/124] Add config for the quick pickup gesture Test: manually check that quick pickup gesture is registered on device and triggers when AoD is not enabled and when udfps is enrolled Fixes: 239514824 Change-Id: I1071898296d959b46ae4269715e6a1b36cc95cc3 --- lynx/overlay/frameworks/base/core/res/res/values/config.xml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml index 1e045af..c1836c7 100644 --- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml +++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml @@ -253,6 +253,9 @@ com.google.sensor.long_press + + com.google.sensor.quick_pickup + false From 9503739f72dcbe65cf2b34c9c221fc6dbb0b3132 Mon Sep 17 00:00:00 2001 From: Amy Hsu Date: Fri, 30 Sep 2022 09:43:33 +0000 Subject: [PATCH 063/124] display : update display_colordata_dev_cal0.pb file For LHBM compensation on EVT1.1 Bug: 242503248 Test: HW to check the compensation Signed-off-by: Amy Hsu Change-Id: I3e407984e1c4adb5d8fa6d087fa4c1c0485a7e85 --- lynx/display_colordata_dev_cal0.pb | Bin 552 -> 1864 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/lynx/display_colordata_dev_cal0.pb b/lynx/display_colordata_dev_cal0.pb index f16431b840400b727bc0bf456d4cc25eb76ad905..9a4f5ae7681d90be1306d0807b4762aa023355f1 100644 GIT binary patch literal 1864 zcmd7St&iGp9LMpM(g#YPAD|Qp%}GMCqj#_ewe1gBW@hHNJMMDH?QVfhocoE2W;wx< z2?PQ`vSvfDtfB%@fvBiBfj}S-Cn_o`5EY0u*u!(~Bj3p@-!Jh2hge91s!X@_x%=(< zqSkG;kIqjUI{m6uKReX*WBpujp0!^eT(qy-oz~a(nRarkon3anT(xes)0?ZCj&^l< z(rI;W-@)&nzdcZ^82*Xgz3#kqJV`I4EN<;=XBH{_`d3bVqd;3-DYDQ=2Rsi%6XQFhCq;#D>k zpz%*BMtMpx)qgO7>AGHPH1%C-Av8$^DGOe~{q!n5L?UE}2B?Jv*bonJD{-@k6=7w= ztVIT-MFo^ahxC{U7>fAM>`b7924YEh&_&T$mf>AM%zQ$fLrtFj7`Zzql-d zl3N0*tAeeYyGw1KF^|;t8B?`k0&g^rYW3sB;Vw2Gx=Z<~JJ^Gbw3`NqivZL`0p?-= zcX5z$Gf~DSV#3MBS({vw6Dp!6^qRJrh#9jHJLV#8!bkjA2!*luAdaL5X_Q-S;YRXG z9wu;oWvL7kxL#>q>Z=QNP+pb?yV&*_^N4MqG23IS>o04%Uf-qWLW{)APs}EXnS+?< z6g4pqGjV%sw$3<2L`<_L>5(z%P=KD%1~X+0)?s7TM8 nWJiu=r?4)}lvuHgaq=QJC0kvqPB|)1D)BD0ea1Xe+h@#w&x@R~ literal 552 zcmd7MyH3JT00v-B%cYb{OSzSDJ7H`{#8NOisSjXWT-*vRgoKM}bzu7k2jZk};AWz$ z5AcsXmd2-G`^Hbd(}XFcaE&BbC(oP3Aels?`E2BsE`qag=y|?3_aI;TqcjJU?*qW)i#!^Q?YREAMojUT&qrd`+ zETY5`3>q+LqRcWZTBxvsDyyimhC1tLumPJknry Date: Thu, 22 Sep 2022 06:30:22 +0000 Subject: [PATCH 064/124] Change config path for LE Audio Capabilities file Since there is no different setting for sub project under same prohject, we will change the setting file from `bluetooth/project/` to `bluetooth/` to simplify the file structure. Bug: 238983662 Test: make sure file added in config folder can be copied into devices Change-Id: Icf39d92526713df717c73acffbaee541058a3fd2 --- bluetooth/{lynx => }/le_audio_codec_capabilities.xml | 0 bluetooth/qti_default.mk | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename bluetooth/{lynx => }/le_audio_codec_capabilities.xml (100%) diff --git a/bluetooth/lynx/le_audio_codec_capabilities.xml b/bluetooth/le_audio_codec_capabilities.xml similarity index 100% rename from bluetooth/lynx/le_audio_codec_capabilities.xml rename to bluetooth/le_audio_codec_capabilities.xml diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk index 5c33b60..ad2eafa 100644 --- a/bluetooth/qti_default.mk +++ b/bluetooth/qti_default.mk @@ -44,7 +44,7 @@ PRODUCT_PRODUCT_PROPERTIES += \ # LE Auido Offload Capabilities setting PRODUCT_COPY_FILES += \ - device/google/lynx/bluetooth/lynx/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml + device/google/lynx/bluetooth/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml # Bluetooth HAL and Pixel extension DEVICE_MANIFEST_FILE += \ From 506f36f4cda6cf26c5017b5ebbd38b41200795ce Mon Sep 17 00:00:00 2001 From: Gil Date: Sat, 1 Oct 2022 16:39:52 +0800 Subject: [PATCH 065/124] display: add blocking zone zone1 condition(10 nits) in 90Hz zone2 condition(15 nits, 5 Lux) in 90Hz fix hbm hdr at 60 hz Bug: 243757430 Bug: 246905529 Test: Check the refresh rata at zone Change-Id: Iee9bd842571165785c03ae761780371798fbb758 --- .../base/core/res/res/values/config.xml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml index c1836c7..6aac780 100644 --- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml +++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml @@ -66,6 +66,24 @@ @left + + + + 3 + + 4 + + + -1 + 5 + + + 90 + + + 60 + {EW zjO|2iKlA^3ps8kz8z!&kGiHe*N385(4Vk%~MEaba}8g9R8yUb<{Vh0%7P@@rDl&uwGj*>2a% d0t}63VQf=0r=L5?D6*Z;mk}s%tBrMvCIA=hybk~X delta 736 zcmcIiJ4gdT5Z&F`3sKKAg@_zzL?n0+EEFPGgdifZ3yOA%LQu3y8o?$J6Myk{7-0(y zDU=|nF%WRDGH7L^=`3t4RIsrTEYj$n;-?IV#mvAkGjHa-Db4DoSv|Lz$+s0l8Ic8> zy4zK(z`0W;m=an8Q*p|{>orf1#DSA}D3AqE$s*Xv5)f?}2uVOASpk1|72cw2($>L@ zY{+QJm<+76(?arC>(Jfw0NnIYHXcdK0-?vSf1i_u7&ueT^$##nngkV}FR5K~<#-I5 z=?|*?3$^+Om5d6XpF63VER4D6odsm`NFbAnf}fA0_elwTPR7U!t=056#9;5&(8{l& z4p9vA1ZyWEG{`0}%~(~Bh+Hr=-&K6DW9JNuro^+g-G~o@860u&mVaeMG(}lICY;=C z{Ua49sd#NI^Yn4N>b5wO_o?Vz Date: Mon, 31 Oct 2022 11:19:27 +0800 Subject: [PATCH 079/124] Increase MIF frequency for 30fps This CL increases min MIF frequency to 1352000 in 30fps mode. Although the MIF power consumption increases due to this change, but the reduction in CPU cycles results in over-all SoC power saving. This change also doesn't negatively impact framedrop rate. P22 change is ag/19820773. Bug: 256564865 Test: Build pass, GCA, Camera power and performance evaluation Change-Id: Iacf9172f0ce9edeecb14d38edc3c1466e7e4c7fe --- powerhint.json | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/powerhint.json b/powerhint.json index fee1e35..d66c9eb 100644 --- a/powerhint.json +++ b/powerhint.json @@ -6,6 +6,7 @@ "Values": [ "3172000", "1539000", + "1352000", "1014000", "421000" ], @@ -1026,7 +1027,7 @@ "PowerHint": "CAMERA_STREAMING_STANDARD", "Node": "MemFreq", "Duration": 0, - "Value": "1014000" + "Value": "1352000" }, { "PowerHint": "CAMERA_STREAMING_STANDARD", From a4874746081fe61df75071fa75a68a509798ab56 Mon Sep 17 00:00:00 2001 From: Jasmine Cha Date: Tue, 1 Nov 2022 13:54:55 +0800 Subject: [PATCH 080/124] audio: enable BAACL Bug: 256749917 Test: emul_temp adb shell "echo 10000 > /dev/thermal/tz-by-name/battery/emul_temp" && adb shell "echo 80 > /dev/thermal/tz-by-name/soc/emul_temp" adb shell "echo 10000 > /dev/thermal/tz-by-name/battery/emul_temp" && adb shell "echo 70 > /dev/thermal/tz-by-name/soc/emul_temp" Change-Id: I5cc3e42d4715ee6c5b9b5d453a74425b3cb85f57 Signed-off-by: Jasmine Cha --- audio/lynx/tuning/waves/waves_config.ini | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/audio/lynx/tuning/waves/waves_config.ini b/audio/lynx/tuning/waves/waves_config.ini index ba12a8e..7c520b9 100644 --- a/audio/lynx/tuning/waves/waves_config.ini +++ b/audio/lynx/tuning/waves/waves_config.ini @@ -5,7 +5,7 @@ # Putting any value other than 1 would be equivalent to not supported. ######################################################################################################## [HAL_SUPPORTED_FEATURES] -CUSTOM_ACTION_256=1 +CUSTOM_ACTION_258=1 ######################################################################################################## # This defined the options of supported sample rates. @@ -26,10 +26,10 @@ OST_SPEAKER = 0:12,90:13,180:12,270:0|13 # This should be configured by Waves only unless platform vendor is familiar with MPS structure. ######################################################################################################## [HAL_SUPPORTED_PRESETS] +SPEAKER_MUSIC_THROTTLE= OM:1,SM:3,OST:OST_SPEAKER +SPEAKER_SAFE_MUSIC_THROTTLE = OM:10,SM:3,OST:OST_SPEAKER SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER -SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER -HEADSET_MUSIC = OM:2,SM:2 ######################################################################################################## # This defines available CONTROL configurations. Only define the CONTROL if you need it. @@ -37,9 +37,7 @@ HEADSET_MUSIC = OM:2,SM:2 # This can be configured by Waves or platform vendor. ######################################################################################################## [HAL_SUPPORTED_CONTROLS] -SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL -A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC -USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC +SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_MUSIC_THROTTLE|SPEAKER_SAFE_MUSIC_THROTTLE [COEFS_CONVERTER_SETTING] AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so @@ -52,7 +50,12 @@ AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so #AudioFormatSampleSize=4 #AudioFormatIncrement=8 -[CUSTOM_ACTION_256] -CASE_1=PRIORITY:0,NUMBERS:2:0|1,PRESET:SPEAKER_MUSIC -CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4,PRESET:SPEAKER_SAFE_CALL -CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1,PRESET:SPEAKER_SAFE_MUSIC +[CUSTOM_ACTION_258] +CASE_1=PRIORITY:0,NUMBERS:2:0|1:1|2,PRESET:SPEAKER_MUSIC +CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:1|2,PRESET:SPEAKER_SAFE_MUSIC +CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1:1|2,PRESET:SPEAKER_SAFE_MUSIC +CASE_4=PRIORITY:3,NUMBERS:2:0|1:0,PRESET:SPEAKER_MUSIC_THROTTLE +CASE_5=PRIORITY:4,NUMBERS:1|2|4194304:2|3|4:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE +CASE_6=PRIORITY:5,NUMBERS:1|4194304:0|1:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE +# Action 258 parameters: audio_devices_t, audio_mode_t, throttle_control_state_t +# - throttle_control_state_t: 0 - Enabled, 1 - Disabled, 2 - Bypassed \ No newline at end of file From b05312f680963eab33a4b20e84043cb7c0f3894c Mon Sep 17 00:00:00 2001 From: Rick Yiu Date: Tue, 13 Sep 2022 07:13:32 +0000 Subject: [PATCH 081/124] Limit camera daemon cpuset to little cores when app launch When exiting camera app, camera daemon is still busy in background, which may affect the launch animation of launcher. So, limit the cpuset of camera daemon to little cores for 1 second when there is app launch hint to improve it. This only happens when camera is running. Also bypass this behavior when video recording is active. Bug: 240889279 Test: camera daemon cpuset changed as expected Change-Id: I130b1e4718f8e5ef47ad761a2a73d86697d0f8bc --- powerhint.json | 106 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) diff --git a/powerhint.json b/powerhint.json index d66c9eb..272b1a4 100644 --- a/powerhint.json +++ b/powerhint.json @@ -214,6 +214,7 @@ "Name": "CDCpuset", "Path": "/dev/cpuset/camera-daemon/cpus", "Values": [ + "0-3", "4-7", "0-7" ], @@ -223,6 +224,7 @@ "Name": "CDHighCpusetCpus", "Path": "/dev/cpuset/camera-daemon-high-group/cpus", "Values": [ + "0-3", "6-7", "0-7" ], @@ -232,6 +234,7 @@ "Name": "CDMidCpusetCpus", "Path": "/dev/cpuset/camera-daemon-mid-group/cpus", "Values": [ + "0-3", "4-5", "0-7" ], @@ -241,6 +244,7 @@ "Name": "CDMidHighCpusetCpus", "Path": "/dev/cpuset/camera-daemon-mid-high-group/cpus", "Values": [ + "0-3", "4-7", "0-7" ], @@ -319,6 +323,16 @@ ], "Type": "Property" }, + { + "Name": "PowerHALCameraRunning", + "Path": "vendor.powerhal.camerarunning", + "Values": [ + "1", + "0" + ], + "Type": "Property", + "ResetOnInit": true + }, { "Name": "INTCAMFreq", "Path": "/sys/devices/platform/17000030.devfreq_intcam/devfreq/17000030.devfreq_intcam/min_freq", @@ -513,6 +527,30 @@ } ], "Actions": [ + { + "PowerHint": "CDCPUSET_RESTRICTED", + "Node": "CDCpuset", + "Duration": 1000, + "Value": "0-3" + }, + { + "PowerHint": "CDHIGHCPUSETCPUS_RESTRICTED", + "Node": "CDHighCpusetCpus", + "Duration": 1000, + "Value": "0-3" + }, + { + "PowerHint": "CDMIDCPUSETCPUS_RESTRICTED", + "Node": "CDMidCpusetCpus", + "Duration": 1000, + "Value": "0-3" + }, + { + "PowerHint": "CDMIDHIGHCPUSETCPUS_RESTRICTED", + "Node": "CDMidHighCpusetCpus", + "Duration": 1000, + "Value": "0-3" + }, { "PowerHint": "LAUNCH", "Node": "UClampThreshold", @@ -573,6 +611,30 @@ "Duration": 5000, "Value": "0" }, + { + "PowerHint": "LAUNCH", + "Type": "DoHint", + "EnableProperty": "vendor.powerhal.camerarunning", + "Value": "CDCPUSET_RESTRICTED" + }, + { + "PowerHint": "LAUNCH", + "Type": "DoHint", + "EnableProperty": "vendor.powerhal.camerarunning", + "Value": "CDHIGHCPUSETCPUS_RESTRICTED" + }, + { + "PowerHint": "LAUNCH", + "Type": "DoHint", + "EnableProperty": "vendor.powerhal.camerarunning", + "Value": "CDMIDCPUSETCPUS_RESTRICTED" + }, + { + "PowerHint": "LAUNCH", + "Type": "DoHint", + "EnableProperty": "vendor.powerhal.camerarunning", + "Value": "CDMIDHIGHCPUSETCPUS_RESTRICTED" + }, { "PowerHint": "CAMERA_LAUNCH", "Node": "MemFreq", @@ -843,6 +905,12 @@ "Duration": 3000, "Value": "848000" }, + { + "PowerHint": "CAMERA_STREAMING_EXTREME", + "Node": "PowerHALCameraRunning", + "Duration": 0, + "Value": "1" + }, { "PowerHint": "CAMERA_STREAMING_EXTREME", "Node": "CPULittleClusterMaxFreq", @@ -915,6 +983,12 @@ "Duration": 0, "Value": "0" }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PowerHALCameraRunning", + "Duration": 0, + "Value": "1" + }, { "PowerHint": "CAMERA_STREAMING_HIGH", "Node": "CPUUtilThreshold", @@ -993,6 +1067,12 @@ "Duration": 0, "Value": "0" }, + { + "PowerHint": "CAMERA_STREAMING_STANDARD", + "Node": "PowerHALCameraRunning", + "Duration": 0, + "Value": "1" + }, { "PowerHint": "CAMERA_STREAMING_STANDARD", "Node": "CDPreferHighCap", @@ -1059,6 +1139,12 @@ "Duration": 0, "Value": "0" }, + { + "PowerHint": "CAMERA_STREAMING_LOW", + "Node": "PowerHALCameraRunning", + "Duration": 0, + "Value": "1" + }, { "PowerHint": "CAMERA_STREAMING_LOW", "Node": "CDPreferHighCap", @@ -1131,6 +1217,26 @@ "Duration": 0, "Value": "0" }, + { + "PowerHint": "CAMERA_VIDEO_RECORDING", + "Type": "MaskHint", + "Value": "CDCPUSET_RESTRICTED" + }, + { + "PowerHint": "CAMERA_VIDEO_RECORDING", + "Type": "MaskHint", + "Value": "CDHIGHCPUSETCPUS_RESTRICTED" + }, + { + "PowerHint": "CAMERA_VIDEO_RECORDING", + "Type": "MaskHint", + "Value": "CDMIDCPUSETCPUS_RESTRICTED" + }, + { + "PowerHint": "CAMERA_VIDEO_RECORDING", + "Type": "MaskHint", + "Value": "CDMIDHIGHCPUSETCPUS_RESTRICTED" + }, { "PowerHint": "CAMERA_GPU_HIGH", "Node": "GPUMinFreq", From ea20ad99c36aa29f7aaf0e085a0fe03942c7667f Mon Sep 17 00:00:00 2001 From: pointerkung Date: Thu, 13 Oct 2022 20:18:35 +0800 Subject: [PATCH 082/124] Camera: Enable optimized TNR frequency and create TNR low power hint. Bug: 243729855 Test: Build pass, GCA, check 4K60 and 240fps TNR clock frequency Change-Id: I7cede8b8518abb2b16628b6ac5964b8a0c1693d7 --- device-lynx.mk | 1 + powerhint.json | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index a510697..b69e7af 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -217,6 +217,7 @@ PRODUCT_COPY_FILES += \ # Camera PRODUCT_PROPERTY_OVERRIDES += \ persist.vendor.camera.extended_launch_boost=1 \ + persist.vendor.camera.optimized_tnr_freq=1 \ persist.vendor.camera.raise_buf_allocation_priority=1 # Enable camera 1080P 60FPS binning mode diff --git a/powerhint.json b/powerhint.json index 272b1a4..49afd5e 100644 --- a/powerhint.json +++ b/powerhint.json @@ -342,6 +342,16 @@ ], "ResetOnInit": true }, + { + "Name": "TNRMaxFreq", + "Path": "/sys/devices/platform/17000060.devfreq_tnr/devfreq/17000060.devfreq_tnr/max_freq", + "Values": [ + "664000", + "67000" + ], + "DefaultIndex": 0, + "ResetOnInit": true + }, { "Name": "TNRFreq", "Path": "/sys/devices/platform/17000060.devfreq_tnr/devfreq/17000060.devfreq_tnr/min_freq", @@ -1249,6 +1259,12 @@ "Duration": 0, "Value": "302000" }, + { + "PowerHint": "CAMERA_TNR_LOW", + "Node": "TNRMaxFreq", + "Duration": 0, + "Value": "67000" + }, { "PowerHint": "FIXED_PERFORMANCE", "Node": "CPUBigClusterMaxFreq", From 1f65f248f35eb9f8bf9019b03eed83e1b93f7393 Mon Sep 17 00:00:00 2001 From: Bonnie Tu Date: Thu, 27 Oct 2022 05:49:05 +0000 Subject: [PATCH 083/124] Update ./DevInfo/Mod model name Need to set model name to G0DZQ Bug: 254423479 Test: XXX Change-Id: I211d15a969e921fe82a277eec94b62d48fa7e12f --- .../packages/apps/OMA-DM/DMService/res/values/config.xml | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 lynx/overlay/packages/apps/OMA-DM/DMService/res/values/config.xml diff --git a/lynx/overlay/packages/apps/OMA-DM/DMService/res/values/config.xml b/lynx/overlay/packages/apps/OMA-DM/DMService/res/values/config.xml new file mode 100644 index 0000000..83aab99 --- /dev/null +++ b/lynx/overlay/packages/apps/OMA-DM/DMService/res/values/config.xml @@ -0,0 +1,8 @@ + + + + + + G0DZQ + From 9e112e676dfe51e48ea8372813ad2b2dea029c51 Mon Sep 17 00:00:00 2001 From: Vincent Wang Date: Fri, 26 Aug 2022 16:35:59 +0800 Subject: [PATCH 084/124] Move fingerprint and face haptic form server to sysui(3/3) BUG: 237621645 Test: Check the vibrator work normally when using biometric unlock Change-Id: I3f97a94e4df9d089ffb62cb9ad44bff41927b17e Merged-In: I3f97a94e4df9d089ffb62cb9ad44bff41927b17e (cherry picked from commit 0873961b4b0c4cd47716fab5251c05f523799fd7) --- .../base/core/res/res/values/bools.xml | 20 ------------------- 1 file changed, 20 deletions(-) delete mode 100644 lynx/overlay/frameworks/base/core/res/res/values/bools.xml diff --git a/lynx/overlay/frameworks/base/core/res/res/values/bools.xml b/lynx/overlay/frameworks/base/core/res/res/values/bools.xml deleted file mode 100644 index 9e75363..0000000 --- a/lynx/overlay/frameworks/base/core/res/res/values/bools.xml +++ /dev/null @@ -1,20 +0,0 @@ - - - - false - From d0037da39b8a2345b1c9ca67d7c5eab5c964c852 Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Thu, 3 Nov 2022 15:51:55 +0800 Subject: [PATCH 085/124] audio: Phase in audio_policy_volumes.xml in L10 I put refine volume curve file in the attached file. This new tuning slightly increase 10th~20th volume step loudness. It fixes user's bug "16th volume step loudness is quiet compared to B3". Files from the latest attachment on b/257197305 Bug: 254569854 Bug: 257197305 Test: verified by supery@ Change-Id: I2f0d887da27b898259209afe33d578471b308589 --- audio/lynx/config/audio_policy_volumes.xml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/audio/lynx/config/audio_policy_volumes.xml b/audio/lynx/config/audio_policy_volumes.xml index dd4bff2..f6ff770 100644 --- a/audio/lynx/config/audio_policy_volumes.xml +++ b/audio/lynx/config/audio_policy_volumes.xml @@ -82,10 +82,10 @@ volume index from 0 to 100. 1,-6200 28,-3800 - 64,-2000 - 68,-1800 - 72,-1600 - 76,-1400 + 64,-1900 + 68,-1700 + 72,-1500 + 76,-1300 80,-1150 88,-850 92,-650 From d181c82406017ea02d88c0a1187a7ac9c5c4ffeb Mon Sep 17 00:00:00 2001 From: Kyle Lin Date: Fri, 4 Nov 2022 11:47:31 +0800 Subject: [PATCH 086/124] set dalvik.vm.dexopt.thermal-cutoff to 1 Bug: 256753117 Test: build and getprop Change-Id: I61a25a103a9d7b8bb4f8a310d1802920ea1234c8 --- conf/init.lynx.rc | 1 + 1 file changed, 1 insertion(+) diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc index 922fb45..1da8ea7 100644 --- a/conf/init.lynx.rc +++ b/conf/init.lynx.rc @@ -5,6 +5,7 @@ on init # NFC streset tool name setprop persist.vendor.nfc.streset libstreset21 setprop persist.vendor.se.streset libstreset21 + setprop dalvik.vm.dexopt.thermal-cutoff 1 # When ro.build.flavor=factory_lynx-userdebug, add vendor/bin/factory to default path on init && property:ro.build.flavor=factory_lynx-userdebug From c457b30aa34102905fcc83b109fe1507f7b1072f Mon Sep 17 00:00:00 2001 From: Beverly Date: Mon, 7 Nov 2022 13:38:12 +0000 Subject: [PATCH 087/124] Update lock-icon longpress time to 100ms Test: manual Fixes: 257589825 Change-Id: Id85e129b583df074308b86ec89ef4383e9cb1d93 --- .../frameworks/base/packages/SystemUI/res/values/config.xml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml b/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml index a5952d8..837946c 100644 --- a/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml +++ b/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml @@ -81,5 +81,8 @@ com.google.android.as true + + + 100 From 0dd39b7952112afdf057d9f59e3849db410e8b2b Mon Sep 17 00:00:00 2001 From: Jasmine Cha Date: Fri, 28 Oct 2022 15:27:07 +0800 Subject: [PATCH 088/124] audio: waves: Playback thermal throttle - introduce 2nd LL in presets. Bug: 256506814 Test: manual test Change-Id: Id5d2635ac45c51ad5d65ac517830fb692831ca2b Signed-off-by: Jasmine Cha --- .../config/audio_platform_configuration.xml | 3 ++- audio/lynx/tuning/waves/waves_config.ini | 8 ++++---- audio/lynx/tuning/waves/waves_preset.mps | Bin 130918 -> 131267 bytes 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/audio/lynx/config/audio_platform_configuration.xml b/audio/lynx/config/audio_platform_configuration.xml index 4e19f23..a6dbf17 100644 --- a/audio/lynx/config/audio_platform_configuration.xml +++ b/audio/lynx/config/audio_platform_configuration.xml @@ -235,6 +235,7 @@ + @@ -288,7 +289,7 @@ - + diff --git a/audio/lynx/tuning/waves/waves_config.ini b/audio/lynx/tuning/waves/waves_config.ini index 7c520b9..05c18e3 100644 --- a/audio/lynx/tuning/waves/waves_config.ini +++ b/audio/lynx/tuning/waves/waves_config.ini @@ -5,7 +5,7 @@ # Putting any value other than 1 would be equivalent to not supported. ######################################################################################################## [HAL_SUPPORTED_FEATURES] -CUSTOM_ACTION_258=1 +CUSTOM_ACTION_260=1 ######################################################################################################## # This defined the options of supported sample rates. @@ -50,12 +50,12 @@ AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so #AudioFormatSampleSize=4 #AudioFormatIncrement=8 -[CUSTOM_ACTION_258] +[CUSTOM_ACTION_260] CASE_1=PRIORITY:0,NUMBERS:2:0|1:1|2,PRESET:SPEAKER_MUSIC CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:1|2,PRESET:SPEAKER_SAFE_MUSIC CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1:1|2,PRESET:SPEAKER_SAFE_MUSIC CASE_4=PRIORITY:3,NUMBERS:2:0|1:0,PRESET:SPEAKER_MUSIC_THROTTLE CASE_5=PRIORITY:4,NUMBERS:1|2|4194304:2|3|4:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE CASE_6=PRIORITY:5,NUMBERS:1|4194304:0|1:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE -# Action 258 parameters: audio_devices_t, audio_mode_t, throttle_control_state_t -# - throttle_control_state_t: 0 - Enabled, 1 - Disabled, 2 - Bypassed \ No newline at end of file +# Action 260 parameters: audio_devices_t, audio_mode_t, throttle_control_state_t +# - throttle_control_state_t: 0 - Enabled, 1 - Disabled, 2 - Bypassed diff --git a/audio/lynx/tuning/waves/waves_preset.mps b/audio/lynx/tuning/waves/waves_preset.mps index d121befe06989d8c00b23140ac5392da545882af..8f594d0900ab27a44a6fae8f85ed4947f90a1d28 100644 GIT binary patch delta 2472 zcmchXUufG^6vyvrwxq4qb=BEcx@FZ(H(1vs%m+7#X>0YttZG&!46|PyD{Qcqp+!*K z7N3-<6ZwJnrQjZAY)k7;DAO?uV+<@VT|s=Y(0~*~v42*X4@JG_p6^Z4Jc#UJflEI3 z`#b0NJO4QIe@CvrUmNLurECAUs^+uE?R`%vr9#`&@tD_pus^;#=5=><^`yPT@KGdOa0er)+iI-v`j=(+In2rZA? z_2b=1ho9bYs7D{A7n~ejDapHTnGy@*lYyt1SQL!E|hI zSmzJW_Mq_VYwQ2JwuKog%-poK1#)c#rM8f{wvcUY!M3(A;o1VZwt^M4g^R5%?6|g& zZEYc!YAg5qQ`^FfGNrh&&D3@)*H$UzUq2Q%wVh~ujE-;g2YzV?9{gfYU3Eq0LZQX= zX?=SWMg8+1)aqQ8wnSDkw35lB{q!9x`l%0{_O)Kh8p|gyoePT**Ljcs$E7BBpFB)S zyx?`+(QJ&*jn(N6k2;*ifM@1Yyv;~=Xm202yL&QUdNg;|q0SAM(S^s!j}AH<9xLJZ zV|`BDGVc8R$&X8Jm&cQ5Xov{qhTv`+B3#`NSlEULmm7jRHw4HHfro7fWNrwM8v^8p0J$MRZU~SYB6xoq zGP|lw33n(mdq=jM(pQeq=AiAXon7Ik3^ipo+f@SORU#;>1TwD@$aa;0?J9u@uM!}y z62Xd90vEeVV8^QjvRx&R-72Y<`_0EG6fE^#d^k8Zf0f*pe7i23KScRMMH@YkqZgFu zA#?PQZS-IpJxn-yAV)7)5j|XN^swXTA=~I7yXf(3V!D+Yqmj-b)j9Ng^~UKOB33Im zPFOU(n5EN>OUnk&>}(5H&o(UVYzvoX8+V>}*5k*#`1#19`TAJljB?ZJ?QL z;Kbe}wL~KeQ)*$#uTFYlidbEfv}lqvxRf;RHfiDNq+wx`7A_}^J0}g~q~T$chRjI= YIcXp#4dkSOoHUS=7M!?vguWU57rW++DgXcg delta 1848 zcmaizO-NK>6o&6n8GllntVJO)TCO5vMl2|BbTqAnI{hJm<(Jahg|rCAMY|%}w1^f8DIuiYbH4Z9Q3=`%&pqdS_n!Bi_j~^^>-&0U zX7!m!L(2wDW-eAAGz=rXxIPp#Ynv{Fjs(r>NTjCTJlEFM7Vl{@%YtQPpzpy77U^;Y$?xXNCz2X@=$(YY);FZnq=`%X!Y%-vVx#b=$SnQw=K zU-ML6a)&*>v?s&YyGFfh(`vFU?BdT~E?SEwm8*vK0=Lz-;Bn`A_%~$vm3M z_Dv1Z)X)#v9muEnVMf)jV1-u=||&k z)A>WZ!Tm7`yY+aCnp~dURHryKqOM{iVZ8UGT3!vPff2v;Ax`=3xi4|=!NdT!~Zn3^^!qa>~LDCiS~4NkUzc1ePR$B}rgOl4ePg#%)Q$tRzYE)+FIP zCkdmHB$PQxKrcyn<|JuMSe3Ll;EN6#(ZP=*G&)EQYN22e3KpSY5egQeU=a!yp_)ag k#%)3|D?&AI6^ipL6r&;(WfltbgyNZnYD{Ebr8iIh0s-*W{Qv*} From 5243d9ff7d043edc7d0a7a8ab6ce22eaa2683210 Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Wed, 9 Nov 2022 18:27:22 +0800 Subject: [PATCH 089/124] audio: [L10] Recording tuning table update 11/09 - DVT Ver. For Final setting update IIR1 parameters on both camcorder(6 scenarios) and mic path(mono, stereo) for DVT stage devices on L10 Files from the latest attachment on b/258390574 Bug: 258390574 Test: verified by darrenyen@ Change-Id: I2d006076c63f4e7c62cc93d47f515e037d03fb92 --- audio/lynx/tuning/bluenote/recording.gatf | Bin 93884 -> 93884 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/audio/lynx/tuning/bluenote/recording.gatf b/audio/lynx/tuning/bluenote/recording.gatf index 4513cf712587a5fbe0d4cb55d26368d1ccd29754..89b206515a3f0a291cfce90f996b519c36e349d5 100644 GIT binary patch delta 3467 zcmeHJe@sAZ3&k~%u%jj<@2iAc;raWv9b2(sLg&@|nrYF3 z<#L7u7c@8IqM3ypCk7OOrs`E#|GP8J`ktPnnDDLHQCR^kpQp<)$>TWg%K?b?m0(iD z-*Us+5{{9TC6G{;1qV~Z!1%7nF;6r?!Y&EIcV3cn9QWK;cOj%T{(K~tUuNNbN=IA}e`xWaXC_J{mwU9c%Xo8!3XMI>5F@67V@w9TlvoVG zrwYM4KAU4~c_u`6tbx?3C33WCDaV4JQi0C)@~8H?$>S>)?B#0Ma(vJob@Zc38lrm6 zq7N&D*BYASwK2II50tEcYxQMN;dIKI=gj4p+Oz=NDh9WTfvLDZjrd(Dg<&`TFu$)$ z=Xl_UB@ffm!n@R@`KSb*pA!bQqgfme&scVkN(QD8M~CW!KwF%8i%lU!0z$}1LTsXI z-i~Vo=X@ZrGlUHh_hke`PAl#`Bt4Hd-X)^|<#}YV^ENgV_nI3~mTwI>?mfuT z;zP(e6S9X8avoVej3H#@P(sReNZ`{rmJovq_q_?RM-h@eg^+2n_+2w0Y6CxV=fz|& zd2CNRo{;Y0E;)>5au~lymUwJdWVHgl8BJ+h_FsJXF%9Su4{8KdPw1sF!B4wK+!!r!kt;T6?bG=SA(lTEis4 ze!k5o?QoZI#;&B+%BsNf?eiN?&(QvP=!Kf*n*pO~yRY&zxp(Lz-J5%Zy)Naym+R0` z`aCq4$|r3w6%J_(h`YC-%`uY1HK73fadEG0znq z6tcEqu8@6D3OIpD~8}C*&oh z*^&Fhm$ON_xmG1dh@ro#M^UqXIEL{k+Nt()Z1eBjZ`iqT*+`o6<6!G{-SkTRsknwM zXRdCXHQ|-j3Ad%=A%!}+r}mt#$tgj_4P1a=g7Y z1G*E}!y;d;oSv1zao(|Xny(5l7R+{4*pjZ^3cG)86^t&gm0NY*5Y@9){`f+Z88e#= z3t~#F>U#;gYtPBQOn;kW*X=^Mo-`AVWPTABlro&-$jG|>`UrY zk>eiaWmwl$3YJeB-%c8m>)FB8n$$o&p8aJb-2XDegT#71h?7}2~Rs2uGL^FJ|YZ;Uy(?!~cJBd1K9 zdwsWXy1BM1{IdB(XSoahzw zQ5-e}wW@zI_6!zkQ3LFlJPi|m{mIy~dD4E|#>u1$9ME~zXz?uFtkz<7R?}p~&(&

HT^EcAF>k*k9Nhzu(GB4NNc0wzn^v zU2mV|_isP%mRc~~;$Le&uer+pON+k!4dnnZUAElI{?YVW`?(hm?!U{B4W{?c$guyt ztTQt_8eM&_Lq0nfN8~bHTIJYSt=%P*l9C4W`~F{7GF)4XV$FWv%k!~;Dz;G*Jqw! znqip(R$ol|&~ATtMz(!YfIFCOGYp5h7{$SRTk7m31n%v3vq=Nf%m-8OIhYs4#hVMY zIhZD2*dwO3-~a=I0|*~vU|8S)VKV^vAl$GYhK-GlLB3SedH_{Y094KZWrMVXv|=bP znf!o_MOA^Bf#He)P_;Y*!vsbKh8b223?0G@3>VlL7NCilB zgB=5dfI0(%gdRi(h!0Zj$AeH^J2_66M+)Q|kkt&1K=VOP0OA8ctl$W8?eu$Di~>?1 z`3FD@q8)&^0f-L(F<4E;^a=5dJd+P_C{2zN5tuwrL}YTG2+!ny!VZ(|wghe8ki*Es zG Date: Tue, 11 Oct 2022 16:30:29 +0800 Subject: [PATCH 090/124] audio: update hidl to 4.0 Bug: 252877772 Test: build pass Signed-off-by: Carter Hsu Change-Id: Iac5181267e99a88f4c955250a78f85ac5fccaf5e --- manifest.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest.xml b/manifest.xml index 5909ae3..982c345 100644 --- a/manifest.xml +++ b/manifest.xml @@ -116,7 +116,7 @@ vendor.google.whitechapel.audio.audioext hwbinder - 2.0 + 4.0 IAudioExt default From c821db2c4c06c9a7b9a3555ee3b40663b0655059 Mon Sep 17 00:00:00 2001 From: Kyle Lin Date: Wed, 2 Nov 2022 08:47:43 +0800 Subject: [PATCH 091/124] powerhint: relax the cap when camera exit Camera hints was canceled at activityStop and applied the rule for a while after LAUNCH hint, exten the LAUNCH HINT to fix it. Bug: 255927500 Test: build and launch/exit camera Change-Id: I86b19467f6038a7fde0935bf79f0a0e6bc76523b --- powerhint.json | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/powerhint.json b/powerhint.json index 49afd5e..9b9b658 100644 --- a/powerhint.json +++ b/powerhint.json @@ -645,6 +645,29 @@ "EnableProperty": "vendor.powerhal.camerarunning", "Value": "CDMIDHIGHCPUSETCPUS_RESTRICTED" }, + { + "PowerHint": "LAUNCH", + "Type": "DoHint", + "Value": "LAUNCH_EXTEND" + }, + { + "PowerHint": "LAUNCH_EXTEND", + "Node": "CPUBigClusterMaxFreq", + "Duration": 2000, + "Value": "9999999" + }, + { + "PowerHint": "LAUNCH_EXTEND", + "Node": "CPUMidClusterMaxFreq", + "Duration": 2000, + "Value": "9999999" + }, + { + "PowerHint": "LAUNCH_EXTEND", + "Node": "CPULittleClusterMaxFreq", + "Duration": 2000, + "Value": "9999999" + }, { "PowerHint": "CAMERA_LAUNCH", "Node": "MemFreq", From a426bad653d0e4640f610eed9b113e79785252b3 Mon Sep 17 00:00:00 2001 From: Sayanna Chandula Date: Mon, 31 Oct 2022 12:02:35 -0700 Subject: [PATCH 092/124] thermal: update shutdown thresholds for Tj zones Bug: 256193172 Test: Build and boot on device Change-Id: I96ea572c63595cd2396dc64a3045cca8a63f44fe Signed-off-by: Sayanna Chandula --- thermal_info_config_lynx.json | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index 3ed30e3..5ef123b 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -369,31 +369,31 @@ { "Name":"LITTLE", "Type":"CPU", - "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0], + "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"], "Multiplier":0.001 }, { "Name":"MID", "Type":"CPU", - "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0], + "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"], "Multiplier":0.001 }, { "Name":"BIG", "Type":"CPU", - "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0], + "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"], "Multiplier":0.001 }, { "Name":"G3D", "Type":"GPU", - "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0], + "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"], "Multiplier":0.001 }, { "Name":"TPU", "Type":"NPU", - "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0], + "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"], "Multiplier":0.001 }, { From 7ccd8f7716fc65d09e7e0d24a12f0ccbcee80ac5 Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Wed, 16 Nov 2022 10:12:10 +0800 Subject: [PATCH 093/124] audio: Phase in fortemedia tuning tables Change List : Fortemedia: Handset : Optimize RX performance for TMOUS SWB Files from the latest attachment on b/259193926 Bug: 259193926 Test: verified by ntkuo@ Change-Id: Id0cadbf645e3346e634f91df1e1258b631104b44 --- audio/lynx/tuning/fortemedia/HANDSET.dat | Bin 255674 -> 255674 bytes audio/lynx/tuning/fortemedia/HANDSET.mods | 30 +++++++++++----------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/audio/lynx/tuning/fortemedia/HANDSET.dat b/audio/lynx/tuning/fortemedia/HANDSET.dat index 00329a8ac0e314d9e27e486e4d8f0e52fda51147..56923af46530349d072607bb1cec603a35c92d30 100644 GIT binary patch delta 122 zcmdmWmVeh-{)R1#-?-W4Y%prbso4I9o3V)z%9#%2yqjLc$2bKh%fpW@+a!pPl@UUh Vog@O6ZPyWH1Y)M`I-<;d7XbnMFO2{I delta 122 zcmdmWmVeh-{)R1#-?-V9958AqY1saUo3V)z%9#%2yqjLc$2bKh%fpW@+a!pPl@UUh Vog@O6ZPyWH1Y)M`I-<;d7Xe3{Fr@$h diff --git a/audio/lynx/tuning/fortemedia/HANDSET.mods b/audio/lynx/tuning/fortemedia/HANDSET.mods index 620e38b..ed7455b 100644 --- a/audio/lynx/tuning/fortemedia/HANDSET.mods +++ b/audio/lynx/tuning/fortemedia/HANDSET.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-10-28 12:08:18 +#SAVE_TIME 2022-11-02 16:49:10 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB #PARAM_MODE FULL @@ -17184,8 +17184,8 @@ 47 0xACB9 //RX_FDEQ_GAIN_8 48 0xBDC6 //RX_FDEQ_GAIN_9 49 0xC4B8 //RX_FDEQ_GAIN_10 -50 0xC0A4 //RX_FDEQ_GAIN_11 -51 0x8074 //RX_FDEQ_GAIN_12 +50 0xB09C //RX_FDEQ_GAIN_11 +51 0x786C //RX_FDEQ_GAIN_12 52 0x7474 //RX_FDEQ_GAIN_13 53 0x646C //RX_FDEQ_GAIN_14 54 0x6888 //RX_FDEQ_GAIN_15 @@ -17283,8 +17283,8 @@ 47 0xACB9 //RX_FDEQ_GAIN_8 48 0xBDC6 //RX_FDEQ_GAIN_9 49 0xC4B8 //RX_FDEQ_GAIN_10 -50 0xC0A4 //RX_FDEQ_GAIN_11 -51 0x8074 //RX_FDEQ_GAIN_12 +50 0xB09C //RX_FDEQ_GAIN_11 +51 0x786C //RX_FDEQ_GAIN_12 52 0x7474 //RX_FDEQ_GAIN_13 53 0x646C //RX_FDEQ_GAIN_14 54 0x6888 //RX_FDEQ_GAIN_15 @@ -17382,8 +17382,8 @@ 47 0xACB9 //RX_FDEQ_GAIN_8 48 0xBDC6 //RX_FDEQ_GAIN_9 49 0xC4B8 //RX_FDEQ_GAIN_10 -50 0xC0A4 //RX_FDEQ_GAIN_11 -51 0x8074 //RX_FDEQ_GAIN_12 +50 0xB09C //RX_FDEQ_GAIN_11 +51 0x786C //RX_FDEQ_GAIN_12 52 0x7474 //RX_FDEQ_GAIN_13 53 0x646C //RX_FDEQ_GAIN_14 54 0x6888 //RX_FDEQ_GAIN_15 @@ -17481,8 +17481,8 @@ 47 0xACB9 //RX_FDEQ_GAIN_8 48 0xBDC6 //RX_FDEQ_GAIN_9 49 0xC4B8 //RX_FDEQ_GAIN_10 -50 0xC0A4 //RX_FDEQ_GAIN_11 -51 0x8074 //RX_FDEQ_GAIN_12 +50 0xB09C //RX_FDEQ_GAIN_11 +51 0x786C //RX_FDEQ_GAIN_12 52 0x7474 //RX_FDEQ_GAIN_13 53 0x646C //RX_FDEQ_GAIN_14 54 0x6888 //RX_FDEQ_GAIN_15 @@ -17580,8 +17580,8 @@ 47 0xACB9 //RX_FDEQ_GAIN_8 48 0xBDC6 //RX_FDEQ_GAIN_9 49 0xC4B8 //RX_FDEQ_GAIN_10 -50 0xC0A4 //RX_FDEQ_GAIN_11 -51 0x8074 //RX_FDEQ_GAIN_12 +50 0xB09C //RX_FDEQ_GAIN_11 +51 0x786C //RX_FDEQ_GAIN_12 52 0x7474 //RX_FDEQ_GAIN_13 53 0x646C //RX_FDEQ_GAIN_14 54 0x6888 //RX_FDEQ_GAIN_15 @@ -17679,8 +17679,8 @@ 47 0xACB9 //RX_FDEQ_GAIN_8 48 0xBDC6 //RX_FDEQ_GAIN_9 49 0xC4B8 //RX_FDEQ_GAIN_10 -50 0xC0A4 //RX_FDEQ_GAIN_11 -51 0x8074 //RX_FDEQ_GAIN_12 +50 0xB09C //RX_FDEQ_GAIN_11 +51 0x786C //RX_FDEQ_GAIN_12 52 0x7474 //RX_FDEQ_GAIN_13 53 0x646C //RX_FDEQ_GAIN_14 54 0x6888 //RX_FDEQ_GAIN_15 @@ -17778,8 +17778,8 @@ 47 0xACB9 //RX_FDEQ_GAIN_8 48 0xBDC6 //RX_FDEQ_GAIN_9 49 0xC4B8 //RX_FDEQ_GAIN_10 -50 0xC0A4 //RX_FDEQ_GAIN_11 -51 0x8074 //RX_FDEQ_GAIN_12 +50 0xB09C //RX_FDEQ_GAIN_11 +51 0x786C //RX_FDEQ_GAIN_12 52 0x7474 //RX_FDEQ_GAIN_13 53 0x646C //RX_FDEQ_GAIN_14 54 0x6888 //RX_FDEQ_GAIN_15 From 24789fe33222fa734177242059caee0af6d74299 Mon Sep 17 00:00:00 2001 From: Chris Paulo Date: Wed, 2 Nov 2022 21:57:58 +0000 Subject: [PATCH 094/124] device/vibrator: Move vibrator HAL into device folder for l26 Moved L26 portion of vibrator hal from hardware/google/pixel to device/google. Bug: 198239103 Test: None Change-Id: I4dc77f5770929337905878c7ee6acbbfa489bc57 Signed-off-by: Chris Paulo --- vibrator/Android.bp | 52 + vibrator/OWNERS | 3 + vibrator/common/Android.bp | 37 + vibrator/common/HardwareBase.cpp | 136 ++ vibrator/common/HardwareBase.h | 221 +++ vibrator/common/utils.h | 173 +++ vibrator/cs40l26/Android.bp | 86 ++ vibrator/cs40l26/Hardware.h | 346 +++++ vibrator/cs40l26/TEST_MAPPING | 10 + vibrator/cs40l26/Vibrator.cpp | 1327 +++++++++++++++++ vibrator/cs40l26/Vibrator.h | 211 +++ ...droid.hardware.vibrator-service.cs40l26.rc | 47 + ...roid.hardware.vibrator-service.cs40l26.xml | 7 + vibrator/cs40l26/device.mk | 6 + vibrator/cs40l26/service.cpp | 55 + vibrator/cs40l26/tests/Android.bp | 35 + vibrator/cs40l26/tests/mocks.h | 80 + vibrator/cs40l26/tests/test-hwapi.cpp | 288 ++++ vibrator/cs40l26/tests/test-hwcal.cpp | 386 +++++ vibrator/cs40l26/tests/test-vibrator.cpp | 682 +++++++++ vibrator/cs40l26/tests/types.h | 33 + vibrator/cs40l26/tests/utils.h | 46 + 22 files changed, 4267 insertions(+) create mode 100644 vibrator/Android.bp create mode 100644 vibrator/OWNERS create mode 100644 vibrator/common/Android.bp create mode 100644 vibrator/common/HardwareBase.cpp create mode 100644 vibrator/common/HardwareBase.h create mode 100644 vibrator/common/utils.h create mode 100644 vibrator/cs40l26/Android.bp create mode 100644 vibrator/cs40l26/Hardware.h create mode 100644 vibrator/cs40l26/TEST_MAPPING create mode 100644 vibrator/cs40l26/Vibrator.cpp create mode 100644 vibrator/cs40l26/Vibrator.h create mode 100644 vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.rc create mode 100644 vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.xml create mode 100644 vibrator/cs40l26/device.mk create mode 100644 vibrator/cs40l26/service.cpp create mode 100644 vibrator/cs40l26/tests/Android.bp create mode 100644 vibrator/cs40l26/tests/mocks.h create mode 100644 vibrator/cs40l26/tests/test-hwapi.cpp create mode 100644 vibrator/cs40l26/tests/test-hwcal.cpp create mode 100644 vibrator/cs40l26/tests/test-vibrator.cpp create mode 100644 vibrator/cs40l26/tests/types.h create mode 100644 vibrator/cs40l26/tests/utils.h diff --git a/vibrator/Android.bp b/vibrator/Android.bp new file mode 100644 index 0000000..dff6816 --- /dev/null +++ b/vibrator/Android.bp @@ -0,0 +1,52 @@ +// +// Copyright (C) 2019 The Android Open Source Project +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +package { + default_applicable_licenses: ["Android-Apache-2.0"], +} + +cc_defaults { + name: "PixelVibratorDefaults", + relative_install_path: "hw", + static_libs: [ + "PixelVibratorCommon", + ], + shared_libs: [ + "libbase", + "libbinder_ndk", + "libcutils", + "libhardware", + "liblog", + "libutils", + ], +} + +cc_defaults { + name: "PixelVibratorBinaryDefaults", + defaults: ["PixelVibratorDefaults"], + shared_libs: [ + "android.hardware.vibrator-V2-ndk", + ], +} + +cc_defaults { + name: "PixelVibratorTestDefaults", + defaults: ["PixelVibratorDefaults"], + static_libs: [ + "android.hardware.vibrator-V2-ndk", + ], + test_suites: ["device-tests"], + require_root: true, +} diff --git a/vibrator/OWNERS b/vibrator/OWNERS new file mode 100644 index 0000000..5d4a9c3 --- /dev/null +++ b/vibrator/OWNERS @@ -0,0 +1,3 @@ +chasewu@google.com +michaelwr@google.com +taikuo@google.com diff --git a/vibrator/common/Android.bp b/vibrator/common/Android.bp new file mode 100644 index 0000000..04fbc4d --- /dev/null +++ b/vibrator/common/Android.bp @@ -0,0 +1,37 @@ +// +// Copyright (C) 2019 The Android Open Source Project +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +package { + default_applicable_licenses: ["Android-Apache-2.0"], +} + +cc_library { + name: "PixelVibratorCommon", + srcs: [ + "HardwareBase.cpp", + ], + shared_libs: [ + "libbase", + "libcutils", + "liblog", + "libutils", + ], + cflags: [ + "-DATRACE_TAG=(ATRACE_TAG_VIBRATOR | ATRACE_TAG_HAL)", + "-DLOG_TAG=\"android.hardware.vibrator@1.x-common\"", + ], + export_include_dirs: ["."], + vendor_available: true, +} diff --git a/vibrator/common/HardwareBase.cpp b/vibrator/common/HardwareBase.cpp new file mode 100644 index 0000000..8e07e99 --- /dev/null +++ b/vibrator/common/HardwareBase.cpp @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2019 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "HardwareBase.h" + +#include +#include + +#include +#include + +#include "utils.h" + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { + +HwApiBase::HwApiBase() { + mPathPrefix = std::getenv("HWAPI_PATH_PREFIX") ?: ""; + if (mPathPrefix.empty()) { + ALOGE("Failed get HWAPI path prefix!"); + } +} + +void HwApiBase::saveName(const std::string &name, const std::ios *stream) { + mNames[stream] = name; +} + +bool HwApiBase::has(const std::ios &stream) { + return !!stream; +} + +void HwApiBase::debug(int fd) { + dprintf(fd, "Kernel:\n"); + + for (auto &entry : utils::pathsFromEnv("HWAPI_DEBUG_PATHS", mPathPrefix)) { + auto &path = entry.first; + auto &stream = entry.second; + std::string line; + + dprintf(fd, " %s:\n", path.c_str()); + while (std::getline(stream, line)) { + dprintf(fd, " %s\n", line.c_str()); + } + } + + mRecordsMutex.lock(); + dprintf(fd, " Records:\n"); + for (auto &r : mRecords) { + if (r == nullptr) { + continue; + } + dprintf(fd, " %s\n", r->toString(mNames).c_str()); + } + mRecordsMutex.unlock(); +} + +HwCalBase::HwCalBase() { + std::ifstream calfile; + auto propertyPrefix = std::getenv("PROPERTY_PREFIX"); + + if (propertyPrefix != NULL) { + mPropertyPrefix = std::string(propertyPrefix); + } else { + ALOGE("Failed get property prefix!"); + } + + utils::fileFromEnv("CALIBRATION_FILEPATH", &calfile); + + for (std::string line; std::getline(calfile, line);) { + if (line.empty() || line[0] == '#') { + continue; + } + std::istringstream is_line(line); + std::string key, value; + if (std::getline(is_line, key, ':') && std::getline(is_line, value)) { + mCalData[utils::trim(key)] = utils::trim(value); + } + } +} + +void HwCalBase::debug(int fd) { + std::ifstream stream; + std::string path; + std::string line; + struct context { + HwCalBase *obj; + int fd; + } context{this, fd}; + + dprintf(fd, "Properties:\n"); + + property_list( + [](const char *key, const char *value, void *cookie) { + struct context *context = static_cast(cookie); + HwCalBase *obj = context->obj; + int fd = context->fd; + const std::string expect{obj->mPropertyPrefix}; + const std::string actual{key, std::min(strlen(key), expect.size())}; + if (actual == expect) { + dprintf(fd, " %s:\n", key); + dprintf(fd, " %s\n", value); + } + }, + &context); + + dprintf(fd, "\n"); + + dprintf(fd, "Persist:\n"); + + utils::fileFromEnv("CALIBRATION_FILEPATH", &stream, &path); + + dprintf(fd, " %s:\n", path.c_str()); + while (std::getline(stream, line)) { + dprintf(fd, " %s\n", line.c_str()); + } +} + +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/common/HardwareBase.h b/vibrator/common/HardwareBase.h new file mode 100644 index 0000000..5b07040 --- /dev/null +++ b/vibrator/common/HardwareBase.h @@ -0,0 +1,221 @@ +/* + * Copyright (C) 2019 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "utils.h" + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { + +using ::android::base::unique_fd; + +class HwApiBase { + private: + using NamesMap = std::map; + + class RecordInterface { + public: + virtual std::string toString(const NamesMap &names) = 0; + virtual ~RecordInterface() {} + }; + template + class Record : public RecordInterface { + public: + Record(const char *func, const T &value, const std::ios *stream) + : mFunc(func), mValue(value), mStream(stream) {} + std::string toString(const NamesMap &names) override; + + private: + const char *mFunc; + const T mValue; + const std::ios *mStream; + }; + using Records = std::list>; + + static constexpr uint32_t RECORDS_SIZE = 32; + + public: + HwApiBase(); + void debug(int fd); + + protected: + void saveName(const std::string &name, const std::ios *stream); + template + void open(const std::string &name, T *stream); + bool has(const std::ios &stream); + template + bool get(T *value, std::istream *stream); + template + bool set(const T &value, std::ostream *stream); + template + bool poll(const T &value, std::istream *stream, const int32_t timeout = -1); + template + void record(const char *func, const T &value, const std::ios *stream); + + private: + std::string mPathPrefix; + NamesMap mNames; + Records mRecords{RECORDS_SIZE}; + std::mutex mRecordsMutex; + std::mutex mIoMutex; +}; + +#define HWAPI_RECORD(args...) HwApiBase::record(__FUNCTION__, ##args) + +template +void HwApiBase::open(const std::string &name, T *stream) { + saveName(name, stream); + utils::openNoCreate(mPathPrefix + name, stream); +} + +template +bool HwApiBase::get(T *value, std::istream *stream) { + ATRACE_NAME("HwApi::get"); + std::scoped_lock ioLock{mIoMutex}; + bool ret; + stream->seekg(0); + *stream >> *value; + if (!(ret = !!*stream)) { + ALOGE("Failed to read %s (%d): %s", mNames[stream].c_str(), errno, strerror(errno)); + } + stream->clear(); + HWAPI_RECORD(*value, stream); + return ret; +} + +template +bool HwApiBase::set(const T &value, std::ostream *stream) { + ATRACE_NAME("HwApi::set"); + using utils::operator<<; + std::scoped_lock ioLock{mIoMutex}; + bool ret; + *stream << value << std::endl; + if (!(ret = !!*stream)) { + ALOGE("Failed to write %s (%d): %s", mNames[stream].c_str(), errno, strerror(errno)); + stream->clear(); + } + HWAPI_RECORD(value, stream); + return ret; +} + +template +bool HwApiBase::poll(const T &value, std::istream *stream, const int32_t timeoutMs) { + ATRACE_NAME("HwApi::poll"); + auto path = mPathPrefix + mNames[stream]; + unique_fd fileFd{::open(path.c_str(), O_RDONLY)}; + unique_fd epollFd{epoll_create(1)}; + epoll_event event = { + .events = EPOLLPRI | EPOLLET, + }; + T actual; + bool ret; + int epollRet; + + if (timeoutMs < -1) { + ALOGE("Invalid polling timeout!"); + return false; + } + + if (epoll_ctl(epollFd, EPOLL_CTL_ADD, fileFd, &event)) { + ALOGE("Failed to poll %s (%d): %s", mNames[stream].c_str(), errno, strerror(errno)); + return false; + } + + while ((ret = get(&actual, stream)) && (actual != value)) { + epollRet = epoll_wait(epollFd, &event, 1, timeoutMs); + if (epollRet <= 0) { + ALOGE("Polling error or timeout! (%d)", epollRet); + return false; + } + } + + HWAPI_RECORD(value, stream); + return ret; +} + +template +void HwApiBase::record(const char *func, const T &value, const std::ios *stream) { + std::lock_guard lock(mRecordsMutex); + mRecords.emplace_back(std::make_unique>(func, value, stream)); + mRecords.pop_front(); +} + +template +std::string HwApiBase::Record::toString(const NamesMap &names) { + using utils::operator<<; + std::stringstream ret; + + ret << mFunc << " '" << names.at(mStream) << "' = '" << mValue << "'"; + + return ret.str(); +} + +class HwCalBase { + public: + HwCalBase(); + void debug(int fd); + + protected: + template + bool getProperty(const char *key, T *value, const T defval); + template + bool getPersist(const char *key, T *value); + + private: + std::string mPropertyPrefix; + std::map mCalData; +}; + +template +bool HwCalBase::getProperty(const char *key, T *outval, const T defval) { + ATRACE_NAME("HwCal::getProperty"); + *outval = utils::getProperty(mPropertyPrefix + key, defval); + return true; +} + +template +bool HwCalBase::getPersist(const char *key, T *value) { + ATRACE_NAME("HwCal::getPersist"); + auto it = mCalData.find(key); + if (it == mCalData.end()) { + ALOGE("Missing %s config!", key); + return false; + } + std::stringstream stream{it->second}; + utils::unpack(stream, value); + if (!stream || !stream.eof()) { + ALOGE("Invalid %s config!", key); + return false; + } + return true; +} + +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/common/utils.h b/vibrator/common/utils.h new file mode 100644 index 0000000..188554d --- /dev/null +++ b/vibrator/common/utils.h @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2019 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include +#include +#include +#include + +#include +#include +#include + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { +namespace utils { + +template +class Is_Iterable { + private: + template + static std::true_type test(typename U::iterator *u); + + template + static std::false_type test(U *u); + + public: + static const bool value = decltype(test(0))::value; +}; + +template +using Enable_If_Iterable = std::enable_if_t::value == B>; + +template +using Enable_If_Signed = std::enable_if_t, U>; + +template +using Enable_If_Unsigned = std::enable_if_t, U>; + +// override for default behavior of printing as a character +inline std::ostream &operator<<(std::ostream &stream, const int8_t value) { + return stream << +value; +} +// override for default behavior of printing as a character +inline std::ostream &operator<<(std::ostream &stream, const uint8_t value) { + return stream << +value; +} + +template +inline auto toUnderlying(const T value) { + return static_cast>(value); +} + +template +inline Enable_If_Iterable unpack(std::istream &stream, T *value) { + for (auto &entry : *value) { + stream >> entry; + } +} + +template +inline Enable_If_Iterable unpack(std::istream &stream, T *value) { + stream >> *value; +} + +template <> +inline void unpack(std::istream &stream, std::string *value) { + *value = std::string(std::istreambuf_iterator(stream), {}); + stream.setstate(std::istream::eofbit); +} + +template +inline Enable_If_Signed getProperty(const std::string &key, const T def) { + if (std::is_floating_point_v) { + float result; + std::string value = ::android::base::GetProperty(key, ""); + if (!value.empty() && ::android::base::ParseFloat(value, &result)) { + return result; + } + return def; + } else { + return ::android::base::GetIntProperty(key, def); + } +} + +template +inline Enable_If_Unsigned getProperty(const std::string &key, const T def) { + return ::android::base::GetUintProperty(key, def); +} + +template <> +inline bool getProperty(const std::string &key, const bool def) { + return ::android::base::GetBoolProperty(key, def); +} + +template +static void openNoCreate(const std::string &file, T *outStream) { + auto mode = std::is_base_of_v ? std::ios_base::out : std::ios_base::in; + + // Force 'in' mode to prevent file creation + outStream->open(file, mode | std::ios_base::in); + if (!*outStream) { + ALOGE("Failed to open %s (%d): %s", file.c_str(), errno, strerror(errno)); + } +} + +template +static void fileFromEnv(const char *env, T *outStream, std::string *outName = nullptr) { + auto file = std::getenv(env); + + if (file == nullptr) { + ALOGE("Failed get env %s", env); + return; + } + + if (outName != nullptr) { + *outName = std::string(file); + } + + openNoCreate(file, outStream); +} + +static ATTRIBUTE_UNUSED auto pathsFromEnv(const char *env, const std::string &prefix = "") { + std::map ret; + auto value = std::getenv(env); + + if (value == nullptr) { + return ret; + } + + std::istringstream paths{value}; + std::string path; + + while (paths >> path) { + ret[path].open(prefix + path); + } + + return ret; +} + +static ATTRIBUTE_UNUSED std::string trim(const std::string &str, + const std::string &whitespace = " \t") { + const auto str_begin = str.find_first_not_of(whitespace); + if (str_begin == std::string::npos) { + return ""; + } + + const auto str_end = str.find_last_not_of(whitespace); + const auto str_range = str_end - str_begin + 1; + + return str.substr(str_begin, str_range); +} + +} // namespace utils +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/cs40l26/Android.bp b/vibrator/cs40l26/Android.bp new file mode 100644 index 0000000..53764de --- /dev/null +++ b/vibrator/cs40l26/Android.bp @@ -0,0 +1,86 @@ +// +// Copyright (C) 2021 The Android Open Source Project +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +package { + default_applicable_licenses: ["Android-Apache-2.0"], +} + +cc_defaults { + name: "android.hardware.vibrator-defaults.cs40l26", + cflags: [ + "-DATRACE_TAG=(ATRACE_TAG_VIBRATOR | ATRACE_TAG_HAL)", + "-DLOG_TAG=\"android.hardware.vibrator-cs40l26\"", + ], + shared_libs: [ + "libbinder", + ], +} + +cc_defaults { + name: "VibratorHalCs40l26BinaryDefaults", + defaults: [ + "PixelVibratorBinaryDefaults", + "android.hardware.vibrator-defaults.cs40l26", + ], + include_dirs: [ + "external/tinyalsa/include", + ], + shared_libs: [ + "libcutils", + "libtinyalsa", + ], +} + +cc_defaults { + name: "VibratorHalCs40l26TestDefaults", + defaults: [ + "PixelVibratorTestDefaults", + "android.hardware.vibrator-defaults.cs40l26", + ], + static_libs: [ + "android.hardware.vibrator-impl.cs40l26", + "libtinyalsa", + ], +} + +cc_library { + name: "android.hardware.vibrator-impl.cs40l26", + defaults: ["VibratorHalCs40l26BinaryDefaults"], + srcs: ["Vibrator.cpp"], + export_include_dirs: ["."], + vendor_available: true, + visibility: [":__subpackages__"], +} + +cc_binary { + name: "android.hardware.vibrator-service.cs40l26", + defaults: ["VibratorHalCs40l26BinaryDefaults"], + init_rc: ["android.hardware.vibrator-service.cs40l26.rc"], + vintf_fragments: ["android.hardware.vibrator-service.cs40l26.xml"], + srcs: ["service.cpp"], + shared_libs: ["android.hardware.vibrator-impl.cs40l26"], + proprietary: true, +} + +cc_binary { + name: "android.hardware.vibrator-service.cs40l26-dual", + defaults: ["VibratorHalCs40l26BinaryDefaults"], + init_rc: ["android.hardware.vibrator-service.cs40l26-dual.rc"], + vintf_fragments: ["android.hardware.vibrator-service.cs40l26-dual.xml"], + srcs: ["service.cpp"], + shared_libs: ["android.hardware.vibrator-impl.cs40l26"], + cflags: ["-DVIBRATOR_NAME=\"dual\""], + proprietary: true, +} diff --git a/vibrator/cs40l26/Hardware.h b/vibrator/cs40l26/Hardware.h new file mode 100644 index 0000000..ae052ba --- /dev/null +++ b/vibrator/cs40l26/Hardware.h @@ -0,0 +1,346 @@ +/* + * Copyright (C) 2021 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include + +#include "HardwareBase.h" +#include "Vibrator.h" + +#define PROC_SND_PCM "/proc/asound/pcm" +#define HAPTIC_PCM_DEVICE_SYMBOL "haptic nohost playback" + +static struct pcm_config haptic_nohost_config = { + .channels = 1, + .rate = 48000, + .period_size = 80, + .period_count = 2, + .format = PCM_FORMAT_S16_LE, +}; + +enum WaveformIndex : uint16_t { + /* Physical waveform */ + WAVEFORM_LONG_VIBRATION_EFFECT_INDEX = 0, + WAVEFORM_RESERVED_INDEX_1 = 1, + WAVEFORM_CLICK_INDEX = 2, + WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX = 3, + WAVEFORM_THUD_INDEX = 4, + WAVEFORM_SPIN_INDEX = 5, + WAVEFORM_QUICK_RISE_INDEX = 6, + WAVEFORM_SLOW_RISE_INDEX = 7, + WAVEFORM_QUICK_FALL_INDEX = 8, + WAVEFORM_LIGHT_TICK_INDEX = 9, + WAVEFORM_LOW_TICK_INDEX = 10, + WAVEFORM_RESERVED_MFG_1, + WAVEFORM_RESERVED_MFG_2, + WAVEFORM_RESERVED_MFG_3, + WAVEFORM_MAX_PHYSICAL_INDEX, + /* OWT waveform */ + WAVEFORM_COMPOSE = WAVEFORM_MAX_PHYSICAL_INDEX, + WAVEFORM_PWLE, + /* + * Refer to , the WAVEFORM_MAX_INDEX must not exceed 96. + * #define FF_GAIN 0x60 // 96 in decimal + * #define FF_MAX_EFFECTS FF_GAIN + */ + WAVEFORM_MAX_INDEX, +}; + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { + +class HwApi : public Vibrator::HwApi, private HwApiBase { + public: + HwApi() { + open("calibration/f0_stored", &mF0); + open("default/f0_offset", &mF0Offset); + open("calibration/redc_stored", &mRedc); + open("calibration/q_stored", &mQ); + open("default/vibe_state", &mVibeState); + open("default/num_waves", &mEffectCount); + open("default/owt_free_space", &mOwtFreeSpace); + open("default/f0_comp_enable", &mF0CompEnable); + open("default/redc_comp_enable", &mRedcCompEnable); + open("default/delay_before_stop_playback_us", &mMinOnOffInterval); + } + + bool setF0(std::string value) override { return set(value, &mF0); } + bool setF0Offset(uint32_t value) override { return set(value, &mF0Offset); } + bool setRedc(std::string value) override { return set(value, &mRedc); } + bool setQ(std::string value) override { return set(value, &mQ); } + bool getEffectCount(uint32_t *value) override { return get(value, &mEffectCount); } + bool pollVibeState(uint32_t value, int32_t timeoutMs) override { + return poll(value, &mVibeState, timeoutMs); + } + bool hasOwtFreeSpace() override { return has(mOwtFreeSpace); } + bool getOwtFreeSpace(uint32_t *value) override { return get(value, &mOwtFreeSpace); } + bool setF0CompEnable(bool value) override { return set(value, &mF0CompEnable); } + bool setRedcCompEnable(bool value) override { return set(value, &mRedcCompEnable); } + bool setMinOnOffInterval(uint32_t value) override { return set(value, &mMinOnOffInterval); } + // TODO(b/234338136): Need to add the force feedback HW API test cases + bool setFFGain(int fd, uint16_t value) override { + struct input_event gain = { + .type = EV_FF, + .code = FF_GAIN, + .value = value, + }; + if (write(fd, (const void *)&gain, sizeof(gain)) != sizeof(gain)) { + return false; + } + return true; + } + bool setFFEffect(int fd, struct ff_effect *effect, uint16_t timeoutMs) override { + if (((*effect).replay.length != timeoutMs) || (ioctl(fd, EVIOCSFF, effect) < 0)) { + ALOGE("setFFEffect fail"); + return false; + } else { + return true; + } + } + bool setFFPlay(int fd, int8_t index, bool value) override { + struct input_event play = { + .type = EV_FF, + .code = static_cast(index), + .value = value, + }; + if (write(fd, (const void *)&play, sizeof(play)) != sizeof(play)) { + return false; + } else { + return true; + } + } + bool getHapticAlsaDevice(int *card, int *device) override { + std::string line; + std::ifstream myfile(PROC_SND_PCM); + if (myfile.is_open()) { + while (getline(myfile, line)) { + if (line.find(HAPTIC_PCM_DEVICE_SYMBOL) != std::string::npos) { + std::stringstream ss(line); + std::string currentToken; + std::getline(ss, currentToken, ':'); + sscanf(currentToken.c_str(), "%d-%d", card, device); + return true; + } + } + myfile.close(); + } else { + ALOGE("Failed to read file: %s", PROC_SND_PCM); + } + return false; + } + bool setHapticPcmAmp(struct pcm **haptic_pcm, bool enable, int card, int device) override { + int ret = 0; + + if (enable) { + *haptic_pcm = pcm_open(card, device, PCM_OUT, &haptic_nohost_config); + if (!pcm_is_ready(*haptic_pcm)) { + ALOGE("cannot open pcm_out driver: %s", pcm_get_error(*haptic_pcm)); + goto fail; + } + + ret = pcm_prepare(*haptic_pcm); + if (ret < 0) { + ALOGE("cannot prepare haptic_pcm: %s", pcm_get_error(*haptic_pcm)); + goto fail; + } + + ret = pcm_start(*haptic_pcm); + if (ret < 0) { + ALOGE("cannot start haptic_pcm: %s", pcm_get_error(*haptic_pcm)); + goto fail; + } + + return true; + } else { + if (*haptic_pcm) { + pcm_close(*haptic_pcm); + *haptic_pcm = NULL; + } + return true; + } + + fail: + pcm_close(*haptic_pcm); + *haptic_pcm = NULL; + return false; + } + bool uploadOwtEffect(int fd, uint8_t *owtData, uint32_t numBytes, struct ff_effect *effect, + uint32_t *outEffectIndex, int *status) override { + (*effect).u.periodic.custom_len = numBytes / sizeof(uint16_t); + delete[] ((*effect).u.periodic.custom_data); + (*effect).u.periodic.custom_data = new int16_t[(*effect).u.periodic.custom_len]{0x0000}; + if ((*effect).u.periodic.custom_data == nullptr) { + ALOGE("Failed to allocate memory for custom data\n"); + *status = EX_NULL_POINTER; + return false; + } + memcpy((*effect).u.periodic.custom_data, owtData, numBytes); + + if ((*effect).id != -1) { + ALOGE("(*effect).id != -1"); + } + + /* Create a new OWT waveform to update the PWLE or composite effect. */ + (*effect).id = -1; + if (ioctl(fd, EVIOCSFF, effect) < 0) { + ALOGE("Failed to upload effect %d (%d): %s", *outEffectIndex, errno, strerror(errno)); + delete[] ((*effect).u.periodic.custom_data); + *status = EX_ILLEGAL_STATE; + return false; + } + + if ((*effect).id >= FF_MAX_EFFECTS || (*effect).id < 0) { + ALOGE("Invalid waveform index after upload OWT effect: %d", (*effect).id); + *status = EX_ILLEGAL_ARGUMENT; + return false; + } + *outEffectIndex = (*effect).id; + *status = 0; + return true; + } + bool eraseOwtEffect(int fd, int8_t effectIndex, std::vector *effect) override { + uint32_t effectCountBefore, effectCountAfter, i, successFlush = 0; + + if (effectIndex < WAVEFORM_MAX_PHYSICAL_INDEX) { + ALOGE("Invalid waveform index for OWT erase: %d", effectIndex); + return false; + } + + if (effectIndex < WAVEFORM_MAX_INDEX) { + /* Normal situation. Only erase the effect which we just played. */ + if (ioctl(fd, EVIOCRMFF, effectIndex) < 0) { + ALOGE("Failed to erase effect %d (%d): %s", effectIndex, errno, strerror(errno)); + } + for (i = WAVEFORM_MAX_PHYSICAL_INDEX; i < WAVEFORM_MAX_INDEX; i++) { + if ((*effect)[i].id == effectIndex) { + (*effect)[i].id = -1; + break; + } + } + } else { + /* Flush all non-prestored effects of ff-core and driver. */ + getEffectCount(&effectCountBefore); + for (i = WAVEFORM_MAX_PHYSICAL_INDEX; i < FF_MAX_EFFECTS; i++) { + if (ioctl(fd, EVIOCRMFF, i) >= 0) { + successFlush++; + } + } + getEffectCount(&effectCountAfter); + ALOGW("Flushed effects: ff: %d; driver: %d -> %d; success: %d", effectIndex, + effectCountBefore, effectCountAfter, successFlush); + /* Reset all OWT effect index of HAL. */ + for (i = WAVEFORM_MAX_PHYSICAL_INDEX; i < WAVEFORM_MAX_INDEX; i++) { + (*effect)[i].id = -1; + } + } + return true; + } + + void debug(int fd) override { HwApiBase::debug(fd); } + + private: + std::ofstream mF0; + std::ofstream mF0Offset; + std::ofstream mRedc; + std::ofstream mQ; + std::ifstream mEffectCount; + std::ifstream mVibeState; + std::ifstream mOwtFreeSpace; + std::ofstream mF0CompEnable; + std::ofstream mRedcCompEnable; + std::ofstream mMinOnOffInterval; +}; + +class HwCal : public Vibrator::HwCal, private HwCalBase { + private: + static constexpr char VERSION[] = "version"; + static constexpr char F0_CONFIG[] = "f0_measured"; + static constexpr char REDC_CONFIG[] = "redc_measured"; + static constexpr char Q_CONFIG[] = "q_measured"; + static constexpr char TICK_VOLTAGES_CONFIG[] = "v_tick"; + static constexpr char CLICK_VOLTAGES_CONFIG[] = "v_click"; + static constexpr char LONG_VOLTAGES_CONFIG[] = "v_long"; + + static constexpr uint32_t VERSION_DEFAULT = 2; + static constexpr int32_t DEFAULT_FREQUENCY_SHIFT = 0; + static constexpr std::array V_TICK_DEFAULT = {1, 100}; + static constexpr std::array V_CLICK_DEFAULT = {1, 100}; + static constexpr std::array V_LONG_DEFAULT = {1, 100}; + + public: + HwCal() {} + + bool getVersion(uint32_t *value) override { + if (getPersist(VERSION, value)) { + return true; + } + *value = VERSION_DEFAULT; + return true; + } + bool getLongFrequencyShift(int32_t *value) override { + return getProperty("long.frequency.shift", value, DEFAULT_FREQUENCY_SHIFT); + } + bool getF0(std::string *value) override { return getPersist(F0_CONFIG, value); } + bool getRedc(std::string *value) override { return getPersist(REDC_CONFIG, value); } + bool getQ(std::string *value) override { return getPersist(Q_CONFIG, value); } + bool getTickVolLevels(std::array *value) override { + if (getPersist(TICK_VOLTAGES_CONFIG, value)) { + return true; + } + *value = V_TICK_DEFAULT; + return true; + } + bool getClickVolLevels(std::array *value) override { + if (getPersist(CLICK_VOLTAGES_CONFIG, value)) { + return true; + } + *value = V_CLICK_DEFAULT; + return true; + } + bool getLongVolLevels(std::array *value) override { + if (getPersist(LONG_VOLTAGES_CONFIG, value)) { + return true; + } + *value = V_LONG_DEFAULT; + return true; + } + bool isChirpEnabled() override { + bool value; + getProperty("chirp.enabled", &value, false); + return value; + } + bool getSupportedPrimitives(uint32_t *value) override { + return getProperty("supported_primitives", value, (uint32_t)0); + } + bool isF0CompEnabled() override { + bool value; + getProperty("f0.comp.enabled", &value, true); + return value; + } + bool isRedcCompEnabled() override { + bool value; + getProperty("redc.comp.enabled", &value, true); + return value; + } + void debug(int fd) override { HwCalBase::debug(fd); } +}; + +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/cs40l26/TEST_MAPPING b/vibrator/cs40l26/TEST_MAPPING new file mode 100644 index 0000000..1d8ff7a --- /dev/null +++ b/vibrator/cs40l26/TEST_MAPPING @@ -0,0 +1,10 @@ +{ + "presubmit": [ + { + "name": "VibratorHalCs40l26TestSuite", + "keywords": [ + "nextgen" + ] + } + ] +} diff --git a/vibrator/cs40l26/Vibrator.cpp b/vibrator/cs40l26/Vibrator.cpp new file mode 100644 index 0000000..3af057c --- /dev/null +++ b/vibrator/cs40l26/Vibrator.cpp @@ -0,0 +1,1327 @@ +/* + * Copyright (C) 2021 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "Vibrator.h" + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof((x)) / sizeof((x)[0])) +#endif + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { +static constexpr uint8_t FF_CUSTOM_DATA_LEN = 2; +static constexpr uint16_t FF_CUSTOM_DATA_LEN_MAX_COMP = 2044; // (COMPOSE_SIZE_MAX + 1) * 8 + 4 +static constexpr uint16_t FF_CUSTOM_DATA_LEN_MAX_PWLE = 2302; + +static constexpr uint32_t WAVEFORM_DOUBLE_CLICK_SILENCE_MS = 100; + +static constexpr uint32_t WAVEFORM_LONG_VIBRATION_THRESHOLD_MS = 50; + +static constexpr uint8_t VOLTAGE_SCALE_MAX = 100; + +static constexpr int8_t MAX_COLD_START_LATENCY_MS = 6; // I2C Transaction + DSP Return-From-Standby +static constexpr uint32_t MIN_ON_OFF_INTERVAL_US = 8500; // SVC initialization time +static constexpr int8_t MAX_PAUSE_TIMING_ERROR_MS = 1; // ALERT Irq Handling +static constexpr uint32_t MAX_TIME_MS = UINT16_MAX; + +static constexpr auto ASYNC_COMPLETION_TIMEOUT = std::chrono::milliseconds(100); +static constexpr auto POLLING_TIMEOUT = 20; +static constexpr int32_t COMPOSE_DELAY_MAX_MS = 10000; + +/* nsections is 8 bits. Need to preserve 1 section for the first delay before the first effect. */ +static constexpr int32_t COMPOSE_SIZE_MAX = 254; +static constexpr int32_t COMPOSE_PWLE_SIZE_MAX_DEFAULT = 127; + +// Measured resonant frequency, f0_measured, is represented by Q10.14 fixed +// point format on cs40l26 devices. The expression to calculate f0 is: +// f0 = f0_measured / 2^Q14_BIT_SHIFT +// See the LRA Calibration Support documentation for more details. +static constexpr int32_t Q14_BIT_SHIFT = 14; + +// Measured Q factor, q_measured, is represented by Q8.16 fixed +// point format on cs40l26 devices. The expression to calculate q is: +// q = q_measured / 2^Q16_BIT_SHIFT +// See the LRA Calibration Support documentation for more details. +static constexpr int32_t Q16_BIT_SHIFT = 16; + +static constexpr int32_t COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS = 16383; + +static constexpr uint32_t WT_LEN_CALCD = 0x00800000; +static constexpr uint8_t PWLE_CHIRP_BIT = 0x8; // Dynamic/static frequency and voltage +static constexpr uint8_t PWLE_BRAKE_BIT = 0x4; +static constexpr uint8_t PWLE_AMP_REG_BIT = 0x2; + +static constexpr float PWLE_LEVEL_MIN = 0.0; +static constexpr float PWLE_LEVEL_MAX = 1.0; +static constexpr float CS40L26_PWLE_LEVEL_MIX = -1.0; +static constexpr float CS40L26_PWLE_LEVEL_MAX = 0.9995118; +static constexpr float PWLE_FREQUENCY_RESOLUTION_HZ = 1.00; +static constexpr float PWLE_FREQUENCY_MIN_HZ = 1.00; +static constexpr float PWLE_FREQUENCY_MAX_HZ = 1000.00; +static constexpr float PWLE_BW_MAP_SIZE = + 1 + ((PWLE_FREQUENCY_MAX_HZ - PWLE_FREQUENCY_MIN_HZ) / PWLE_FREQUENCY_RESOLUTION_HZ); + +static uint16_t amplitudeToScale(float amplitude, float maximum) { + float ratio = 100; /* Unit: % */ + if (maximum != 0) + ratio = amplitude / maximum * 100; + + if (maximum == 0 || ratio > 100) + ratio = 100; + + return std::round(ratio); +} + +enum WaveformBankID : uint8_t { + RAM_WVFRM_BANK, + ROM_WVFRM_BANK, + OWT_WVFRM_BANK, +}; + +enum WaveformIndex : uint16_t { + /* Physical waveform */ + WAVEFORM_LONG_VIBRATION_EFFECT_INDEX = 0, + WAVEFORM_RESERVED_INDEX_1 = 1, + WAVEFORM_CLICK_INDEX = 2, + WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX = 3, + WAVEFORM_THUD_INDEX = 4, + WAVEFORM_SPIN_INDEX = 5, + WAVEFORM_QUICK_RISE_INDEX = 6, + WAVEFORM_SLOW_RISE_INDEX = 7, + WAVEFORM_QUICK_FALL_INDEX = 8, + WAVEFORM_LIGHT_TICK_INDEX = 9, + WAVEFORM_LOW_TICK_INDEX = 10, + WAVEFORM_RESERVED_MFG_1, + WAVEFORM_RESERVED_MFG_2, + WAVEFORM_RESERVED_MFG_3, + WAVEFORM_MAX_PHYSICAL_INDEX, + /* OWT waveform */ + WAVEFORM_COMPOSE = WAVEFORM_MAX_PHYSICAL_INDEX, + WAVEFORM_PWLE, + /* + * Refer to , the WAVEFORM_MAX_INDEX must not exceed 96. + * #define FF_GAIN 0x60 // 96 in decimal + * #define FF_MAX_EFFECTS FF_GAIN + */ + WAVEFORM_MAX_INDEX, +}; + +std::vector defaultSupportedPrimitives = { + ndk::enum_range().begin(), ndk::enum_range().end()}; + +enum vibe_state { + VIBE_STATE_STOPPED = 0, + VIBE_STATE_HAPTIC, + VIBE_STATE_ASP, +}; + +std::mutex mActiveId_mutex; // protects mActiveId + +static int min(int x, int y) { + return x < y ? x : y; +} + +static int floatToUint16(float input, uint16_t *output, float scale, float min, float max) { + if (input < min || input > max) + return -ERANGE; + + *output = roundf(input * scale); + return 0; +} + +struct dspmem_chunk { + uint8_t *head; + uint8_t *current; + uint8_t *max; + int bytes; + + uint32_t cache; + int cachebits; +}; + +static dspmem_chunk *dspmem_chunk_create(void *data, int size) { + auto ch = new dspmem_chunk{ + .head = reinterpret_cast(data), + .current = reinterpret_cast(data), + .max = reinterpret_cast(data) + size, + }; + + return ch; +} + +static bool dspmem_chunk_end(struct dspmem_chunk *ch) { + return ch->current == ch->max; +} + +static int dspmem_chunk_bytes(struct dspmem_chunk *ch) { + return ch->bytes; +} + +static int dspmem_chunk_write(struct dspmem_chunk *ch, int nbits, uint32_t val) { + int nwrite, i; + + nwrite = min(24 - ch->cachebits, nbits); + ch->cache <<= nwrite; + ch->cache |= val >> (nbits - nwrite); + ch->cachebits += nwrite; + nbits -= nwrite; + + if (ch->cachebits == 24) { + if (dspmem_chunk_end(ch)) + return -ENOSPC; + + ch->cache &= 0xFFFFFF; + for (i = 0; i < sizeof(ch->cache); i++, ch->cache <<= 8) + *ch->current++ = (ch->cache & 0xFF000000) >> 24; + + ch->bytes += sizeof(ch->cache); + ch->cachebits = 0; + } + + if (nbits) + return dspmem_chunk_write(ch, nbits, val); + + return 0; +} + +static int dspmem_chunk_flush(struct dspmem_chunk *ch) { + if (!ch->cachebits) + return 0; + + return dspmem_chunk_write(ch, 24 - ch->cachebits, 0); +} + +Vibrator::Vibrator(std::unique_ptr hwapi, std::unique_ptr hwcal) + : mHwApi(std::move(hwapi)), mHwCal(std::move(hwcal)), mAsyncHandle(std::async([] {})) { + int32_t longFrequencyShift; + std::string caldata{8, '0'}; + uint32_t calVer; + + const char *inputEventName = std::getenv("INPUT_EVENT_NAME"); + const char *inputEventPathName = std::getenv("INPUT_EVENT_PATH"); + if ((strstr(inputEventName, "cs40l26") != nullptr) || + (strstr(inputEventName, "cs40l26_dual_input") != nullptr)) { + glob_t inputEventPaths; + int fd = -1; + int ret; + uint32_t val = 0; + char str[20] = {0x00}; + for (uint8_t retry = 0; retry < 10; retry++) { + ret = glob(inputEventPathName, 0, nullptr, &inputEventPaths); + if (ret) { + ALOGE("Fail to get input event paths (%d): %s", errno, strerror(errno)); + } else { + for (int i = 0; i < inputEventPaths.gl_pathc; i++) { + fd = TEMP_FAILURE_RETRY(open(inputEventPaths.gl_pathv[i], O_RDWR)); + if (fd > 0) { + if (ioctl(fd, EVIOCGBIT(0, sizeof(val)), &val) > 0 && + (val & (1 << EV_FF)) && ioctl(fd, EVIOCGNAME(sizeof(str)), &str) > 0 && + strstr(str, inputEventName) != nullptr) { + mInputFd.reset(fd); + ALOGI("Control %s through %s", inputEventName, + inputEventPaths.gl_pathv[i]); + break; + } + close(fd); + } + } + } + + if (ret == 0) { + globfree(&inputEventPaths); + } + if (mInputFd.ok()) { + break; + } + + sleep(1); + ALOGW("Retry #%d to search in %zu input devices.", retry, inputEventPaths.gl_pathc); + } + + if (!mInputFd.ok()) { + ALOGE("Fail to get an input event with name %s", inputEventName); + } + } else { + ALOGE("The input name %s is not cs40l26_input or cs40l26_dual_input", inputEventName); + } + + mFfEffects.resize(WAVEFORM_MAX_INDEX); + mEffectDurations.resize(WAVEFORM_MAX_INDEX); + mEffectDurations = { + 1000, 100, 30, 1000, 300, 130, 150, 500, 100, 15, 20, 1000, 1000, 1000, + }; /* 11+3 waveforms. The duration must < UINT16_MAX */ + + uint8_t effectIndex; + for (effectIndex = 0; effectIndex < WAVEFORM_MAX_INDEX; effectIndex++) { + if (effectIndex < WAVEFORM_MAX_PHYSICAL_INDEX) { + /* Initialize physical waveforms. */ + mFfEffects[effectIndex] = { + .type = FF_PERIODIC, + .id = -1, + .replay.length = static_cast(mEffectDurations[effectIndex]), + .u.periodic.waveform = FF_CUSTOM, + .u.periodic.custom_data = new int16_t[2]{RAM_WVFRM_BANK, effectIndex}, + .u.periodic.custom_len = FF_CUSTOM_DATA_LEN, + }; + // Bypass the waveform update due to different input name + if ((strstr(inputEventName, "cs40l26") != nullptr) || + (strstr(inputEventName, "cs40l26_dual_input") != nullptr)) { + if (!mHwApi->setFFEffect( + mInputFd, &mFfEffects[effectIndex], + static_cast(mFfEffects[effectIndex].replay.length))) { + ALOGE("Failed upload effect %d (%d): %s", effectIndex, errno, strerror(errno)); + } + } + if (mFfEffects[effectIndex].id != effectIndex) { + ALOGW("Unexpected effect index: %d -> %d", effectIndex, mFfEffects[effectIndex].id); + } + } else { + /* Initiate placeholders for OWT effects. */ + mFfEffects[effectIndex] = { + .type = FF_PERIODIC, + .id = -1, + .replay.length = 0, + .u.periodic.waveform = FF_CUSTOM, + .u.periodic.custom_data = nullptr, + .u.periodic.custom_len = 0, + }; + } + } + + if (mHwCal->getF0(&caldata)) { + mHwApi->setF0(caldata); + } + if (mHwCal->getRedc(&caldata)) { + mHwApi->setRedc(caldata); + } + if (mHwCal->getQ(&caldata)) { + mHwApi->setQ(caldata); + } + + mHwCal->getLongFrequencyShift(&longFrequencyShift); + if (longFrequencyShift > 0) { + mF0Offset = longFrequencyShift * std::pow(2, 14); + } else if (longFrequencyShift < 0) { + mF0Offset = std::pow(2, 24) - std::abs(longFrequencyShift) * std::pow(2, 14); + } else { + mF0Offset = 0; + } + + mHwCal->getVersion(&calVer); + if (calVer == 2) { + mHwCal->getTickVolLevels(&mTickEffectVol); + mHwCal->getClickVolLevels(&mClickEffectVol); + mHwCal->getLongVolLevels(&mLongEffectVol); + } else { + ALOGD("Unsupported calibration version: %u!", calVer); + } + + mHwApi->setF0CompEnable(mHwCal->isF0CompEnabled()); + mHwApi->setRedcCompEnable(mHwCal->isRedcCompEnabled()); + + mIsUnderExternalControl = false; + + mIsChirpEnabled = mHwCal->isChirpEnabled(); + + mHwCal->getSupportedPrimitives(&mSupportedPrimitivesBits); + if (mSupportedPrimitivesBits > 0) { + for (auto e : defaultSupportedPrimitives) { + if (mSupportedPrimitivesBits & (1 << uint32_t(e))) { + mSupportedPrimitives.emplace_back(e); + } + } + } else { + for (auto e : defaultSupportedPrimitives) { + mSupportedPrimitivesBits |= (1 << uint32_t(e)); + } + mSupportedPrimitives = defaultSupportedPrimitives; + } + + mHwApi->setMinOnOffInterval(MIN_ON_OFF_INTERVAL_US); +} + +ndk::ScopedAStatus Vibrator::getCapabilities(int32_t *_aidl_return) { + ATRACE_NAME("Vibrator::getCapabilities"); + + int32_t ret = IVibrator::CAP_ON_CALLBACK | IVibrator::CAP_PERFORM_CALLBACK | + IVibrator::CAP_AMPLITUDE_CONTROL | IVibrator::CAP_GET_RESONANT_FREQUENCY | + IVibrator::CAP_GET_Q_FACTOR; + if (hasHapticAlsaDevice()) { + ret |= IVibrator::CAP_EXTERNAL_CONTROL; + } else { + ALOGE("No haptics ALSA device"); + } + if (mHwApi->hasOwtFreeSpace()) { + ret |= IVibrator::CAP_COMPOSE_EFFECTS; + if (mIsChirpEnabled) { + ret |= IVibrator::CAP_FREQUENCY_CONTROL | IVibrator::CAP_COMPOSE_PWLE_EFFECTS; + } + } + *_aidl_return = ret; + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::off() { + ATRACE_NAME("Vibrator::off"); + bool ret{true}; + const std::scoped_lock lock(mActiveId_mutex); + + if (mActiveId >= 0) { + /* Stop the active effect. */ + if (!mHwApi->setFFPlay(mInputFd, mActiveId, false)) { + ALOGE("Failed to stop effect %d (%d): %s", mActiveId, errno, strerror(errno)); + ret = false; + } + + if ((mActiveId >= WAVEFORM_MAX_PHYSICAL_INDEX) && + (!mHwApi->eraseOwtEffect(mInputFd, mActiveId, &mFfEffects))) { + ALOGE("Failed to clean up the composed effect %d", mActiveId); + ret = false; + } + } else { + ALOGV("Vibrator is already off"); + } + + mActiveId = -1; + setGlobalAmplitude(false); + if (mF0Offset) { + mHwApi->setF0Offset(0); + } + + if (ret) { + return ndk::ScopedAStatus::ok(); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } +} + +ndk::ScopedAStatus Vibrator::on(int32_t timeoutMs, + const std::shared_ptr &callback) { + ATRACE_NAME("Vibrator::on"); + if (timeoutMs > MAX_TIME_MS) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + const uint16_t index = (timeoutMs < WAVEFORM_LONG_VIBRATION_THRESHOLD_MS) + ? WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX + : WAVEFORM_LONG_VIBRATION_EFFECT_INDEX; + if (MAX_COLD_START_LATENCY_MS <= MAX_TIME_MS - timeoutMs) { + timeoutMs += MAX_COLD_START_LATENCY_MS; + } + setGlobalAmplitude(true); + if (mF0Offset) { + mHwApi->setF0Offset(mF0Offset); + } + return on(timeoutMs, index, nullptr /*ignored*/, callback); +} + +ndk::ScopedAStatus Vibrator::perform(Effect effect, EffectStrength strength, + const std::shared_ptr &callback, + int32_t *_aidl_return) { + ATRACE_NAME("Vibrator::perform"); + return performEffect(effect, strength, callback, _aidl_return); +} + +ndk::ScopedAStatus Vibrator::getSupportedEffects(std::vector *_aidl_return) { + *_aidl_return = {Effect::TEXTURE_TICK, Effect::TICK, Effect::CLICK, Effect::HEAVY_CLICK, + Effect::DOUBLE_CLICK}; + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::setAmplitude(float amplitude) { + ATRACE_NAME("Vibrator::setAmplitude"); + if (amplitude <= 0.0f || amplitude > 1.0f) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + mLongEffectScale = amplitude; + if (!isUnderExternalControl()) { + return setGlobalAmplitude(true); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } +} + +ndk::ScopedAStatus Vibrator::setExternalControl(bool enabled) { + ATRACE_NAME("Vibrator::setExternalControl"); + setGlobalAmplitude(enabled); + + if (mHasHapticAlsaDevice || mConfigHapticAlsaDeviceDone || hasHapticAlsaDevice()) { + if (!mHwApi->setHapticPcmAmp(&mHapticPcm, enabled, mCard, mDevice)) { + ALOGE("Failed to %s haptic pcm device: %d", (enabled ? "enable" : "disable"), mDevice); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + } else { + ALOGE("No haptics ALSA device"); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + + mIsUnderExternalControl = enabled; + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getCompositionDelayMax(int32_t *maxDelayMs) { + ATRACE_NAME("Vibrator::getCompositionDelayMax"); + *maxDelayMs = COMPOSE_DELAY_MAX_MS; + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getCompositionSizeMax(int32_t *maxSize) { + ATRACE_NAME("Vibrator::getCompositionSizeMax"); + *maxSize = COMPOSE_SIZE_MAX; + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getSupportedPrimitives(std::vector *supported) { + *supported = mSupportedPrimitives; + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getPrimitiveDuration(CompositePrimitive primitive, + int32_t *durationMs) { + ndk::ScopedAStatus status; + uint32_t effectIndex; + if (primitive != CompositePrimitive::NOOP) { + status = getPrimitiveDetails(primitive, &effectIndex); + if (!status.isOk()) { + return status; + } + + *durationMs = mEffectDurations[effectIndex]; + } else { + *durationMs = 0; + } + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::compose(const std::vector &composite, + const std::shared_ptr &callback) { + ATRACE_NAME("Vibrator::compose"); + uint16_t size; + uint16_t nextEffectDelay; + + auto ch = dspmem_chunk_create(new uint8_t[FF_CUSTOM_DATA_LEN_MAX_COMP]{0x00}, + FF_CUSTOM_DATA_LEN_MAX_COMP); + + if (composite.size() > COMPOSE_SIZE_MAX || composite.empty()) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + /* Check if there is a wait before the first effect. */ + nextEffectDelay = composite.front().delayMs; + if (nextEffectDelay > COMPOSE_DELAY_MAX_MS || nextEffectDelay < 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } else if (nextEffectDelay > 0) { + size = composite.size() + 1; + } else { + size = composite.size(); + } + + dspmem_chunk_write(ch, 8, 0); /* Padding */ + dspmem_chunk_write(ch, 8, (uint8_t)(0xFF & size)); /* nsections */ + dspmem_chunk_write(ch, 8, 0); /* repeat */ + uint8_t header_count = dspmem_chunk_bytes(ch); + + /* Insert 1 section for a wait before the first effect. */ + if (nextEffectDelay) { + dspmem_chunk_write(ch, 32, 0); /* amplitude, index, repeat & flags */ + dspmem_chunk_write(ch, 16, (uint16_t)(0xFFFF & nextEffectDelay)); /* delay */ + } + + for (uint32_t i_curr = 0, i_next = 1; i_curr < composite.size(); i_curr++, i_next++) { + auto &e_curr = composite[i_curr]; + uint32_t effectIndex = 0; + uint32_t effectVolLevel = 0; + if (e_curr.scale < 0.0f || e_curr.scale > 1.0f) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + if (e_curr.primitive != CompositePrimitive::NOOP) { + ndk::ScopedAStatus status; + status = getPrimitiveDetails(e_curr.primitive, &effectIndex); + if (!status.isOk()) { + return status; + } + effectVolLevel = intensityToVolLevel(e_curr.scale, effectIndex); + } + + /* Fetch the next composite effect delay and fill into the current section */ + nextEffectDelay = 0; + if (i_next < composite.size()) { + auto &e_next = composite[i_next]; + int32_t delay = e_next.delayMs; + + if (delay > COMPOSE_DELAY_MAX_MS || delay < 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + nextEffectDelay = delay; + } + + if (effectIndex == 0 && nextEffectDelay == 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + dspmem_chunk_write(ch, 8, (uint8_t)(0xFF & effectVolLevel)); /* amplitude */ + dspmem_chunk_write(ch, 8, (uint8_t)(0xFF & effectIndex)); /* index */ + dspmem_chunk_write(ch, 8, 0); /* repeat */ + dspmem_chunk_write(ch, 8, 0); /* flags */ + dspmem_chunk_write(ch, 16, (uint16_t)(0xFFFF & nextEffectDelay)); /* delay */ + } + dspmem_chunk_flush(ch); + if (header_count == dspmem_chunk_bytes(ch)) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } else { + return performEffect(WAVEFORM_MAX_INDEX /*ignored*/, VOLTAGE_SCALE_MAX /*ignored*/, ch, + callback); + } +} + +ndk::ScopedAStatus Vibrator::on(uint32_t timeoutMs, uint32_t effectIndex, dspmem_chunk *ch, + const std::shared_ptr &callback) { + ndk::ScopedAStatus status = ndk::ScopedAStatus::ok(); + + if (effectIndex >= FF_MAX_EFFECTS) { + ALOGE("Invalid waveform index %d", effectIndex); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + if (mAsyncHandle.wait_for(ASYNC_COMPLETION_TIMEOUT) != std::future_status::ready) { + ALOGE("Previous vibration pending: prev: %d, curr: %d", mActiveId, effectIndex); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + + if (ch) { + /* Upload OWT effect. */ + if (ch->head == nullptr) { + ALOGE("Invalid OWT bank"); + delete ch; + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + bool isPwle = (*reinterpret_cast(ch->head) != 0x0000); + effectIndex = isPwle ? WAVEFORM_PWLE : WAVEFORM_COMPOSE; + + uint32_t freeBytes; + mHwApi->getOwtFreeSpace(&freeBytes); + if (dspmem_chunk_bytes(ch) > freeBytes) { + ALOGE("Invalid OWT length: Effect %d: %d > %d!", effectIndex, dspmem_chunk_bytes(ch), + freeBytes); + delete ch; + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + int errorStatus; + if (!mHwApi->uploadOwtEffect(mInputFd, ch->head, dspmem_chunk_bytes(ch), + &mFfEffects[effectIndex], &effectIndex, &errorStatus)) { + delete ch; + ALOGE("Invalid uploadOwtEffect"); + return ndk::ScopedAStatus::fromExceptionCode(errorStatus); + } + delete ch; + + } else if (effectIndex == WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX || + effectIndex == WAVEFORM_LONG_VIBRATION_EFFECT_INDEX) { + /* Update duration for long/short vibration. */ + mFfEffects[effectIndex].replay.length = static_cast(timeoutMs); + if (!mHwApi->setFFEffect(mInputFd, &mFfEffects[effectIndex], + static_cast(timeoutMs))) { + ALOGE("Failed to edit effect %d (%d): %s", effectIndex, errno, strerror(errno)); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + } + + const std::scoped_lock lock(mActiveId_mutex); + mActiveId = effectIndex; + /* Play the event now. */ + if (!mHwApi->setFFPlay(mInputFd, effectIndex, true)) { + ALOGE("Failed to play effect %d (%d): %s", effectIndex, errno, strerror(errno)); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + + mAsyncHandle = std::async(&Vibrator::waitForComplete, this, callback); + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::setEffectAmplitude(float amplitude, float maximum) { + uint16_t scale = amplitudeToScale(amplitude, maximum); + if (!mHwApi->setFFGain(mInputFd, scale)) { + ALOGE("Failed to set the gain to %u (%d): %s", scale, errno, strerror(errno)); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::setGlobalAmplitude(bool set) { + uint8_t amplitude = set ? roundf(mLongEffectScale * mLongEffectVol[1]) : VOLTAGE_SCALE_MAX; + if (!set) { + mLongEffectScale = 1.0; // Reset the scale for the later new effect. + } + return setEffectAmplitude(amplitude, VOLTAGE_SCALE_MAX); +} + +ndk::ScopedAStatus Vibrator::getSupportedAlwaysOnEffects(std::vector * /*_aidl_return*/) { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); +} + +ndk::ScopedAStatus Vibrator::alwaysOnEnable(int32_t /*id*/, Effect /*effect*/, + EffectStrength /*strength*/) { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); +} +ndk::ScopedAStatus Vibrator::alwaysOnDisable(int32_t /*id*/) { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); +} + +ndk::ScopedAStatus Vibrator::getResonantFrequency(float *resonantFreqHz) { + std::string caldata{8, '0'}; + if (!mHwCal->getF0(&caldata)) { + ALOGE("Failed to get resonant frequency (%d): %s", errno, strerror(errno)); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + *resonantFreqHz = static_cast(std::stoul(caldata, nullptr, 16)) / (1 << Q14_BIT_SHIFT); + + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getQFactor(float *qFactor) { + std::string caldata{8, '0'}; + if (!mHwCal->getQ(&caldata)) { + ALOGE("Failed to get q factor (%d): %s", errno, strerror(errno)); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); + } + *qFactor = static_cast(std::stoul(caldata, nullptr, 16)) / (1 << Q16_BIT_SHIFT); + + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getFrequencyResolution(float *freqResolutionHz) { + int32_t capabilities; + Vibrator::getCapabilities(&capabilities); + if (capabilities & IVibrator::CAP_FREQUENCY_CONTROL) { + *freqResolutionHz = PWLE_FREQUENCY_RESOLUTION_HZ; + return ndk::ScopedAStatus::ok(); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } +} + +ndk::ScopedAStatus Vibrator::getFrequencyMinimum(float *freqMinimumHz) { + int32_t capabilities; + Vibrator::getCapabilities(&capabilities); + if (capabilities & IVibrator::CAP_FREQUENCY_CONTROL) { + *freqMinimumHz = PWLE_FREQUENCY_MIN_HZ; + return ndk::ScopedAStatus::ok(); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } +} + +ndk::ScopedAStatus Vibrator::getBandwidthAmplitudeMap(std::vector *_aidl_return) { + // TODO(b/170919640): complete implementation + int32_t capabilities; + Vibrator::getCapabilities(&capabilities); + if (capabilities & IVibrator::CAP_FREQUENCY_CONTROL) { + std::vector bandwidthAmplitudeMap(PWLE_BW_MAP_SIZE, 1.0); + *_aidl_return = bandwidthAmplitudeMap; + return ndk::ScopedAStatus::ok(); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } +} + +ndk::ScopedAStatus Vibrator::getPwlePrimitiveDurationMax(int32_t *durationMs) { + int32_t capabilities; + Vibrator::getCapabilities(&capabilities); + if (capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) { + *durationMs = COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS; + return ndk::ScopedAStatus::ok(); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } +} + +ndk::ScopedAStatus Vibrator::getPwleCompositionSizeMax(int32_t *maxSize) { + int32_t capabilities; + Vibrator::getCapabilities(&capabilities); + if (capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) { + *maxSize = COMPOSE_PWLE_SIZE_MAX_DEFAULT; + return ndk::ScopedAStatus::ok(); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } +} + +ndk::ScopedAStatus Vibrator::getSupportedBraking(std::vector *supported) { + int32_t capabilities; + Vibrator::getCapabilities(&capabilities); + if (capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) { + *supported = { + Braking::NONE, + }; + return ndk::ScopedAStatus::ok(); + } else { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } +} + +static void resetPreviousEndAmplitudeEndFrequency(float *prevEndAmplitude, + float *prevEndFrequency) { + const float reset = -1.0; + *prevEndAmplitude = reset; + *prevEndFrequency = reset; +} + +static void incrementIndex(int *index) { + *index += 1; +} + +static void constructPwleSegment(dspmem_chunk *ch, uint16_t delay, uint16_t amplitude, + uint16_t frequency, uint8_t flags, uint32_t vbemfTarget = 0) { + dspmem_chunk_write(ch, 16, delay); + dspmem_chunk_write(ch, 12, amplitude); + dspmem_chunk_write(ch, 12, frequency); + /* feature flags to control the chirp, CLAB braking, back EMF amplitude regulation */ + dspmem_chunk_write(ch, 8, (flags | 1) << 4); + if (flags & PWLE_AMP_REG_BIT) { + dspmem_chunk_write(ch, 24, vbemfTarget); /* target back EMF voltage */ + } +} + +static int constructActiveSegment(dspmem_chunk *ch, int duration, float amplitude, float frequency, + bool chirp) { + uint16_t delay = 0; + uint16_t amp = 0; + uint16_t freq = 0; + uint8_t flags = 0x0; + if ((floatToUint16(duration, &delay, 4, 0.0f, COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) < 0) || + (floatToUint16(amplitude, &, 2048, CS40L26_PWLE_LEVEL_MIX, CS40L26_PWLE_LEVEL_MAX) < + 0) || + (floatToUint16(frequency, &freq, 4, PWLE_FREQUENCY_MIN_HZ, PWLE_FREQUENCY_MAX_HZ) < 0)) { + ALOGE("Invalid argument: %d, %f, %f", duration, amplitude, frequency); + return -ERANGE; + } + if (chirp) { + flags |= PWLE_CHIRP_BIT; + } + constructPwleSegment(ch, delay, amp, freq, flags, 0 /*ignored*/); + return 0; +} + +static int constructBrakingSegment(dspmem_chunk *ch, int duration, Braking brakingType) { + uint16_t delay = 0; + uint16_t freq = 0; + uint8_t flags = 0x00; + if (floatToUint16(duration, &delay, 4, 0.0f, COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) < 0) { + ALOGE("Invalid argument: %d", duration); + return -ERANGE; + } + floatToUint16(PWLE_FREQUENCY_MIN_HZ, &freq, 4, PWLE_FREQUENCY_MIN_HZ, PWLE_FREQUENCY_MAX_HZ); + if (static_cast::type>(brakingType)) { + flags |= PWLE_BRAKE_BIT; + } + + constructPwleSegment(ch, delay, 0 /*ignored*/, freq, flags, 0 /*ignored*/); + return 0; +} + +static void updateWLength(dspmem_chunk *ch, uint32_t totalDuration) { + totalDuration *= 8; /* Unit: 0.125 ms (since wlength played @ 8kHz). */ + totalDuration |= WT_LEN_CALCD; /* Bit 23 is for WT_LEN_CALCD; Bit 22 is for WT_INDEFINITE. */ + *(ch->head + 0) = (totalDuration >> 24) & 0xFF; + *(ch->head + 1) = (totalDuration >> 16) & 0xFF; + *(ch->head + 2) = (totalDuration >> 8) & 0xFF; + *(ch->head + 3) = totalDuration & 0xFF; +} + +static void updateNSection(dspmem_chunk *ch, int segmentIdx) { + *(ch->head + 7) |= (0xF0 & segmentIdx) >> 4; /* Bit 4 to 7 */ + *(ch->head + 9) |= (0x0F & segmentIdx) << 4; /* Bit 3 to 0 */ +} + +ndk::ScopedAStatus Vibrator::composePwle(const std::vector &composite, + const std::shared_ptr &callback) { + ATRACE_NAME("Vibrator::composePwle"); + int32_t capabilities; + + Vibrator::getCapabilities(&capabilities); + if ((capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) == 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } + + if (composite.empty() || composite.size() > COMPOSE_PWLE_SIZE_MAX_DEFAULT) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + std::vector supported; + Vibrator::getSupportedBraking(&supported); + bool isClabSupported = + std::find(supported.begin(), supported.end(), Braking::CLAB) != supported.end(); + + int segmentIdx = 0; + uint32_t totalDuration = 0; + float prevEndAmplitude; + float prevEndFrequency; + resetPreviousEndAmplitudeEndFrequency(&prevEndAmplitude, &prevEndFrequency); + auto ch = dspmem_chunk_create(new uint8_t[FF_CUSTOM_DATA_LEN_MAX_PWLE]{0x00}, + FF_CUSTOM_DATA_LEN_MAX_PWLE); + bool chirp = false; + + dspmem_chunk_write(ch, 24, 0x000000); /* Waveform length placeholder */ + dspmem_chunk_write(ch, 8, 0); /* Repeat */ + dspmem_chunk_write(ch, 12, 0); /* Wait time between repeats */ + dspmem_chunk_write(ch, 8, 0x00); /* nsections placeholder */ + + for (auto &e : composite) { + switch (e.getTag()) { + case PrimitivePwle::active: { + auto active = e.get(); + if (active.duration < 0 || + active.duration > COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + if (active.startAmplitude < PWLE_LEVEL_MIN || + active.startAmplitude > PWLE_LEVEL_MAX || + active.endAmplitude < PWLE_LEVEL_MIN || active.endAmplitude > PWLE_LEVEL_MAX) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + if (active.startAmplitude > CS40L26_PWLE_LEVEL_MAX) { + active.startAmplitude = CS40L26_PWLE_LEVEL_MAX; + } + if (active.endAmplitude > CS40L26_PWLE_LEVEL_MAX) { + active.endAmplitude = CS40L26_PWLE_LEVEL_MAX; + } + + if (active.startFrequency < PWLE_FREQUENCY_MIN_HZ || + active.startFrequency > PWLE_FREQUENCY_MAX_HZ || + active.endFrequency < PWLE_FREQUENCY_MIN_HZ || + active.endFrequency > PWLE_FREQUENCY_MAX_HZ) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + if (!((active.startAmplitude == prevEndAmplitude) && + (active.startFrequency == prevEndFrequency))) { + if (constructActiveSegment(ch, 0, active.startAmplitude, active.startFrequency, + false) < 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + incrementIndex(&segmentIdx); + } + + if (active.startFrequency != active.endFrequency) { + chirp = true; + } + if (constructActiveSegment(ch, active.duration, active.endAmplitude, + active.endFrequency, chirp) < 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + incrementIndex(&segmentIdx); + + prevEndAmplitude = active.endAmplitude; + prevEndFrequency = active.endFrequency; + totalDuration += active.duration; + chirp = false; + break; + } + case PrimitivePwle::braking: { + auto braking = e.get(); + if (braking.braking > Braking::CLAB) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } else if (!isClabSupported && (braking.braking == Braking::CLAB)) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + if (braking.duration > COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + + if (constructBrakingSegment(ch, 0, braking.braking) < 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + incrementIndex(&segmentIdx); + + if (constructBrakingSegment(ch, braking.duration, braking.braking) < 0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + incrementIndex(&segmentIdx); + + resetPreviousEndAmplitudeEndFrequency(&prevEndAmplitude, &prevEndFrequency); + totalDuration += braking.duration; + break; + } + } + + if (segmentIdx > COMPOSE_PWLE_SIZE_MAX_DEFAULT) { + ALOGE("Too many PrimitivePwle section!"); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + } + dspmem_chunk_flush(ch); + + /* Update wlength */ + totalDuration += MAX_COLD_START_LATENCY_MS; + if (totalDuration > 0x7FFFF) { + ALOGE("Total duration is too long (%d)!", totalDuration); + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + } + updateWLength(ch, totalDuration); + + /* Update nsections */ + updateNSection(ch, segmentIdx); + + return performEffect(WAVEFORM_MAX_INDEX /*ignored*/, VOLTAGE_SCALE_MAX /*ignored*/, ch, + callback); +} + +bool Vibrator::isUnderExternalControl() { + return mIsUnderExternalControl; +} + +binder_status_t Vibrator::dump(int fd, const char **args, uint32_t numArgs) { + if (fd < 0) { + ALOGE("Called debug() with invalid fd."); + return STATUS_OK; + } + + (void)args; + (void)numArgs; + + dprintf(fd, "AIDL:\n"); + + dprintf(fd, " F0 Offset: %" PRIu32 "\n", mF0Offset); + + dprintf(fd, " Voltage Levels:\n"); + dprintf(fd, " Tick Effect Min: %" PRIu32 " Max: %" PRIu32 "\n", mTickEffectVol[0], + mTickEffectVol[1]); + dprintf(fd, " Click Effect Min: %" PRIu32 " Max: %" PRIu32 "\n", mClickEffectVol[0], + mClickEffectVol[1]); + dprintf(fd, " Long Effect Min: %" PRIu32 " Max: %" PRIu32 "\n", mLongEffectVol[0], + mLongEffectVol[1]); + + dprintf(fd, " FF effect:\n"); + dprintf(fd, " Physical waveform:\n"); + dprintf(fd, "\tId\tIndex\tt ->\tt'\n"); + for (uint8_t effectId = 0; effectId < WAVEFORM_MAX_PHYSICAL_INDEX; effectId++) { + dprintf(fd, "\t%d\t%d\t%d\t%d\n", mFfEffects[effectId].id, + mFfEffects[effectId].u.periodic.custom_data[1], mEffectDurations[effectId], + mFfEffects[effectId].replay.length); + } + dprintf(fd, " OWT waveform:\n"); + dprintf(fd, "\tId\tBytes\tData\n"); + for (uint8_t effectId = WAVEFORM_MAX_PHYSICAL_INDEX; effectId < WAVEFORM_MAX_INDEX; + effectId++) { + uint32_t numBytes = mFfEffects[effectId].u.periodic.custom_len * 2; + std::stringstream ss; + ss << " "; + for (int i = 0; i < numBytes; i++) { + ss << std::uppercase << std::setfill('0') << std::setw(2) << std::hex + << (uint16_t)(*( + reinterpret_cast(mFfEffects[effectId].u.periodic.custom_data) + + i)) + << " "; + } + dprintf(fd, "\t%d\t%d\t{%s}\n", mFfEffects[effectId].id, numBytes, ss.str().c_str()); + } + + dprintf(fd, "\n"); + dprintf(fd, "\n"); + + mHwApi->debug(fd); + + dprintf(fd, "\n"); + + mHwCal->debug(fd); + + fsync(fd); + return STATUS_OK; +} + +bool Vibrator::hasHapticAlsaDevice() { + // We need to call findHapticAlsaDevice once only. Calling in the + // constructor is too early in the boot process and the pcm file contents + // are empty. Hence we make the call here once only right before we need to. + if (!mConfigHapticAlsaDeviceDone) { + if (mHwApi->getHapticAlsaDevice(&mCard, &mDevice)) { + mHasHapticAlsaDevice = true; + mConfigHapticAlsaDeviceDone = true; + } else { + ALOGE("Haptic ALSA device not supported"); + } + } else { + ALOGD("Haptic ALSA device configuration done."); + } + return mHasHapticAlsaDevice; +} + +ndk::ScopedAStatus Vibrator::getSimpleDetails(Effect effect, EffectStrength strength, + uint32_t *outEffectIndex, uint32_t *outTimeMs, + uint32_t *outVolLevel) { + uint32_t effectIndex; + uint32_t timeMs; + float intensity; + uint32_t volLevel; + switch (strength) { + case EffectStrength::LIGHT: + intensity = 0.5f; + break; + case EffectStrength::MEDIUM: + intensity = 0.7f; + break; + case EffectStrength::STRONG: + intensity = 1.0f; + break; + default: + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } + + switch (effect) { + case Effect::TEXTURE_TICK: + effectIndex = WAVEFORM_LIGHT_TICK_INDEX; + intensity *= 0.5f; + break; + case Effect::TICK: + effectIndex = WAVEFORM_CLICK_INDEX; + intensity *= 0.5f; + break; + case Effect::CLICK: + effectIndex = WAVEFORM_CLICK_INDEX; + intensity *= 0.7f; + break; + case Effect::HEAVY_CLICK: + effectIndex = WAVEFORM_CLICK_INDEX; + intensity *= 1.0f; + break; + default: + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } + + volLevel = intensityToVolLevel(intensity, effectIndex); + timeMs = mEffectDurations[effectIndex] + MAX_COLD_START_LATENCY_MS; + + *outEffectIndex = effectIndex; + *outTimeMs = timeMs; + *outVolLevel = volLevel; + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getCompoundDetails(Effect effect, EffectStrength strength, + uint32_t *outTimeMs, dspmem_chunk *outCh) { + ndk::ScopedAStatus status; + uint32_t timeMs = 0; + uint32_t thisEffectIndex; + uint32_t thisTimeMs; + uint32_t thisVolLevel; + switch (effect) { + case Effect::DOUBLE_CLICK: + dspmem_chunk_write(outCh, 8, 0); /* Padding */ + dspmem_chunk_write(outCh, 8, 2); /* nsections */ + dspmem_chunk_write(outCh, 8, 0); /* repeat */ + + status = getSimpleDetails(Effect::CLICK, strength, &thisEffectIndex, &thisTimeMs, + &thisVolLevel); + if (!status.isOk()) { + return status; + } + timeMs += thisTimeMs; + + dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisVolLevel)); /* amplitude */ + dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisEffectIndex)); /* index */ + dspmem_chunk_write(outCh, 8, 0); /* repeat */ + dspmem_chunk_write(outCh, 8, 0); /* flags */ + dspmem_chunk_write(outCh, 16, + (uint16_t)(0xFFFF & WAVEFORM_DOUBLE_CLICK_SILENCE_MS)); /* delay */ + + timeMs += WAVEFORM_DOUBLE_CLICK_SILENCE_MS + MAX_PAUSE_TIMING_ERROR_MS; + + status = getSimpleDetails(Effect::HEAVY_CLICK, strength, &thisEffectIndex, &thisTimeMs, + &thisVolLevel); + if (!status.isOk()) { + return status; + } + timeMs += thisTimeMs; + + dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisVolLevel)); /* amplitude */ + dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisEffectIndex)); /* index */ + dspmem_chunk_write(outCh, 8, 0); /* repeat */ + dspmem_chunk_write(outCh, 8, 0); /* flags */ + dspmem_chunk_write(outCh, 16, 0); /* delay */ + dspmem_chunk_flush(outCh); + + break; + default: + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } + + *outTimeMs = timeMs; + + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::getPrimitiveDetails(CompositePrimitive primitive, + uint32_t *outEffectIndex) { + uint32_t effectIndex; + uint32_t primitiveBit = 1 << int32_t(primitive); + if ((primitiveBit & mSupportedPrimitivesBits) == 0x0) { + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } + + switch (primitive) { + case CompositePrimitive::NOOP: + return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT); + case CompositePrimitive::CLICK: + effectIndex = WAVEFORM_CLICK_INDEX; + break; + case CompositePrimitive::THUD: + effectIndex = WAVEFORM_THUD_INDEX; + break; + case CompositePrimitive::SPIN: + effectIndex = WAVEFORM_SPIN_INDEX; + break; + case CompositePrimitive::QUICK_RISE: + effectIndex = WAVEFORM_QUICK_RISE_INDEX; + break; + case CompositePrimitive::SLOW_RISE: + effectIndex = WAVEFORM_SLOW_RISE_INDEX; + break; + case CompositePrimitive::QUICK_FALL: + effectIndex = WAVEFORM_QUICK_FALL_INDEX; + break; + case CompositePrimitive::LIGHT_TICK: + effectIndex = WAVEFORM_LIGHT_TICK_INDEX; + break; + case CompositePrimitive::LOW_TICK: + effectIndex = WAVEFORM_LOW_TICK_INDEX; + break; + default: + return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + } + + *outEffectIndex = effectIndex; + + return ndk::ScopedAStatus::ok(); +} + +ndk::ScopedAStatus Vibrator::performEffect(Effect effect, EffectStrength strength, + const std::shared_ptr &callback, + int32_t *outTimeMs) { + ndk::ScopedAStatus status; + uint32_t effectIndex; + uint32_t timeMs = 0; + uint32_t volLevel; + dspmem_chunk *ch = nullptr; + switch (effect) { + case Effect::TEXTURE_TICK: + // fall-through + case Effect::TICK: + // fall-through + case Effect::CLICK: + // fall-through + case Effect::HEAVY_CLICK: + status = getSimpleDetails(effect, strength, &effectIndex, &timeMs, &volLevel); + break; + case Effect::DOUBLE_CLICK: + ch = dspmem_chunk_create(new uint8_t[FF_CUSTOM_DATA_LEN_MAX_COMP]{0x00}, + FF_CUSTOM_DATA_LEN_MAX_COMP); + status = getCompoundDetails(effect, strength, &timeMs, ch); + volLevel = VOLTAGE_SCALE_MAX; + break; + default: + status = ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION); + break; + } + if (!status.isOk()) { + goto exit; + } + + status = performEffect(effectIndex, volLevel, ch, callback); + +exit: + *outTimeMs = timeMs; + return status; +} + +ndk::ScopedAStatus Vibrator::performEffect(uint32_t effectIndex, uint32_t volLevel, + dspmem_chunk *ch, + const std::shared_ptr &callback) { + setEffectAmplitude(volLevel, VOLTAGE_SCALE_MAX); + + return on(MAX_TIME_MS, effectIndex, ch, callback); +} + +void Vibrator::waitForComplete(std::shared_ptr &&callback) { + if (!mHwApi->pollVibeState(VIBE_STATE_HAPTIC, POLLING_TIMEOUT)) { + ALOGW("Failed to get state \"Haptic\""); + } + mHwApi->pollVibeState(VIBE_STATE_STOPPED); + + const std::scoped_lock lock(mActiveId_mutex); + if ((mActiveId >= WAVEFORM_MAX_PHYSICAL_INDEX) && + (!mHwApi->eraseOwtEffect(mInputFd, mActiveId, &mFfEffects))) { + ALOGE("Failed to clean up the composed effect %d", mActiveId); + } + mActiveId = -1; + + if (callback) { + auto ret = callback->onComplete(); + if (!ret.isOk()) { + ALOGE("Failed completion callback: %d", ret.getExceptionCode()); + } + } +} + +uint32_t Vibrator::intensityToVolLevel(float intensity, uint32_t effectIndex) { + uint32_t volLevel; + auto calc = [](float intst, std::array v) -> uint32_t { + return std::lround(intst * (v[1] - v[0])) + v[0]; + }; + + switch (effectIndex) { + case WAVEFORM_LIGHT_TICK_INDEX: + volLevel = calc(intensity, mTickEffectVol); + break; + case WAVEFORM_QUICK_RISE_INDEX: + // fall-through + case WAVEFORM_QUICK_FALL_INDEX: + volLevel = calc(intensity, mLongEffectVol); + break; + case WAVEFORM_CLICK_INDEX: + // fall-through + case WAVEFORM_THUD_INDEX: + // fall-through + case WAVEFORM_SPIN_INDEX: + // fall-through + case WAVEFORM_SLOW_RISE_INDEX: + // fall-through + default: + volLevel = calc(intensity, mClickEffectVol); + break; + } + return volLevel; +} + +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/cs40l26/Vibrator.h b/vibrator/cs40l26/Vibrator.h new file mode 100644 index 0000000..220c974 --- /dev/null +++ b/vibrator/cs40l26/Vibrator.h @@ -0,0 +1,211 @@ +/* + * Copyright (C) 2021 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include +#include +#include +#include + +#include +#include +#include + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { + +class Vibrator : public BnVibrator { + public: + // APIs for interfacing with the kernel driver. + class HwApi { + public: + virtual ~HwApi() = default; + // Stores the LRA resonant frequency to be used for PWLE playback + // and click compensation. + virtual bool setF0(std::string value) = 0; + // Stores the frequency offset for long vibrations. + virtual bool setF0Offset(uint32_t value) = 0; + // Stores the LRA series resistance to be used for click + // compensation. + virtual bool setRedc(std::string value) = 0; + // Stores the LRA Q factor to be used for Q-dependent waveform + // selection. + virtual bool setQ(std::string value) = 0; + // Reports the number of effect waveforms loaded in firmware. + virtual bool getEffectCount(uint32_t *value) = 0; + // Blocks until timeout or vibrator reaches desired state + // (2 = ASP enabled, 1 = haptic enabled, 0 = disabled). + virtual bool pollVibeState(uint32_t value, int32_t timeoutMs = -1) = 0; + // Reports whether getOwtFreeSpace() is supported. + virtual bool hasOwtFreeSpace() = 0; + // Reports the available OWT bytes. + virtual bool getOwtFreeSpace(uint32_t *value) = 0; + // Enables/Disables F0 compensation enable status + virtual bool setF0CompEnable(bool value) = 0; + // Enables/Disables Redc compensation enable status + virtual bool setRedcCompEnable(bool value) = 0; + // Stores the minumun delay time between playback and stop effects. + virtual bool setMinOnOffInterval(uint32_t value) = 0; + // Indicates the number of 0.125-dB steps of attenuation to apply to + // waveforms triggered in response to vibration calls from the + // Android vibrator HAL. + virtual bool setFFGain(int fd, uint16_t value) = 0; + // Create/modify custom effects for all physical waveforms. + virtual bool setFFEffect(int fd, struct ff_effect *effect, uint16_t timeoutMs) = 0; + // Activates/deactivates the effect index after setFFGain() and setFFEffect(). + virtual bool setFFPlay(int fd, int8_t index, bool value) = 0; + // Get the Alsa device for the audio coupled haptics effect + virtual bool getHapticAlsaDevice(int *card, int *device) = 0; + // Set haptics PCM amplifier before triggering audio haptics feature + virtual bool setHapticPcmAmp(struct pcm **haptic_pcm, bool enable, int card, + int device) = 0; + // Set OWT waveform for compose or compose PWLE request + virtual bool uploadOwtEffect(int fd, uint8_t *owtData, uint32_t numBytes, + struct ff_effect *effect, uint32_t *outEffectIndex, + int *status) = 0; + // Erase OWT waveform + virtual bool eraseOwtEffect(int fd, int8_t effectIndex, std::vector *effect) = 0; + // Emit diagnostic information to the given file. + virtual void debug(int fd) = 0; + }; + + // APIs for obtaining calibration/configuration data from persistent memory. + class HwCal { + public: + virtual ~HwCal() = default; + // Obtain the calibration version + virtual bool getVersion(uint32_t *value) = 0; + // Obtains the LRA resonant frequency to be used for PWLE playback + // and click compensation. + virtual bool getF0(std::string *value) = 0; + // Obtains the LRA series resistance to be used for click + // compensation. + virtual bool getRedc(std::string *value) = 0; + // Obtains the LRA Q factor to be used for Q-dependent waveform + // selection. + virtual bool getQ(std::string *value) = 0; + // Obtains frequency shift for long vibrations. + virtual bool getLongFrequencyShift(int32_t *value) = 0; + // Obtains the v0/v1(min/max) voltage levels to be applied for + // tick/click/long in units of 1%. + virtual bool getTickVolLevels(std::array *value) = 0; + virtual bool getClickVolLevels(std::array *value) = 0; + virtual bool getLongVolLevels(std::array *value) = 0; + // Checks if the chirp feature is enabled. + virtual bool isChirpEnabled() = 0; + // Obtains the supported primitive effects. + virtual bool getSupportedPrimitives(uint32_t *value) = 0; + // Checks if the f0 compensation feature needs to be enabled. + virtual bool isF0CompEnabled() = 0; + // Checks if the redc compensation feature needs to be enabled. + virtual bool isRedcCompEnabled() = 0; + // Emit diagnostic information to the given file. + virtual void debug(int fd) = 0; + }; + + public: + Vibrator(std::unique_ptr hwapi, std::unique_ptr hwcal); + + ndk::ScopedAStatus getCapabilities(int32_t *_aidl_return) override; + ndk::ScopedAStatus off() override; + ndk::ScopedAStatus on(int32_t timeoutMs, + const std::shared_ptr &callback) override; + ndk::ScopedAStatus perform(Effect effect, EffectStrength strength, + const std::shared_ptr &callback, + int32_t *_aidl_return) override; + ndk::ScopedAStatus getSupportedEffects(std::vector *_aidl_return) override; + ndk::ScopedAStatus setAmplitude(float amplitude) override; + ndk::ScopedAStatus setExternalControl(bool enabled) override; + ndk::ScopedAStatus getCompositionDelayMax(int32_t *maxDelayMs); + ndk::ScopedAStatus getCompositionSizeMax(int32_t *maxSize); + ndk::ScopedAStatus getSupportedPrimitives(std::vector *supported) override; + ndk::ScopedAStatus getPrimitiveDuration(CompositePrimitive primitive, + int32_t *durationMs) override; + ndk::ScopedAStatus compose(const std::vector &composite, + const std::shared_ptr &callback) override; + ndk::ScopedAStatus getSupportedAlwaysOnEffects(std::vector *_aidl_return) override; + ndk::ScopedAStatus alwaysOnEnable(int32_t id, Effect effect, EffectStrength strength) override; + ndk::ScopedAStatus alwaysOnDisable(int32_t id) override; + ndk::ScopedAStatus getResonantFrequency(float *resonantFreqHz) override; + ndk::ScopedAStatus getQFactor(float *qFactor) override; + ndk::ScopedAStatus getFrequencyResolution(float *freqResolutionHz) override; + ndk::ScopedAStatus getFrequencyMinimum(float *freqMinimumHz) override; + ndk::ScopedAStatus getBandwidthAmplitudeMap(std::vector *_aidl_return) override; + ndk::ScopedAStatus getPwlePrimitiveDurationMax(int32_t *durationMs) override; + ndk::ScopedAStatus getPwleCompositionSizeMax(int32_t *maxSize) override; + ndk::ScopedAStatus getSupportedBraking(std::vector *supported) override; + ndk::ScopedAStatus composePwle(const std::vector &composite, + const std::shared_ptr &callback) override; + + binder_status_t dump(int fd, const char **args, uint32_t numArgs) override; + + private: + ndk::ScopedAStatus on(uint32_t timeoutMs, uint32_t effectIndex, struct dspmem_chunk *ch, + const std::shared_ptr &callback); + // set 'amplitude' based on an arbitrary scale determined by 'maximum' + ndk::ScopedAStatus setEffectAmplitude(float amplitude, float maximum); + ndk::ScopedAStatus setGlobalAmplitude(bool set); + // 'simple' effects are those precompiled and loaded into the controller + ndk::ScopedAStatus getSimpleDetails(Effect effect, EffectStrength strength, + uint32_t *outEffectIndex, uint32_t *outTimeMs, + uint32_t *outVolLevel); + // 'compound' effects are those composed by stringing multiple 'simple' effects + ndk::ScopedAStatus getCompoundDetails(Effect effect, EffectStrength strength, + uint32_t *outTimeMs, struct dspmem_chunk *outCh); + ndk::ScopedAStatus getPrimitiveDetails(CompositePrimitive primitive, uint32_t *outEffectIndex); + ndk::ScopedAStatus performEffect(Effect effect, EffectStrength strength, + const std::shared_ptr &callback, + int32_t *outTimeMs); + ndk::ScopedAStatus performEffect(uint32_t effectIndex, uint32_t volLevel, + struct dspmem_chunk *ch, + const std::shared_ptr &callback); + ndk::ScopedAStatus setPwle(const std::string &pwleQueue); + bool isUnderExternalControl(); + void waitForComplete(std::shared_ptr &&callback); + uint32_t intensityToVolLevel(float intensity, uint32_t effectIndex); + bool findHapticAlsaDevice(int *card, int *device); + bool hasHapticAlsaDevice(); + bool enableHapticPcmAmp(struct pcm **haptic_pcm, bool enable, int card, int device); + + std::unique_ptr mHwApi; + std::unique_ptr mHwCal; + uint32_t mF0Offset; + std::array mTickEffectVol; + std::array mClickEffectVol; + std::array mLongEffectVol; + std::vector mFfEffects; + std::vector mEffectDurations; + std::future mAsyncHandle; + ::android::base::unique_fd mInputFd; + int8_t mActiveId{-1}; + struct pcm *mHapticPcm; + int mCard; + int mDevice; + bool mHasHapticAlsaDevice{false}; + bool mIsUnderExternalControl; + float mLongEffectScale = 1.0; + bool mIsChirpEnabled; + uint32_t mSupportedPrimitivesBits = 0x0; + std::vector mSupportedPrimitives; + bool mConfigHapticAlsaDeviceDone{false}; +}; + +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.rc b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.rc new file mode 100644 index 0000000..0fcca56 --- /dev/null +++ b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.rc @@ -0,0 +1,47 @@ +on property:vendor.all.modules.ready=1 + wait /sys/bus/i2c/devices/i2c-cs40l26a/calibration/redc_cal_time_ms + + mkdir /mnt/vendor/persist/haptics 0770 system system + chmod 770 /mnt/vendor/persist/haptics + chmod 440 /mnt/vendor/persist/haptics/cs40l26.cal + chown system system /mnt/vendor/persist/haptics + chown system system /mnt/vendor/persist/haptics/cs40l26.cal + + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/calibration/f0_stored + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/calibration/q_stored + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/calibration/redc_stored + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/vibe_state + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/num_waves + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/f0_offset + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/owt_free_space + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/f0_comp_enable + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/redc_comp_enable + chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/delay_before_stop_playback_us + + enable vendor.vibrator.cs40l26 + +service vendor.vibrator.cs40l26 /vendor/bin/hw/android.hardware.vibrator-service.cs40l26 + class hal + user system + group system input + + setenv INPUT_EVENT_NAME cs40l26_input + setenv INPUT_EVENT_PATH /dev/input/event* + setenv PROPERTY_PREFIX ro.vendor.vibrator.hal. + setenv CALIBRATION_FILEPATH /mnt/vendor/persist/haptics/cs40l26.cal + + setenv HWAPI_PATH_PREFIX /sys/bus/i2c/devices/i2c-cs40l26a/ + setenv HWAPI_DEBUG_PATHS " + calibration/f0_stored + calibration/redc_stored + calibration/q_stored + default/vibe_state + default/num_waves + default/f0_offset + default/owt_free_space + default/f0_comp_enable + default/redc_comp_enable + default/delay_before_stop_playback_us + " + + disabled diff --git a/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.xml b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.xml new file mode 100644 index 0000000..4db8f8c --- /dev/null +++ b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.xml @@ -0,0 +1,7 @@ + + + android.hardware.vibrator + 2 + IVibrator/default + + diff --git a/vibrator/cs40l26/device.mk b/vibrator/cs40l26/device.mk new file mode 100644 index 0000000..5a3dd4f --- /dev/null +++ b/vibrator/cs40l26/device.mk @@ -0,0 +1,6 @@ +PRODUCT_PACKAGES += \ + android.hardware.vibrator-service.cs40l26 + +BOARD_SEPOLICY_DIRS += \ + hardware/google/pixel-sepolicy/vibrator/common \ + hardware/google/pixel-sepolicy/vibrator/cs40l26 diff --git a/vibrator/cs40l26/service.cpp b/vibrator/cs40l26/service.cpp new file mode 100644 index 0000000..27173d9 --- /dev/null +++ b/vibrator/cs40l26/service.cpp @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2021 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include +#include +#include +#include + +#include "Hardware.h" +#include "Vibrator.h" + +using ::aidl::android::hardware::vibrator::HwApi; +using ::aidl::android::hardware::vibrator::HwCal; +using ::aidl::android::hardware::vibrator::Vibrator; +using ::android::defaultServiceManager; +using ::android::ProcessState; +using ::android::sp; +using ::android::String16; + +#if !defined(VIBRATOR_NAME) +#define VIBRATOR_NAME "default" +#endif + +int main() { + auto svc = ndk::SharedRefBase::make(std::make_unique(), + std::make_unique()); + const auto svcName = std::string() + svc->descriptor + "/" + VIBRATOR_NAME; + + ProcessState::initWithDriver("/dev/vndbinder"); + + auto svcBinder = svc->asBinder(); + binder_status_t status = AServiceManager_addService(svcBinder.get(), svcName.c_str()); + LOG_ALWAYS_FATAL_IF(status != STATUS_OK); + + ProcessState::self()->setThreadPoolMaxThreadCount(1); + ProcessState::self()->startThreadPool(); + + ABinderProcess_setThreadPoolMaxThreadCount(0); + ABinderProcess_joinThreadPool(); + + return EXIT_FAILURE; // should not reach +} diff --git a/vibrator/cs40l26/tests/Android.bp b/vibrator/cs40l26/tests/Android.bp new file mode 100644 index 0000000..93c9a9f --- /dev/null +++ b/vibrator/cs40l26/tests/Android.bp @@ -0,0 +1,35 @@ +// +// Copyright (C) 2022 The Android Open Source Project +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +package { + default_applicable_licenses: ["Android-Apache-2.0"], +} + +cc_test { + name: "VibratorHalCs40l26TestSuite", + defaults: ["VibratorHalCs40l26TestDefaults"], + srcs: [ + "test-hwcal.cpp", + "test-hwapi.cpp", + "test-vibrator.cpp", + ], + static_libs: [ + "libc++fs", + "libgmock", + ], + shared_libs: [ + "libbase", + ], +} diff --git a/vibrator/cs40l26/tests/mocks.h b/vibrator/cs40l26/tests/mocks.h new file mode 100644 index 0000000..21466a0 --- /dev/null +++ b/vibrator/cs40l26/tests/mocks.h @@ -0,0 +1,80 @@ +/* + * Copyright (C) 2022 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef ANDROID_HARDWARE_VIBRATOR_TEST_MOCKS_H +#define ANDROID_HARDWARE_VIBRATOR_TEST_MOCKS_H + +#include + +#include "Vibrator.h" + +class MockApi : public ::aidl::android::hardware::vibrator::Vibrator::HwApi { + public: + MOCK_METHOD0(destructor, void()); + MOCK_METHOD1(setF0, bool(std::string value)); + MOCK_METHOD1(setF0Offset, bool(uint32_t value)); + MOCK_METHOD1(setRedc, bool(std::string value)); + MOCK_METHOD1(setQ, bool(std::string value)); + MOCK_METHOD1(getEffectCount, bool(uint32_t *value)); + MOCK_METHOD2(pollVibeState, bool(uint32_t value, int32_t timeoutMs)); + MOCK_METHOD0(hasOwtFreeSpace, bool()); + MOCK_METHOD1(getOwtFreeSpace, bool(uint32_t *value)); + MOCK_METHOD1(setF0CompEnable, bool(bool value)); + MOCK_METHOD1(setRedcCompEnable, bool(bool value)); + MOCK_METHOD1(setMinOnOffInterval, bool(uint32_t value)); + MOCK_METHOD2(setFFGain, bool(int fd, uint16_t value)); + MOCK_METHOD3(setFFEffect, bool(int fd, struct ff_effect *effect, uint16_t timeoutMs)); + MOCK_METHOD3(setFFPlay, bool(int fd, int8_t index, bool value)); + MOCK_METHOD2(getHapticAlsaDevice, bool(int *card, int *device)); + MOCK_METHOD4(setHapticPcmAmp, bool(struct pcm **haptic_pcm, bool enable, int card, int device)); + MOCK_METHOD6(uploadOwtEffect, + bool(int fd, uint8_t *owtData, uint32_t numBytes, struct ff_effect *effect, + uint32_t *outEffectIndex, int *status)); + MOCK_METHOD3(eraseOwtEffect, bool(int fd, int8_t effectIndex, std::vector *effect)); + MOCK_METHOD1(debug, void(int fd)); + + ~MockApi() override { destructor(); }; +}; + +class MockCal : public ::aidl::android::hardware::vibrator::Vibrator::HwCal { + public: + MOCK_METHOD0(destructor, void()); + MOCK_METHOD1(getVersion, bool(uint32_t *value)); + MOCK_METHOD1(getF0, bool(std::string &value)); + MOCK_METHOD1(getRedc, bool(std::string &value)); + MOCK_METHOD1(getQ, bool(std::string &value)); + MOCK_METHOD1(getLongFrequencyShift, bool(int32_t *value)); + MOCK_METHOD1(getTickVolLevels, bool(std::array *value)); + MOCK_METHOD1(getClickVolLevels, bool(std::array *value)); + MOCK_METHOD1(getLongVolLevels, bool(std::array *value)); + MOCK_METHOD0(isChirpEnabled, bool()); + MOCK_METHOD1(getSupportedPrimitives, bool(uint32_t *value)); + MOCK_METHOD0(isF0CompEnabled, bool()); + MOCK_METHOD0(isRedcCompEnabled, bool()); + MOCK_METHOD1(debug, void(int fd)); + + ~MockCal() override { destructor(); }; + // b/132668253: Workaround gMock Compilation Issue + bool getF0(std::string *value) { return getF0(*value); } + bool getRedc(std::string *value) { return getRedc(*value); } + bool getQ(std::string *value) { return getQ(*value); } +}; + +class MockVibratorCallback : public aidl::android::hardware::vibrator::BnVibratorCallback { + public: + MOCK_METHOD(ndk::ScopedAStatus, onComplete, ()); +}; + +#endif // ANDROID_HARDWARE_VIBRATOR_TEST_MOCKS_H diff --git a/vibrator/cs40l26/tests/test-hwapi.cpp b/vibrator/cs40l26/tests/test-hwapi.cpp new file mode 100644 index 0000000..cc4d465 --- /dev/null +++ b/vibrator/cs40l26/tests/test-hwapi.cpp @@ -0,0 +1,288 @@ +/* + * Copyright (C) 2022 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include + +#include +#include + +#include "Hardware.h" + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { + +using ::testing::Test; +using ::testing::TestParamInfo; +using ::testing::ValuesIn; +using ::testing::WithParamInterface; + +class HwApiTest : public Test { + private: + static constexpr const char *FILE_NAMES[]{ + "calibration/f0_stored", + "default/f0_offset", + "calibration/redc_stored", + "calibration/q_stored", + "default/f0_comp_enable", + "default/redc_comp_enable", + "default/owt_free_space", + "default/num_waves", + "default/delay_before_stop_playback_us", + }; + + public: + void SetUp() override { + std::string prefix; + for (auto n : FILE_NAMES) { + auto name = std::filesystem::path(n); + auto path = std::filesystem::path(mFilesDir.path) / name; + fs_mkdirs(path.c_str(), S_IRWXU); + std::ofstream touch{path}; + mFileMap[name] = path; + } + prefix = std::filesystem::path(mFilesDir.path) / ""; + setenv("HWAPI_PATH_PREFIX", prefix.c_str(), true); + mHwApi = std::make_unique(); + + for (auto n : FILE_NAMES) { + auto name = std::filesystem::path(n); + auto path = std::filesystem::path(mEmptyDir.path) / name; + } + prefix = std::filesystem::path(mEmptyDir.path) / ""; + setenv("HWAPI_PATH_PREFIX", prefix.c_str(), true); + mNoApi = std::make_unique(); + } + + void TearDown() override { verifyContents(); } + + static auto ParamNameFixup(std::string str) { + std::replace(str.begin(), str.end(), '/', '_'); + return str; + } + + protected: + // Set expected file content for a test. + template + void expectContent(const std::string &name, const T &value) { + mExpectedContent[name] << value << std::endl; + } + + // Set actual file content for an input test. + template + void updateContent(const std::string &name, const T &value) { + std::ofstream(mFileMap[name]) << value << std::endl; + } + + template + void expectAndUpdateContent(const std::string &name, const T &value) { + expectContent(name, value); + updateContent(name, value); + } + + // Compare all file contents against expected contents. + void verifyContents() { + for (auto &a : mFileMap) { + std::ifstream file{a.second}; + std::string expect = mExpectedContent[a.first].str(); + std::string actual = std::string(std::istreambuf_iterator(file), + std::istreambuf_iterator()); + EXPECT_EQ(expect, actual) << a.first; + } + } + + protected: + std::unique_ptr mHwApi; + std::unique_ptr mNoApi; + std::map mFileMap; + TemporaryDir mFilesDir; + TemporaryDir mEmptyDir; + std::map mExpectedContent; +}; + +template +class HwApiTypedTest : public HwApiTest, + public WithParamInterface>> { + public: + static auto PrintParam(const TestParamInfo &info) { + return ParamNameFixup(std::get<0>(info.param)); + } + static auto MakeParam(std::string name, std::function func) { + return std::make_tuple(name, func); + } +}; + +using HasTest = HwApiTypedTest; + +TEST_P(HasTest, success_returnsTrue) { + auto param = GetParam(); + auto func = std::get<1>(param); + + EXPECT_TRUE(func(*mHwApi)); +} + +TEST_P(HasTest, success_returnsFalse) { + auto param = GetParam(); + auto func = std::get<1>(param); + + EXPECT_FALSE(func(*mNoApi)); +} + +INSTANTIATE_TEST_CASE_P(HwApiTests, HasTest, + ValuesIn({ + HasTest::MakeParam("default/owt_free_space", + &Vibrator::HwApi::hasOwtFreeSpace), + }), + HasTest::PrintParam); + +using GetUint32Test = HwApiTypedTest; + +TEST_P(GetUint32Test, success) { + auto param = GetParam(); + auto name = std::get<0>(param); + auto func = std::get<1>(param); + uint32_t expect = std::rand(); + uint32_t actual = ~expect; + + expectAndUpdateContent(name, expect); + + EXPECT_TRUE(func(*mHwApi, &actual)); + EXPECT_EQ(expect, actual); +} + +TEST_P(GetUint32Test, failure) { + auto param = GetParam(); + auto func = std::get<1>(param); + uint32_t value; + + EXPECT_FALSE(func(*mNoApi, &value)); +} + +INSTANTIATE_TEST_CASE_P(HwApiTests, GetUint32Test, + ValuesIn({ + GetUint32Test::MakeParam("default/num_waves", + &Vibrator::HwApi::getEffectCount), + GetUint32Test::MakeParam("default/owt_free_space", + &Vibrator::HwApi::getOwtFreeSpace), + }), + GetUint32Test::PrintParam); + +using SetBoolTest = HwApiTypedTest; + +TEST_P(SetBoolTest, success_returnsTrue) { + auto param = GetParam(); + auto name = std::get<0>(param); + auto func = std::get<1>(param); + + expectContent(name, "1"); + + EXPECT_TRUE(func(*mHwApi, true)); +} + +TEST_P(SetBoolTest, success_returnsFalse) { + auto param = GetParam(); + auto name = std::get<0>(param); + auto func = std::get<1>(param); + + expectContent(name, "0"); + + EXPECT_TRUE(func(*mHwApi, false)); +} + +TEST_P(SetBoolTest, failure) { + auto param = GetParam(); + auto func = std::get<1>(param); + + EXPECT_FALSE(func(*mNoApi, true)); + EXPECT_FALSE(func(*mNoApi, false)); +} + +INSTANTIATE_TEST_CASE_P(HwApiTests, SetBoolTest, + ValuesIn({ + SetBoolTest::MakeParam("default/f0_comp_enable", + &Vibrator::HwApi::setF0CompEnable), + SetBoolTest::MakeParam("default/redc_comp_enable", + &Vibrator::HwApi::setRedcCompEnable), + }), + SetBoolTest::PrintParam); + +using SetUint32Test = HwApiTypedTest; + +TEST_P(SetUint32Test, success) { + auto param = GetParam(); + auto name = std::get<0>(param); + auto func = std::get<1>(param); + uint32_t value = std::rand(); + + expectContent(name, value); + + EXPECT_TRUE(func(*mHwApi, value)); +} + +TEST_P(SetUint32Test, failure) { + auto param = GetParam(); + auto func = std::get<1>(param); + uint32_t value = std::rand(); + + EXPECT_FALSE(func(*mNoApi, value)); +} + +INSTANTIATE_TEST_CASE_P(HwApiTests, SetUint32Test, + ValuesIn({ + SetUint32Test::MakeParam("default/f0_offset", + &Vibrator::HwApi::setF0Offset), + SetUint32Test::MakeParam("default/delay_before_stop_playback_us", + &Vibrator::HwApi::setMinOnOffInterval), + }), + SetUint32Test::PrintParam); + +using SetStringTest = HwApiTypedTest; + +TEST_P(SetStringTest, success) { + auto param = GetParam(); + auto name = std::get<0>(param); + auto func = std::get<1>(param); + std::string value = TemporaryFile().path; + + expectContent(name, value); + + EXPECT_TRUE(func(*mHwApi, value)); +} + +TEST_P(SetStringTest, failure) { + auto param = GetParam(); + auto func = std::get<1>(param); + std::string value = TemporaryFile().path; + + EXPECT_FALSE(func(*mNoApi, value)); +} + +INSTANTIATE_TEST_CASE_P( + HwApiTests, SetStringTest, + ValuesIn({ + SetStringTest::MakeParam("calibration/f0_stored", &Vibrator::HwApi::setF0), + SetStringTest::MakeParam("calibration/redc_stored", &Vibrator::HwApi::setRedc), + SetStringTest::MakeParam("calibration/q_stored", &Vibrator::HwApi::setQ), + }), + SetStringTest::PrintParam); + +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/cs40l26/tests/test-hwcal.cpp b/vibrator/cs40l26/tests/test-hwcal.cpp new file mode 100644 index 0000000..e482b6c --- /dev/null +++ b/vibrator/cs40l26/tests/test-hwcal.cpp @@ -0,0 +1,386 @@ +/* + * Copyright (C) 2022 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include + +#include + +#include "Hardware.h" + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { + +using ::testing::Test; + +class HwCalTest : public Test { + protected: + static constexpr std::array V_TICK_DEFAULT = {1, 100}; + static constexpr std::array V_CLICK_DEFAULT = {1, 100}; + static constexpr std::array V_LONG_DEFAULT = {1, 100}; + + public: + void SetUp() override { setenv("CALIBRATION_FILEPATH", mCalFile.path, true); } + + private: + template + static void pack(std::ostream &stream, const T &value, std::string lpad, std::string rpad) { + stream << lpad << value << rpad; + } + + template ::size_type N> + static void pack(std::ostream &stream, const std::array &value, std::string lpad, + std::string rpad) { + for (auto &entry : value) { + pack(stream, entry, lpad, rpad); + } + } + + protected: + void createHwCal() { mHwCal = std::make_unique(); } + + template + void write(const std::string key, const T &value, std::string lpad = " ", + std::string rpad = "") { + std::ofstream calfile{mCalFile.path, std::ios_base::app}; + calfile << key << ":"; + pack(calfile, value, lpad, rpad); + calfile << std::endl; + } + + void unlink() { ::unlink(mCalFile.path); } + + protected: + std::unique_ptr mHwCal; + TemporaryFile mCalFile; +}; + +TEST_F(HwCalTest, f0_measured) { + uint32_t randInput = std::rand(); + std::string expect = std::to_string(randInput); + std::string actual = std::to_string(~randInput); + + write("f0_measured", expect); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getF0(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, f0_missing) { + std::string actual; + + createHwCal(); + + EXPECT_FALSE(mHwCal->getF0(&actual)); +} + +TEST_F(HwCalTest, redc_measured) { + uint32_t randInput = std::rand(); + std::string expect = std::to_string(randInput); + std::string actual = std::to_string(~randInput); + + write("redc_measured", expect); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getRedc(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, redc_missing) { + std::string actual; + + createHwCal(); + + EXPECT_FALSE(mHwCal->getRedc(&actual)); +} + +TEST_F(HwCalTest, q_measured) { + uint32_t randInput = std::rand(); + std::string expect = std::to_string(randInput); + std::string actual = std::to_string(~randInput); + + write("q_measured", expect); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getQ(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, q_missing) { + std::string actual; + + createHwCal(); + + EXPECT_FALSE(mHwCal->getQ(&actual)); +} + +TEST_F(HwCalTest, v_levels) { + std::array expect; + std::array actual; + + // voltage for tick effects + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + + write("v_tick", expect); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getTickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + // voltage for click effects + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + + write("v_click", expect); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getClickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + // voltage for long effects + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + + write("v_long", expect); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getLongVolLevels(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, v_missing) { + std::array expect = V_TICK_DEFAULT; + std::array actual; + + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; }); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getTickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_CLICK_DEFAULT; + + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; }); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getClickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_LONG_DEFAULT; + + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; }); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getLongVolLevels(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, v_short) { + std::array expect = V_TICK_DEFAULT; + std::array actual; + + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; }); + + write("v_tick", std::array()); + write("v_click", std::array()); + write("v_long", std::array()); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getTickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_CLICK_DEFAULT; + EXPECT_TRUE(mHwCal->getClickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_LONG_DEFAULT; + EXPECT_TRUE(mHwCal->getLongVolLevels(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, v_long) { + std::array expect = V_TICK_DEFAULT; + std::array actual; + + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; }); + + write("v_tick", std::array()); + write("v_click", std::array()); + write("v_long", std::array()); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getTickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_CLICK_DEFAULT; + EXPECT_TRUE(mHwCal->getClickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_LONG_DEFAULT; + EXPECT_TRUE(mHwCal->getLongVolLevels(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, v_nofile) { + std::array expect = V_TICK_DEFAULT; + std::array actual; + + std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; }); + + write("v_tick", actual); + write("v_click", actual); + write("v_long", actual); + unlink(); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getTickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_CLICK_DEFAULT; + EXPECT_TRUE(mHwCal->getClickVolLevels(&actual)); + EXPECT_EQ(expect, actual); + + expect = V_LONG_DEFAULT; + EXPECT_TRUE(mHwCal->getLongVolLevels(&actual)); + EXPECT_EQ(expect, actual); +} + +TEST_F(HwCalTest, multiple) { + uint32_t randInput = std::rand(); + std::string f0Expect = std::to_string(randInput); + std::string f0Actual = std::to_string(~randInput); + randInput = std::rand(); + std::string redcExpect = std::to_string(randInput); + std::string redcActual = std::to_string(~randInput); + randInput = std::rand(); + std::string qExpect = std::to_string(randInput); + std::string qActual = std::to_string(~randInput); + std::array volTickExpect, volClickExpect, volLongExpect; + std::array volActual; + + std::transform(volTickExpect.begin(), volTickExpect.end(), volActual.begin(), [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + + write("f0_measured", f0Expect); + write("redc_measured", redcExpect); + write("q_measured", qExpect); + write("v_tick", volTickExpect); + std::transform(volClickExpect.begin(), volClickExpect.end(), volActual.begin(), + [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + write("v_click", volClickExpect); + std::transform(volLongExpect.begin(), volLongExpect.end(), volActual.begin(), [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + write("v_long", volLongExpect); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getF0(&f0Actual)); + EXPECT_EQ(f0Expect, f0Actual); + EXPECT_TRUE(mHwCal->getRedc(&redcActual)); + EXPECT_EQ(redcExpect, redcActual); + EXPECT_TRUE(mHwCal->getQ(&qActual)); + EXPECT_EQ(qExpect, qActual); + EXPECT_TRUE(mHwCal->getTickVolLevels(&volActual)); + EXPECT_EQ(volTickExpect, volActual); + EXPECT_TRUE(mHwCal->getClickVolLevels(&volActual)); + EXPECT_EQ(volClickExpect, volActual); + EXPECT_TRUE(mHwCal->getLongVolLevels(&volActual)); + EXPECT_EQ(volLongExpect, volActual); +} + +TEST_F(HwCalTest, trimming) { + uint32_t randInput = std::rand(); + std::string f0Expect = std::to_string(randInput); + std::string f0Actual = std::to_string(~randInput); + randInput = std::rand(); + std::string redcExpect = std::to_string(randInput); + std::string redcActual = std::to_string(randInput); + randInput = std::rand(); + std::string qExpect = std::to_string(randInput); + std::string qActual = std::to_string(randInput); + std::array volTickExpect, volClickExpect, volLongExpect; + std::array volActual; + + std::transform(volTickExpect.begin(), volTickExpect.end(), volActual.begin(), [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + + write("f0_measured", f0Expect, " \t", "\t "); + write("redc_measured", redcExpect, " \t", "\t "); + write("q_measured", qExpect, " \t", "\t "); + write("v_tick", volTickExpect, " \t", "\t "); + std::transform(volClickExpect.begin(), volClickExpect.end(), volActual.begin(), + [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + write("v_click", volClickExpect, " \t", "\t "); + std::transform(volLongExpect.begin(), volLongExpect.end(), volActual.begin(), [](uint32_t &e) { + e = std::rand(); + return ~e; + }); + write("v_long", volLongExpect, " \t", "\t "); + + createHwCal(); + + EXPECT_TRUE(mHwCal->getF0(&f0Actual)); + EXPECT_EQ(f0Expect, f0Actual); + EXPECT_TRUE(mHwCal->getRedc(&redcActual)); + EXPECT_EQ(redcExpect, redcActual); + EXPECT_TRUE(mHwCal->getQ(&qActual)); + EXPECT_EQ(qExpect, qActual); + EXPECT_TRUE(mHwCal->getTickVolLevels(&volActual)); + EXPECT_EQ(volTickExpect, volActual); + EXPECT_TRUE(mHwCal->getClickVolLevels(&volActual)); + EXPECT_EQ(volClickExpect, volActual); + EXPECT_TRUE(mHwCal->getLongVolLevels(&volActual)); + EXPECT_EQ(volLongExpect, volActual); +} + +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/cs40l26/tests/test-vibrator.cpp b/vibrator/cs40l26/tests/test-vibrator.cpp new file mode 100644 index 0000000..a8bedd5 --- /dev/null +++ b/vibrator/cs40l26/tests/test-vibrator.cpp @@ -0,0 +1,682 @@ +/* + * Copyright (C) 2022 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include + +#include + +#include "Vibrator.h" +#include "mocks.h" +#include "types.h" +#include "utils.h" + +namespace aidl { +namespace android { +namespace hardware { +namespace vibrator { + +using ::testing::_; +using ::testing::AnyNumber; +using ::testing::Assign; +using ::testing::AtLeast; +using ::testing::AtMost; +using ::testing::Combine; +using ::testing::DoAll; +using ::testing::DoDefault; +using ::testing::Exactly; +using ::testing::Expectation; +using ::testing::ExpectationSet; +using ::testing::Ge; +using ::testing::Mock; +using ::testing::MockFunction; +using ::testing::Range; +using ::testing::Return; +using ::testing::Sequence; +using ::testing::SetArgPointee; +using ::testing::SetArgReferee; +using ::testing::Test; +using ::testing::TestParamInfo; +using ::testing::ValuesIn; +using ::testing::WithParamInterface; + +// Forward Declarations + +static EffectQueue Queue(const QueueEffect &effect); +static EffectQueue Queue(const QueueDelay &delay); +template +static EffectQueue Queue(const T &first, const U &second, Args... rest); + +static EffectLevel Level(float intensity, float levelLow, float levelHigh); +static EffectScale Scale(float intensity, float levelLow, float levelHigh); + +// Constants With Arbitrary Values + +static constexpr uint32_t CAL_VERSION = 2; +static constexpr std::array V_TICK_DEFAULT = {1, 100}; +static constexpr std::array V_CLICK_DEFAULT{1, 100}; +static constexpr std::array V_LONG_DEFAULT{1, 100}; +static constexpr std::array EFFECT_DURATIONS{ + 0, 100, 30, 1000, 300, 130, 150, 500, 100, 15, 20, 1000, 1000, 1000}; + +// Constants With Prescribed Values + +static const std::map EFFECT_INDEX{ + {Effect::CLICK, 2}, + {Effect::TICK, 2}, + {Effect::HEAVY_CLICK, 2}, + {Effect::TEXTURE_TICK, 9}, +}; +static constexpr uint32_t MIN_ON_OFF_INTERVAL_US = 8500; +static constexpr uint8_t VOLTAGE_SCALE_MAX = 100; +static constexpr int8_t MAX_COLD_START_LATENCY_MS = 6; // I2C Transaction + DSP Return-From-Standby +static constexpr auto POLLING_TIMEOUT = 20; +enum WaveformIndex : uint16_t { + /* Physical waveform */ + WAVEFORM_LONG_VIBRATION_EFFECT_INDEX = 0, + WAVEFORM_RESERVED_INDEX_1 = 1, + WAVEFORM_CLICK_INDEX = 2, + WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX = 3, + WAVEFORM_THUD_INDEX = 4, + WAVEFORM_SPIN_INDEX = 5, + WAVEFORM_QUICK_RISE_INDEX = 6, + WAVEFORM_SLOW_RISE_INDEX = 7, + WAVEFORM_QUICK_FALL_INDEX = 8, + WAVEFORM_LIGHT_TICK_INDEX = 9, + WAVEFORM_LOW_TICK_INDEX = 10, + WAVEFORM_RESERVED_MFG_1, + WAVEFORM_RESERVED_MFG_2, + WAVEFORM_RESERVED_MFG_3, + WAVEFORM_MAX_PHYSICAL_INDEX, + /* OWT waveform */ + WAVEFORM_COMPOSE = WAVEFORM_MAX_PHYSICAL_INDEX, + WAVEFORM_PWLE, + /* + * Refer to , the WAVEFORM_MAX_INDEX must not exceed 96. + * #define FF_GAIN 0x60 // 96 in decimal + * #define FF_MAX_EFFECTS FF_GAIN + */ + WAVEFORM_MAX_INDEX, +}; + +static const EffectScale ON_GLOBAL_SCALE{levelToScale(V_LONG_DEFAULT[1])}; +static const EffectIndex ON_EFFECT_INDEX{0}; + +static const std::map EFFECT_SCALE{ + {{Effect::TICK, EffectStrength::LIGHT}, + Scale(0.5f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::TICK, EffectStrength::MEDIUM}, + Scale(0.5f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::TICK, EffectStrength::STRONG}, + Scale(0.5f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::CLICK, EffectStrength::LIGHT}, + Scale(0.7f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::CLICK, EffectStrength::MEDIUM}, + Scale(0.7f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::CLICK, EffectStrength::STRONG}, + Scale(0.7f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::HEAVY_CLICK, EffectStrength::LIGHT}, + Scale(1.0f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::HEAVY_CLICK, EffectStrength::MEDIUM}, + Scale(1.0f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::HEAVY_CLICK, EffectStrength::STRONG}, + Scale(1.0f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + {{Effect::TEXTURE_TICK, EffectStrength::LIGHT}, + Scale(0.5f * 0.5f, V_TICK_DEFAULT[0], V_TICK_DEFAULT[1])}, + {{Effect::TEXTURE_TICK, EffectStrength::MEDIUM}, + Scale(0.5f * 0.7f, V_TICK_DEFAULT[0], V_TICK_DEFAULT[1])}, + {{Effect::TEXTURE_TICK, EffectStrength::STRONG}, + Scale(0.5f * 1.0f, V_TICK_DEFAULT[0], V_TICK_DEFAULT[1])}, +}; + +static const std::map EFFECT_QUEUE{ + {{Effect::DOUBLE_CLICK, EffectStrength::LIGHT}, + Queue(QueueEffect{EFFECT_INDEX.at(Effect::CLICK), + Level(0.7f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + 100, + QueueEffect{EFFECT_INDEX.at(Effect::CLICK), + Level(1.0f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])})}, + {{Effect::DOUBLE_CLICK, EffectStrength::MEDIUM}, + Queue(QueueEffect{EFFECT_INDEX.at(Effect::CLICK), + Level(0.7f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + 100, + QueueEffect{EFFECT_INDEX.at(Effect::CLICK), + Level(1.0f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])})}, + {{Effect::DOUBLE_CLICK, EffectStrength::STRONG}, + Queue(QueueEffect{EFFECT_INDEX.at(Effect::CLICK), + Level(0.7f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])}, + 100, + QueueEffect{EFFECT_INDEX.at(Effect::CLICK), + Level(1.0f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])})}, +}; + +EffectQueue Queue(const QueueEffect &effect) { + auto index = std::get<0>(effect); + auto level = std::get<1>(effect); + auto string = std::to_string(index) + "." + std::to_string(level); + auto duration = EFFECT_DURATIONS[index]; + return {string, duration}; +} + +EffectQueue Queue(const QueueDelay &delay) { + auto string = std::to_string(delay); + return {string, delay}; +} + +template +EffectQueue Queue(const T &first, const U &second, Args... rest) { + auto head = Queue(first); + auto tail = Queue(second, rest...); + auto string = std::get<0>(head) + "," + std::get<0>(tail); + auto duration = std::get<1>(head) + std::get<1>(tail); + return {string, duration}; +} + +static EffectLevel Level(float intensity, float levelLow, float levelHigh) { + return std::lround(intensity * (levelHigh - levelLow)) + levelLow; +} + +static EffectScale Scale(float intensity, float levelLow, float levelHigh) { + return levelToScale(Level(intensity, levelLow, levelHigh)); +} + +class VibratorTest : public Test { + public: + void SetUp() override { + setenv("INPUT_EVENT_NAME", "CS40L26TestSuite", true); + std::unique_ptr mockapi; + std::unique_ptr mockcal; + + createMock(&mockapi, &mockcal); + createVibrator(std::move(mockapi), std::move(mockcal)); + } + + void TearDown() override { deleteVibrator(); } + + protected: + void createMock(std::unique_ptr *mockapi, std::unique_ptr *mockcal) { + *mockapi = std::make_unique(); + *mockcal = std::make_unique(); + + mMockApi = mockapi->get(); + mMockCal = mockcal->get(); + + ON_CALL(*mMockApi, destructor()).WillByDefault(Assign(&mMockApi, nullptr)); + + ON_CALL(*mMockApi, setFFGain(_, _)).WillByDefault(Return(true)); + ON_CALL(*mMockApi, setFFEffect(_, _, _)).WillByDefault(Return(true)); + ON_CALL(*mMockApi, setFFPlay(_, _, _)).WillByDefault(Return(true)); + ON_CALL(*mMockApi, pollVibeState(_, _)).WillByDefault(Return(true)); + ON_CALL(*mMockApi, uploadOwtEffect(_, _, _, _, _, _)).WillByDefault(Return(true)); + ON_CALL(*mMockApi, eraseOwtEffect(_, _, _)).WillByDefault(Return(true)); + + ON_CALL(*mMockApi, getOwtFreeSpace(_)) + .WillByDefault(DoAll(SetArgPointee<0>(11504), Return(true))); + + ON_CALL(*mMockCal, destructor()).WillByDefault(Assign(&mMockCal, nullptr)); + + ON_CALL(*mMockCal, getVersion(_)) + .WillByDefault(DoAll(SetArgPointee<0>(CAL_VERSION), Return(true))); + + ON_CALL(*mMockCal, getTickVolLevels(_)) + .WillByDefault(DoAll(SetArgPointee<0>(V_TICK_DEFAULT), Return(true))); + ON_CALL(*mMockCal, getClickVolLevels(_)) + .WillByDefault(DoAll(SetArgPointee<0>(V_CLICK_DEFAULT), Return(true))); + ON_CALL(*mMockCal, getLongVolLevels(_)) + .WillByDefault(DoAll(SetArgPointee<0>(V_LONG_DEFAULT), Return(true))); + + relaxMock(false); + } + + void createVibrator(std::unique_ptr mockapi, std::unique_ptr mockcal, + bool relaxed = true) { + if (relaxed) { + relaxMock(true); + } + mVibrator = ndk::SharedRefBase::make(std::move(mockapi), std::move(mockcal)); + if (relaxed) { + relaxMock(false); + } + } + + void deleteVibrator(bool relaxed = true) { + if (relaxed) { + relaxMock(true); + } + mVibrator.reset(); + } + + private: + void relaxMock(bool relax) { + auto times = relax ? AnyNumber() : Exactly(0); + + Mock::VerifyAndClearExpectations(mMockApi); + Mock::VerifyAndClearExpectations(mMockCal); + + EXPECT_CALL(*mMockApi, destructor()).Times(times); + EXPECT_CALL(*mMockApi, setF0(_)).Times(times); + EXPECT_CALL(*mMockApi, setF0Offset(_)).Times(times); + EXPECT_CALL(*mMockApi, setRedc(_)).Times(times); + EXPECT_CALL(*mMockApi, setQ(_)).Times(times); + EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).Times(times); + EXPECT_CALL(*mMockApi, getOwtFreeSpace(_)).Times(times); + EXPECT_CALL(*mMockApi, setF0CompEnable(_)).Times(times); + EXPECT_CALL(*mMockApi, setRedcCompEnable(_)).Times(times); + EXPECT_CALL(*mMockApi, pollVibeState(_, _)).Times(times); + EXPECT_CALL(*mMockApi, setFFGain(_, _)).Times(times); + EXPECT_CALL(*mMockApi, setFFEffect(_, _, _)).Times(times); + EXPECT_CALL(*mMockApi, setFFPlay(_, _, _)).Times(times); + EXPECT_CALL(*mMockApi, setMinOnOffInterval(_)).Times(times); + EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).Times(times); + EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, _, _, _)).Times(times); + + EXPECT_CALL(*mMockApi, debug(_)).Times(times); + + EXPECT_CALL(*mMockCal, destructor()).Times(times); + EXPECT_CALL(*mMockCal, getF0(_)).Times(times); + EXPECT_CALL(*mMockCal, getRedc(_)).Times(times); + EXPECT_CALL(*mMockCal, getQ(_)).Times(times); + EXPECT_CALL(*mMockCal, getTickVolLevels(_)).Times(times); + EXPECT_CALL(*mMockCal, getClickVolLevels(_)).Times(times); + EXPECT_CALL(*mMockCal, getLongVolLevels(_)).Times(times); + EXPECT_CALL(*mMockCal, isChirpEnabled()).Times(times); + EXPECT_CALL(*mMockCal, getLongFrequencyShift(_)).Times(times); + EXPECT_CALL(*mMockCal, isF0CompEnabled()).Times(times); + EXPECT_CALL(*mMockCal, isRedcCompEnabled()).Times(times); + EXPECT_CALL(*mMockCal, debug(_)).Times(times); + } + + protected: + MockApi *mMockApi; + MockCal *mMockCal; + std::shared_ptr mVibrator; + uint32_t mEffectIndex; +}; + +TEST_F(VibratorTest, Constructor) { + std::unique_ptr mockapi; + std::unique_ptr mockcal; + std::string f0Val = std::to_string(std::rand()); + std::string redcVal = std::to_string(std::rand()); + std::string qVal = std::to_string(std::rand()); + uint32_t calVer; + uint32_t supportedPrimitivesBits = 0x0; + Expectation volGet; + Sequence f0Seq, redcSeq, qSeq, supportedPrimitivesSeq; + + EXPECT_CALL(*mMockApi, destructor()).WillOnce(DoDefault()); + EXPECT_CALL(*mMockCal, destructor()).WillOnce(DoDefault()); + + deleteVibrator(false); + + createMock(&mockapi, &mockcal); + + EXPECT_CALL(*mMockCal, getF0(_)) + .InSequence(f0Seq) + .WillOnce(DoAll(SetArgReferee<0>(f0Val), Return(true))); + EXPECT_CALL(*mMockApi, setF0(f0Val)).InSequence(f0Seq).WillOnce(Return(true)); + + EXPECT_CALL(*mMockCal, getRedc(_)) + .InSequence(redcSeq) + .WillOnce(DoAll(SetArgReferee<0>(redcVal), Return(true))); + EXPECT_CALL(*mMockApi, setRedc(redcVal)).InSequence(redcSeq).WillOnce(Return(true)); + + EXPECT_CALL(*mMockCal, getQ(_)) + .InSequence(qSeq) + .WillOnce(DoAll(SetArgReferee<0>(qVal), Return(true))); + EXPECT_CALL(*mMockApi, setQ(qVal)).InSequence(qSeq).WillOnce(Return(true)); + + EXPECT_CALL(*mMockCal, getLongFrequencyShift(_)).WillOnce(Return(true)); + + mMockCal->getVersion(&calVer); + if (calVer == 2) { + volGet = EXPECT_CALL(*mMockCal, getTickVolLevels(_)).WillOnce(DoDefault()); + volGet = EXPECT_CALL(*mMockCal, getClickVolLevels(_)).WillOnce(DoDefault()); + volGet = EXPECT_CALL(*mMockCal, getLongVolLevels(_)).WillOnce(DoDefault()); + } + + EXPECT_CALL(*mMockCal, isF0CompEnabled()).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, setF0CompEnable(true)).WillOnce(Return(true)); + EXPECT_CALL(*mMockCal, isRedcCompEnabled()).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, setRedcCompEnable(true)).WillOnce(Return(true)); + + EXPECT_CALL(*mMockCal, isChirpEnabled()).WillOnce(Return(true)); + EXPECT_CALL(*mMockCal, getSupportedPrimitives(_)) + .InSequence(supportedPrimitivesSeq) + .WillOnce(DoAll(SetArgPointee<0>(supportedPrimitivesBits), Return(true))); + + EXPECT_CALL(*mMockApi, setMinOnOffInterval(MIN_ON_OFF_INTERVAL_US)).WillOnce(Return(true)); + createVibrator(std::move(mockapi), std::move(mockcal), false); +} + +TEST_F(VibratorTest, on) { + Sequence s1, s2; + uint16_t duration = std::rand() + 1; + + EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)).InSequence(s1).WillOnce(DoDefault()); + EXPECT_CALL(*mMockApi, setFFEffect(_, _, duration + MAX_COLD_START_LATENCY_MS)) + .InSequence(s2) + .WillOnce(DoDefault()); + EXPECT_CALL(*mMockApi, setFFPlay(_, ON_EFFECT_INDEX, true)) + .InSequence(s1, s2) + .WillOnce(DoDefault()); + EXPECT_TRUE(mVibrator->on(duration, nullptr).isOk()); +} + +TEST_F(VibratorTest, off) { + Sequence s1; + EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)).InSequence(s1).WillOnce(DoDefault()); + EXPECT_TRUE(mVibrator->off().isOk()); +} + +TEST_F(VibratorTest, supportsAmplitudeControl_supported) { + int32_t capabilities; + EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(true)); + + EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk()); + EXPECT_GT(capabilities & IVibrator::CAP_AMPLITUDE_CONTROL, 0); +} + +TEST_F(VibratorTest, supportsExternalAmplitudeControl_unsupported) { + int32_t capabilities; + EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(true)); + + EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk()); + EXPECT_EQ(capabilities & IVibrator::CAP_EXTERNAL_AMPLITUDE_CONTROL, 0); +} + +TEST_F(VibratorTest, setAmplitude_supported) { + EffectAmplitude amplitude = static_cast(std::rand()) / RAND_MAX ?: 1.0f; + + EXPECT_CALL(*mMockApi, setFFGain(_, amplitudeToScale(amplitude))).WillOnce(Return(true)); + + EXPECT_TRUE(mVibrator->setAmplitude(amplitude).isOk()); +} + +TEST_F(VibratorTest, supportsExternalControl_supported) { + int32_t capabilities; + EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(true)); + + EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk()); + EXPECT_GT(capabilities & IVibrator::CAP_EXTERNAL_CONTROL, 0); +} + +TEST_F(VibratorTest, supportsExternalControl_unsupported) { + int32_t capabilities; + EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(false)); + + EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk()); + EXPECT_EQ(capabilities & IVibrator::CAP_EXTERNAL_CONTROL, 0); +} + +TEST_F(VibratorTest, setExternalControl_enable) { + Sequence s1, s2; + EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)).InSequence(s1).WillOnce(DoDefault()); + EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).InSequence(s2).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, true, _, _)) + .InSequence(s1, s2) + .WillOnce(Return(true)); + + EXPECT_TRUE(mVibrator->setExternalControl(true).isOk()); +} + +TEST_F(VibratorTest, setExternalControl_disable) { + Sequence s1, s2, s3, s4; + + // The default mIsUnderExternalControl is false, so it needs to turn on the External Control + // to make mIsUnderExternalControl become true. + EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)) + .InSequence(s1) + .InSequence(s1) + .WillOnce(DoDefault()); + EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).InSequence(s2).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, true, _, _)).InSequence(s3).WillOnce(Return(true)); + + EXPECT_TRUE(mVibrator->setExternalControl(true).isOk()); + + EXPECT_CALL(*mMockApi, setFFGain(_, levelToScale(VOLTAGE_SCALE_MAX))) + .InSequence(s4) + .WillOnce(DoDefault()); + EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, false, _, _)) + .InSequence(s1, s2, s3, s4) + .WillOnce(Return(true)); + + EXPECT_TRUE(mVibrator->setExternalControl(false).isOk()); +} + +class EffectsTest : public VibratorTest, public WithParamInterface { + public: + static auto PrintParam(const TestParamInfo &info) { + auto param = info.param; + auto effect = std::get<0>(param); + auto strength = std::get<1>(param); + return toString(effect) + "_" + toString(strength); + } +}; + +TEST_P(EffectsTest, perform) { + auto param = GetParam(); + auto effect = std::get<0>(param); + auto strength = std::get<1>(param); + auto scale = EFFECT_SCALE.find(param); + auto queue = EFFECT_QUEUE.find(param); + EffectDuration duration; + auto callback = ndk::SharedRefBase::make(); + std::promise promise; + std::future future{promise.get_future()}; + auto complete = [&promise] { + promise.set_value(); + return ndk::ScopedAStatus::ok(); + }; + bool composeEffect; + + ExpectationSet eSetup; + Expectation eActivate, ePollHaptics, ePollStop, eEraseDone; + + if (scale != EFFECT_SCALE.end()) { + EffectIndex index = EFFECT_INDEX.at(effect); + duration = EFFECT_DURATIONS[index]; + + eSetup += EXPECT_CALL(*mMockApi, setFFGain(_, levelToScale(scale->second))) + .WillOnce(DoDefault()); + eActivate = EXPECT_CALL(*mMockApi, setFFPlay(_, index, true)) + .After(eSetup) + .WillOnce(DoDefault()); + } else if (queue != EFFECT_QUEUE.end()) { + duration = std::get<1>(queue->second); + eSetup += EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)) + .After(eSetup) + .WillOnce(DoDefault()); + eSetup += EXPECT_CALL(*mMockApi, getOwtFreeSpace(_)).WillOnce(DoDefault()); + eSetup += EXPECT_CALL(*mMockApi, uploadOwtEffect(_, _, _, _, _, _)) + .After(eSetup) + .WillOnce(DoDefault()); + eActivate = EXPECT_CALL(*mMockApi, setFFPlay(_, WAVEFORM_COMPOSE, true)) + .After(eSetup) + .WillOnce(DoDefault()); + composeEffect = true; + } else { + duration = 0; + } + + if (duration) { + ePollHaptics = EXPECT_CALL(*mMockApi, pollVibeState(1, POLLING_TIMEOUT)) + .After(eActivate) + .WillOnce(DoDefault()); + ePollStop = EXPECT_CALL(*mMockApi, pollVibeState(0, -1)) + .After(ePollHaptics) + .WillOnce(DoDefault()); + if (composeEffect) { + eEraseDone = EXPECT_CALL(*mMockApi, eraseOwtEffect(_, _, _)) + .After(ePollStop) + .WillOnce(DoDefault()); + EXPECT_CALL(*callback, onComplete()).After(eEraseDone).WillOnce(complete); + } else { + EXPECT_CALL(*callback, onComplete()).After(ePollStop).WillOnce(complete); + } + } + + int32_t lengthMs; + ndk::ScopedAStatus status = mVibrator->perform(effect, strength, callback, &lengthMs); + if (status.isOk()) { + EXPECT_LE(duration, lengthMs); + } else { + EXPECT_EQ(EX_UNSUPPORTED_OPERATION, status.getExceptionCode()); + EXPECT_EQ(0, lengthMs); + } + + if (duration) { + EXPECT_EQ(future.wait_for(std::chrono::milliseconds(100)), std::future_status::ready); + } +} + +const std::vector kEffects{ndk::enum_range().begin(), + ndk::enum_range().end()}; +const std::vector kEffectStrengths{ndk::enum_range().begin(), + ndk::enum_range().end()}; + +INSTANTIATE_TEST_CASE_P(VibratorTests, EffectsTest, + Combine(ValuesIn(kEffects.begin(), kEffects.end()), + ValuesIn(kEffectStrengths.begin(), kEffectStrengths.end())), + EffectsTest::PrintParam); + +struct PrimitiveParam { + CompositePrimitive primitive; + EffectIndex index; +}; + +class PrimitiveTest : public VibratorTest, public WithParamInterface { + public: + static auto PrintParam(const TestParamInfo &info) { + return toString(info.param.primitive); + } +}; + +const std::vector kPrimitiveParams = { + {CompositePrimitive::CLICK, 2}, {CompositePrimitive::THUD, 4}, + {CompositePrimitive::SPIN, 5}, {CompositePrimitive::QUICK_RISE, 6}, + {CompositePrimitive::SLOW_RISE, 7}, {CompositePrimitive::QUICK_FALL, 8}, + {CompositePrimitive::LIGHT_TICK, 9}, {CompositePrimitive::LOW_TICK, 10}, +}; + +TEST_P(PrimitiveTest, getPrimitiveDuration) { + auto param = GetParam(); + auto primitive = param.primitive; + auto index = param.index; + int32_t duration; + + EXPECT_EQ(EX_NONE, mVibrator->getPrimitiveDuration(primitive, &duration).getExceptionCode()); + EXPECT_EQ(EFFECT_DURATIONS[index], duration); +} + +INSTANTIATE_TEST_CASE_P(VibratorTests, PrimitiveTest, + ValuesIn(kPrimitiveParams.begin(), kPrimitiveParams.end()), + PrimitiveTest::PrintParam); + +struct ComposeParam { + std::string name; + std::vector composite; + EffectQueue queue; +}; + +class ComposeTest : public VibratorTest, public WithParamInterface { + public: + static auto PrintParam(const TestParamInfo &info) { return info.param.name; } +}; + +TEST_P(ComposeTest, compose) { + auto param = GetParam(); + auto composite = param.composite; + auto queue = std::get<0>(param.queue); + ExpectationSet eSetup; + Expectation eActivate, ePollHaptics, ePollStop, eEraseDone; + auto callback = ndk::SharedRefBase::make(); + std::promise promise; + std::future future{promise.get_future()}; + auto complete = [&promise] { + promise.set_value(); + return ndk::ScopedAStatus::ok(); + }; + + eSetup += EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)) + .After(eSetup) + .WillOnce(DoDefault()); + eSetup += EXPECT_CALL(*mMockApi, getOwtFreeSpace(_)).WillOnce(DoDefault()); + eSetup += EXPECT_CALL(*mMockApi, uploadOwtEffect(_, _, _, _, _, _)) + .After(eSetup) + .WillOnce(DoDefault()); + eActivate = EXPECT_CALL(*mMockApi, setFFPlay(_, WAVEFORM_COMPOSE, true)) + .After(eSetup) + .WillOnce(DoDefault()); + + ePollHaptics = EXPECT_CALL(*mMockApi, pollVibeState(1, POLLING_TIMEOUT)) + .After(eActivate) + .WillOnce(DoDefault()); + ePollStop = + EXPECT_CALL(*mMockApi, pollVibeState(0, -1)).After(ePollHaptics).WillOnce(DoDefault()); + eEraseDone = + EXPECT_CALL(*mMockApi, eraseOwtEffect(_, _, _)).After(ePollStop).WillOnce(DoDefault()); + EXPECT_CALL(*callback, onComplete()).After(eEraseDone).WillOnce(complete); + + EXPECT_EQ(EX_NONE, mVibrator->compose(composite, callback).getExceptionCode()); + + EXPECT_EQ(future.wait_for(std::chrono::milliseconds(100)), std::future_status::ready); +} + +const std::vector kComposeParams = { + {"click", + {{0, CompositePrimitive::CLICK, 1.0f}}, + Queue(QueueEffect(2, Level(1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)}, + {"thud", + {{1, CompositePrimitive::THUD, 0.8f}}, + Queue(1, QueueEffect(4, Level(0.8f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)}, + {"spin", + {{2, CompositePrimitive::SPIN, 0.6f}}, + Queue(2, QueueEffect(5, Level(0.6f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)}, + {"quick_rise", + {{3, CompositePrimitive::QUICK_RISE, 0.4f}}, + Queue(3, QueueEffect(6, Level(0.4f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])), 0)}, + {"slow_rise", + {{4, CompositePrimitive::SLOW_RISE, 0.0f}}, + Queue(4, QueueEffect(7, Level(0.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)}, + {"quick_fall", + {{5, CompositePrimitive::QUICK_FALL, 1.0f}}, + Queue(5, QueueEffect(8, Level(1.0f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])), 0)}, + {"pop", + {{6, CompositePrimitive::SLOW_RISE, 1.0f}, {50, CompositePrimitive::THUD, 1.0f}}, + Queue(6, QueueEffect(7, Level(1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 50, + QueueEffect(4, Level(1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)}, + {"snap", + {{7, CompositePrimitive::QUICK_RISE, 1.0f}, {0, CompositePrimitive::QUICK_FALL, 1.0f}}, + Queue(7, QueueEffect(6, Level(1.0f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])), + QueueEffect(8, Level(1.0f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])), 0)}, +}; + +INSTANTIATE_TEST_CASE_P(VibratorTests, ComposeTest, + ValuesIn(kComposeParams.begin(), kComposeParams.end()), + ComposeTest::PrintParam); +} // namespace vibrator +} // namespace hardware +} // namespace android +} // namespace aidl diff --git a/vibrator/cs40l26/tests/types.h b/vibrator/cs40l26/tests/types.h new file mode 100644 index 0000000..e05c648 --- /dev/null +++ b/vibrator/cs40l26/tests/types.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2022 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef ANDROID_HARDWARE_VIBRATOR_TEST_TYPES_H +#define ANDROID_HARDWARE_VIBRATOR_TEST_TYPES_H + +#include + +using EffectIndex = uint16_t; +using EffectLevel = uint32_t; +using EffectAmplitude = float; +using EffectScale = uint16_t; +using EffectDuration = uint32_t; +using EffectQueue = std::tuple; +using EffectTuple = std::tuple<::aidl::android::hardware::vibrator::Effect, + ::aidl::android::hardware::vibrator::EffectStrength>; + +using QueueEffect = std::tuple; +using QueueDelay = uint32_t; + +#endif // ANDROID_HARDWARE_VIBRATOR_TEST_TYPES_H diff --git a/vibrator/cs40l26/tests/utils.h b/vibrator/cs40l26/tests/utils.h new file mode 100644 index 0000000..e7f6055 --- /dev/null +++ b/vibrator/cs40l26/tests/utils.h @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2022 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef ANDROID_HARDWARE_VIBRATOR_TEST_UTILS_H +#define ANDROID_HARDWARE_VIBRATOR_TEST_UTILS_H + +#include + +#include "types.h" + +static inline EffectScale toScale(float amplitude, float maximum) { + float ratio = 100; /* Unit: % */ + if (maximum != 0) + ratio = amplitude / maximum * 100; + + if (maximum == 0 || ratio > 100) + ratio = 100; + + return std::round(ratio); +} + +static inline EffectScale levelToScale(EffectLevel level) { + return toScale(level, 100); +} + +static inline EffectScale amplitudeToScale(EffectAmplitude amplitude) { + return toScale(amplitude, 1.0f); +} + +static inline uint32_t msToCycles(EffectDuration ms) { + return ms * 48; +} + +#endif // ANDROID_HARDWARE_VIBRATOR_TEST_UTILS_H From 0db068b63c425a82ec6edcc348d29d9aeca8ba5f Mon Sep 17 00:00:00 2001 From: Chris Paulo Date: Wed, 2 Nov 2022 22:21:50 +0000 Subject: [PATCH 095/124] device/vibrator: Add contextual haptics feature Add capability for vibrator HAL to detect whether the device is face-up and adjust/scale haptic alerts to avoid loud and startling buzzing when there is no case on the device. Added global compile-time disable that can be set in the environment. Bug: 198239103 Test: Verified tests and functionality Change-Id: I6b2355acb7fa5e0323b8eca6327bb19ac42a2c56 Signed-off-by: Chris Paulo --- conf/init.lynx.rc | 7 + device-lynx.mk | 9 +- vibrator/Android.bp | 12 +- vibrator/OWNERS | 1 + vibrator/common/Android.bp | 2 +- vibrator/cs40l26/Android.bp | 81 ++++--- vibrator/cs40l26/CapoDetector.cpp | 216 ++++++++++++++++++ vibrator/cs40l26/Hardware.h | 16 ++ vibrator/cs40l26/Vibrator.cpp | 136 ++++++++++- vibrator/cs40l26/Vibrator.h | 26 ++- ....vibrator-service.cs40l26-private-lynx.rc} | 4 +- ...vibrator-service.cs40l26-private-lynx.xml} | 0 vibrator/cs40l26/device.mk | 2 +- vibrator/cs40l26/inc/CapoDetector.h | 107 +++++++++ vibrator/cs40l26/proto/capo.proto | 148 ++++++++++++ vibrator/cs40l26/tests/Android.bp | 4 +- vibrator/cs40l26/tests/mocks.h | 5 + vibrator/cs40l26/tests/test-vibrator.cpp | 10 + 18 files changed, 730 insertions(+), 56 deletions(-) create mode 100644 vibrator/cs40l26/CapoDetector.cpp rename vibrator/cs40l26/{android.hardware.vibrator-service.cs40l26.rc => android.hardware.vibrator-service.cs40l26-private-lynx.rc} (96%) rename vibrator/cs40l26/{android.hardware.vibrator-service.cs40l26.xml => android.hardware.vibrator-service.cs40l26-private-lynx.xml} (100%) create mode 100644 vibrator/cs40l26/inc/CapoDetector.h create mode 100644 vibrator/cs40l26/proto/capo.proto diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc index 1da8ea7..dbc4f13 100644 --- a/conf/init.lynx.rc +++ b/conf/init.lynx.rc @@ -110,3 +110,10 @@ on override-sf-uclamp # it should be written by the system init. on property:ro.boot.hardware.sku=G82U8 setprop audio.camerasound.force true + +# Route vibrator.adaptive_haptics.enabled to persist +on property:vibrator.adaptive_haptics.enabled=0 + setprop persist.vendor.vibrator.hal.context.enable false + +on property:vibrator.adaptive_haptics.enabled=1 + setprop persist.vendor.vibrator.hal.context.enable true diff --git a/device-lynx.mk b/device-lynx.mk index b69e7af..5bf8123 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -28,7 +28,7 @@ DEVICE_PACKAGE_OVERLAYS += device/google/lynx/lynx/overlay include device/google/lynx/audio/lynx/audio-tables.mk include device/google/gs201/device-shipping-common.mk -include hardware/google/pixel/vibrator/cs40l26/device.mk +include device/google/lynx/vibrator/cs40l26/device.mk # go/lyric-soong-variables $(call soong_config_set,lyric,camera_hardware,lynx) @@ -154,7 +154,12 @@ endif PRODUCT_VENDOR_PROPERTIES += \ ro.vendor.vibrator.hal.supported_primitives=243 \ ro.vendor.vibrator.hal.f0.comp.enabled=1 \ - ro.vendor.vibrator.hal.redc.comp.enabled=0 + ro.vendor.vibrator.hal.redc.comp.enabled=0 \ + persist.vendor.vibrator.hal.context.enable=false \ + persist.vendor.vibrator.hal.context.scale=40 \ + persist.vendor.vibrator.hal.context.fade=true \ + persist.vendor.vibrator.hal.context.cooldowntime=1600 \ + persist.vendor.vibrator.hal.context.settlingtime=5000 # Trusty liboemcrypto.so PRODUCT_SOONG_NAMESPACES += vendor/google_devices/lynx/prebuilts diff --git a/vibrator/Android.bp b/vibrator/Android.bp index dff6816..c6da071 100644 --- a/vibrator/Android.bp +++ b/vibrator/Android.bp @@ -18,10 +18,10 @@ package { } cc_defaults { - name: "PixelVibratorDefaults", + name: "PixelVibratorDefaultsPrivateLynx", relative_install_path: "hw", static_libs: [ - "PixelVibratorCommon", + "PixelVibratorCommonPrivateLynx", ], shared_libs: [ "libbase", @@ -34,16 +34,16 @@ cc_defaults { } cc_defaults { - name: "PixelVibratorBinaryDefaults", - defaults: ["PixelVibratorDefaults"], + name: "PixelVibratorBinaryDefaultsPrivateLynx", + defaults: ["PixelVibratorDefaultsPrivateLynx"], shared_libs: [ "android.hardware.vibrator-V2-ndk", ], } cc_defaults { - name: "PixelVibratorTestDefaults", - defaults: ["PixelVibratorDefaults"], + name: "PixelVibratorTestDefaultsPrivateLynx", + defaults: ["PixelVibratorDefaultsPrivateLynx"], static_libs: [ "android.hardware.vibrator-V2-ndk", ], diff --git a/vibrator/OWNERS b/vibrator/OWNERS index 5d4a9c3..899224c 100644 --- a/vibrator/OWNERS +++ b/vibrator/OWNERS @@ -1,3 +1,4 @@ chasewu@google.com michaelwr@google.com taikuo@google.com +chrispaulo@google.com diff --git a/vibrator/common/Android.bp b/vibrator/common/Android.bp index 04fbc4d..b2a6d48 100644 --- a/vibrator/common/Android.bp +++ b/vibrator/common/Android.bp @@ -18,7 +18,7 @@ package { } cc_library { - name: "PixelVibratorCommon", + name: "PixelVibratorCommonPrivateLynx", srcs: [ "HardwareBase.cpp", ], diff --git a/vibrator/cs40l26/Android.bp b/vibrator/cs40l26/Android.bp index 53764de..f60189d 100644 --- a/vibrator/cs40l26/Android.bp +++ b/vibrator/cs40l26/Android.bp @@ -1,5 +1,5 @@ // -// Copyright (C) 2021 The Android Open Source Project +// Copyright (C) 2022 The Android Open Source Project // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. @@ -18,7 +18,7 @@ package { } cc_defaults { - name: "android.hardware.vibrator-defaults.cs40l26", + name: "android.hardware.vibrator-defaults.cs40l26-private-lynx", cflags: [ "-DATRACE_TAG=(ATRACE_TAG_VIBRATOR | ATRACE_TAG_HAL)", "-DLOG_TAG=\"android.hardware.vibrator-cs40l26\"", @@ -29,10 +29,10 @@ cc_defaults { } cc_defaults { - name: "VibratorHalCs40l26BinaryDefaults", + name: "VibratorHalCs40l26BinaryDefaultsPrivateLynx", defaults: [ - "PixelVibratorBinaryDefaults", - "android.hardware.vibrator-defaults.cs40l26", + "PixelVibratorBinaryDefaultsPrivateLynx", + "android.hardware.vibrator-defaults.cs40l26-private-lynx", ], include_dirs: [ "external/tinyalsa/include", @@ -44,43 +44,64 @@ cc_defaults { } cc_defaults { - name: "VibratorHalCs40l26TestDefaults", + name: "VibratorHalCs40l26TestDefaultsPrivateLynx", defaults: [ - "PixelVibratorTestDefaults", - "android.hardware.vibrator-defaults.cs40l26", + "PixelVibratorTestDefaultsPrivateLynx", + "android.hardware.vibrator-defaults.cs40l26-private-lynx", ], static_libs: [ - "android.hardware.vibrator-impl.cs40l26", "libtinyalsa", ], + shared_libs: ["android.hardware.vibrator-impl.cs40l26-private-lynx"], } -cc_library { - name: "android.hardware.vibrator-impl.cs40l26", - defaults: ["VibratorHalCs40l26BinaryDefaults"], - srcs: ["Vibrator.cpp"], - export_include_dirs: ["."], +cc_library_shared { + name: "libvibecapo_proto_lynx", + vendor_available: true, + owner: "google", + srcs: [ + "proto/capo.proto", + ], + shared_libs: [ + "libprotobuf-cpp-full", + ], + export_include_dirs: [ + "inc", + ], + proto: { + type: "lite", + export_proto_headers: true, + }, +} + +cc_library_shared { + name: "android.hardware.vibrator-impl.cs40l26-private-lynx", + defaults: ["VibratorHalCs40l26BinaryDefaultsPrivateLynx"], + srcs: [ + "Vibrator.cpp", + "CapoDetector.cpp", + ], + static_libs: [ + "chre_client", + ], + shared_libs: [ + "libvibecapo_proto_lynx", + "libprotobuf-cpp-full", + ], + export_include_dirs: [ + ".", + "inc", + ], vendor_available: true, visibility: [":__subpackages__"], } cc_binary { - name: "android.hardware.vibrator-service.cs40l26", - defaults: ["VibratorHalCs40l26BinaryDefaults"], - init_rc: ["android.hardware.vibrator-service.cs40l26.rc"], - vintf_fragments: ["android.hardware.vibrator-service.cs40l26.xml"], + name: "android.hardware.vibrator-service.cs40l26-private-lynx", + defaults: ["VibratorHalCs40l26BinaryDefaultsPrivateLynx"], + init_rc: ["android.hardware.vibrator-service.cs40l26-private-lynx.rc"], + vintf_fragments: ["android.hardware.vibrator-service.cs40l26-private-lynx.xml"], srcs: ["service.cpp"], - shared_libs: ["android.hardware.vibrator-impl.cs40l26"], - proprietary: true, -} - -cc_binary { - name: "android.hardware.vibrator-service.cs40l26-dual", - defaults: ["VibratorHalCs40l26BinaryDefaults"], - init_rc: ["android.hardware.vibrator-service.cs40l26-dual.rc"], - vintf_fragments: ["android.hardware.vibrator-service.cs40l26-dual.xml"], - srcs: ["service.cpp"], - shared_libs: ["android.hardware.vibrator-impl.cs40l26"], - cflags: ["-DVIBRATOR_NAME=\"dual\""], + shared_libs: ["android.hardware.vibrator-impl.cs40l26-private-lynx"], proprietary: true, } diff --git a/vibrator/cs40l26/CapoDetector.cpp b/vibrator/cs40l26/CapoDetector.cpp new file mode 100644 index 0000000..1b8ba89 --- /dev/null +++ b/vibrator/cs40l26/CapoDetector.cpp @@ -0,0 +1,216 @@ +/* + * Copyright 2022 Google LLC. All Rights Reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "CapoDetector.h" +#include +#include +#include + +#include + +#ifdef LOG_TAG +#undef LOG_TAG +#define LOG_TAG "CapoDetector" +#endif + +namespace android { +namespace chre { + +namespace { // anonymous namespace for file-local definitions + +static capo::ConfigureDetector_ConfigData config_data = capo::ConfigureDetector_ConfigData(); +static capo::ConfigureDetector msg = capo::ConfigureDetector(); + + +/** + * Called when onConnected() to send NanoappList request. + */ +void requestNanoappList(SocketClient &client) { + flatbuffers::FlatBufferBuilder builder; + HostProtocolHost::encodeNanoappListRequest(builder); + if (!client.sendMessage(builder.GetBufferPointer(), builder.GetSize())) { + ALOGE("Failed to send NanoappList request"); + } +} + +} // namespace + +/** + * Called when initializing connection with CHRE socket. + */ +sp CapoDetector::start() { + sp listener = new CapoDetector(); + if (!listener->connectInBackground(kChreSocketName, listener)) { + ALOGE("Couldn't connect to CHRE socket"); + return nullptr; + } + ALOGI("%s connect to CHRE socket.", __func__); + + return listener; +} + +/** + * Called when the socket is successfully (re-)connected. + * Reset the position and try to send NanoappList request. + */ +void CapoDetector::onConnected() { + flatbuffers::FlatBufferBuilder builder; + + // Reset the last position type. + last_position_type_ = capo::PositionType::UNKNOWN; + requestNanoappList(*this); +} + +/** + * Called when we have failed to (re-)connect the socket after many attempts + * and are giving up. + */ +void CapoDetector::onConnectionAborted() { + ALOGE("%s, Capo Aborting Connection!", __func__); +} + +/** + * Invoked when the socket is disconnected, and this connection loss was not + * the result of an explicit call to disconnect(). + * Reset the position while disconnecting. + */ + +void CapoDetector::onDisconnected() { + last_position_type_ = capo::PositionType::UNKNOWN; +} + +/** + * Decode unix socket msgs to CHRE messages, and call the appropriate + * callback depending on the CHRE message. + */ +void CapoDetector::onMessageReceived(const void *data, size_t length) { + if (!HostProtocolHost::decodeMessageFromChre(data, length, *this)) { + ALOGE("Failed to decode message"); + } +} + +/** + * Listen for messages from capo nanoapp and handle the message. + */ +void CapoDetector::handleNanoappMessage(const fbs::NanoappMessageT &message) { + ALOGI("%s, Id %" PRIu64 ", type %d, size %d", __func__, message.app_id, message.message_type, + static_cast(message.message.size())); + // Exclude the message with unmatched nanoapp id. + if (message.app_id != kCapoNanoappId) + return; + + // Handle the message with message_type. + switch (message.message_type) { + case capo::MessageType::ACK_NOTIFICATION: { + capo::AckNotification gd; + gd.set_notification_type(static_cast(message.message[1])); + ALOGD("%s, get notification event from capo nanoapp, type %d", __func__, + gd.notification_type()); + break; + } + case capo::MessageType::POSITION_DETECTED: { + capo::PositionDetected gd; + gd.set_position_type(static_cast(message.message[1])); + ALOGD("%s, get position event from capo nanoapp, type %d", __func__, + gd.position_type()); + + // Callback to function while getting carried position event. + if (callback_func_ != nullptr) { + last_position_type_ = gd.position_type(); + ALOGD("%s, sent position type %d to callback function", __func__, + last_position_type_); + callback_func_(last_position_type_); + } + break; + } + default: + ALOGE("%s, get invalid message, type: %" PRIu32 ", from capo nanoapp.", __func__, + message.message_type); + break; + } +} + +/** + * Handle the response of a NanoappList request. + * Ensure that capo nanoapp is running. + */ +void CapoDetector::handleNanoappListResponse(const fbs::NanoappListResponseT &response) { + for (const std::unique_ptr &nanoapp : response.nanoapps) { + if (nanoapp->app_id == kCapoNanoappId) { + if (nanoapp->enabled) + enable(); + else + ALOGE("Capo nanoapp not enabled"); + return; + } + } + ALOGE("Capo nanoapp not found"); +} + +/** + * Send enabling message to the nanoapp. + */ +void CapoDetector::enable() { + // Create CHRE message with serialized message + flatbuffers::FlatBufferBuilder builder, config_builder, force_builder; + + config_data.set_still_time_threshold_nanosecond(mCapoDetectorMDParameters.still_time_threshold_ns); + config_data.set_window_width_nanosecond(mCapoDetectorMDParameters.window_width_ns); + config_data.set_motion_confidence_threshold(mCapoDetectorMDParameters.motion_confidence_threshold); + config_data.set_still_confidence_threshold(mCapoDetectorMDParameters.still_confidence_threshold); + config_data.set_var_threshold(mCapoDetectorMDParameters.var_threshold); + config_data.set_var_threshold_delta(mCapoDetectorMDParameters.var_threshold_delta); + + msg.set_allocated_config_data(&config_data); + + auto pb_size = msg.ByteSizeLong(); + auto pb_data = std::make_unique(pb_size); + + if (!msg.SerializeToArray(pb_data.get(), pb_size)) { + ALOGE("Failed to serialize message."); + } + + ALOGI("Configuring CapoDetector"); + // Configure the detector from host-side + android::chre::HostProtocolHost::encodeNanoappMessage( + config_builder, getNanoppAppId(), capo::MessageType::CONFIGURE_DETECTOR, getHostEndPoint(), + pb_data.get(), pb_size); + ALOGI("Sending capo config message to Nanoapp, %" PRIu32 " bytes", config_builder.GetSize()); + if (!sendMessage(config_builder.GetBufferPointer(), config_builder.GetSize())) { + ALOGE("Failed to send config event for capo nanoapp"); + } + + ALOGI("Enabling CapoDetector"); + android::chre::HostProtocolHost::encodeNanoappMessage( + builder, getNanoppAppId(), capo::MessageType::ENABLE_DETECTOR, getHostEndPoint(), + /*messageData*/ nullptr, /*messageDataLenbuffer*/ 0); + ALOGI("Sending enable message to Nanoapp, %" PRIu32 " bytes", builder.GetSize()); + if (!sendMessage(builder.GetBufferPointer(), builder.GetSize())) { + ALOGE("Failed to send enable event for capo nanoapp"); + } + + ALOGI("Forcing CapoDetector to update state"); + // Force an updated state upon connection + android::chre::HostProtocolHost::encodeNanoappMessage( + force_builder, getNanoppAppId(), capo::MessageType::FORCE_UPDATE, getHostEndPoint(), + /*messageData*/ nullptr, /*messageDataLenbuffer*/ 0); + ALOGI("Sending force-update message to Nanoapp, %" PRIu32 " bytes", force_builder.GetSize()); + if (!sendMessage(force_builder.GetBufferPointer(), force_builder.GetSize())) { + ALOGE("Failed to send force-update event for capo nanoapp"); + } +} + +} // namespace chre +} // namespace android diff --git a/vibrator/cs40l26/Hardware.h b/vibrator/cs40l26/Hardware.h index ae052ba..be97594 100644 --- a/vibrator/cs40l26/Hardware.h +++ b/vibrator/cs40l26/Hardware.h @@ -92,6 +92,22 @@ class HwApi : public Vibrator::HwApi, private HwApiBase { bool setF0CompEnable(bool value) override { return set(value, &mF0CompEnable); } bool setRedcCompEnable(bool value) override { return set(value, &mRedcCompEnable); } bool setMinOnOffInterval(uint32_t value) override { return set(value, &mMinOnOffInterval); } + uint32_t getContextScale() override { + return utils::getProperty("persist.vendor.vibrator.hal.context.scale", 100); + } + bool getContextEnable() override { + return utils::getProperty("persist.vendor.vibrator.hal.context.enable", false); + } + uint32_t getContextSettlingTime() override { + return utils::getProperty("persist.vendor.vibrator.hal.context.settlingtime", 3000); + } + uint32_t getContextCooldownTime() override { + return utils::getProperty("persist.vendor.vibrator.hal.context.cooldowntime", 1000); + } + bool getContextFadeEnable() override { + return utils::getProperty("persist.vendor.vibrator.hal.context.fade", false); + } + // TODO(b/234338136): Need to add the force feedback HW API test cases bool setFFGain(int fd, uint16_t value) override { struct input_event gain = { diff --git a/vibrator/cs40l26/Vibrator.cpp b/vibrator/cs40l26/Vibrator.cpp index 3af057c..21a1682 100644 --- a/vibrator/cs40l26/Vibrator.cpp +++ b/vibrator/cs40l26/Vibrator.cpp @@ -28,11 +28,22 @@ #include #include #include +#include +#include + +#include "CapoDetector.h" #ifndef ARRAY_SIZE #define ARRAY_SIZE(x) (sizeof((x)) / sizeof((x)[0])) #endif +#ifdef LOG_TAG +#undef LOG_TAG +#define LOG_TAG "Vibrator" +#endif + +using CapoDetector = android::chre::CapoDetector; + namespace aidl { namespace android { namespace hardware { @@ -89,15 +100,34 @@ static constexpr float PWLE_FREQUENCY_MAX_HZ = 1000.00; static constexpr float PWLE_BW_MAP_SIZE = 1 + ((PWLE_FREQUENCY_MAX_HZ - PWLE_FREQUENCY_MIN_HZ) / PWLE_FREQUENCY_RESOLUTION_HZ); -static uint16_t amplitudeToScale(float amplitude, float maximum) { - float ratio = 100; /* Unit: % */ - if (maximum != 0) - ratio = amplitude / maximum * 100; +#ifndef DISABLE_ADAPTIVE_HAPTICS_FEATURE +static constexpr bool mAdaptiveHapticsEnable = true; +#else +static constexpr bool mAdaptiveHapticsEnable = false; +#endif /* DISABLE_ADAPTIVE_HAPTICS_FEATURE */ - if (maximum == 0 || ratio > 100) - ratio = 100; +static sp vibeContextListener; +uint8_t mCapoDeviceState = 0; +uint32_t mLastFaceUpEvent = 0; +uint32_t mLastEffectPlayedTime = 0; +float mLastPlayedScale = 0; - return std::round(ratio); +static uint32_t getCurrentTimeInMs(void) { + return std::chrono::duration_cast(std::chrono::system_clock::now().time_since_epoch()).count(); +} + +static void capoEventCallback(uint8_t eventId) { + ALOGD("Vibrator %s, From: 0x%x To: 0x%x", __func__, mCapoDeviceState, (uint32_t)eventId); + // Record the last moment we were in FACE_UP state + if (mCapoDeviceState == capo::PositionType::ON_TABLE_FACE_UP || + eventId == capo::PositionType::ON_TABLE_FACE_UP) { + mLastFaceUpEvent = getCurrentTimeInMs(); + } + mCapoDeviceState = eventId; +} + +static uint8_t getDeviceState(void) { + return mCapoDeviceState; } enum WaveformBankID : uint8_t { @@ -366,6 +396,18 @@ Vibrator::Vibrator(std::unique_ptr hwapi, std::unique_ptr hwcal) } mHwApi->setMinOnOffInterval(MIN_ON_OFF_INTERVAL_US); + + if (mAdaptiveHapticsEnable) { + vibeContextListener = CapoDetector::start(); + if (vibeContextListener == nullptr) { + ALOGE("%s, CapoDetector failed to start", __func__); + } else { + ALOGD("%s, CapoDetector started successfully! NanoAppID: 0x%x", __func__, + (uint32_t)vibeContextListener->getNanoppAppId()); + vibeContextListener->setCallback(capoEventCallback); + ALOGD("%s, CapoDetector Set Callback function from vibe", __func__); + } + } } ndk::ScopedAStatus Vibrator::getCapabilities(int32_t *_aidl_return) { @@ -666,8 +708,70 @@ ndk::ScopedAStatus Vibrator::on(uint32_t timeoutMs, uint32_t effectIndex, dspmem return ndk::ScopedAStatus::ok(); } -ndk::ScopedAStatus Vibrator::setEffectAmplitude(float amplitude, float maximum) { - uint16_t scale = amplitudeToScale(amplitude, maximum); +uint16_t Vibrator::amplitudeToScale(float amplitude, float maximum, bool scalable) { + float ratio = 100; /* Unit: % */ + + if (maximum != 0) + ratio = amplitude / maximum * 100; + + if (maximum == 0 || ratio > 100) + ratio = 100; + + if (scalable && mContextEnable & mAdaptiveHapticsEnable) { + uint32_t now = getCurrentTimeInMs(); + uint32_t last_played = mLastEffectPlayedTime; + float context_scale = 1.0; + bool device_face_up = getDeviceState() == capo::PositionType::ON_TABLE_FACE_UP; + float pre_scaled_ratio = ratio; + mLastEffectPlayedTime = now; + + ALOGD("Vibrator Now: %u, Last: %u, ScaleTime: %u, Since? %d", now, mLastFaceUpEvent, mScaleTime, (now < mLastFaceUpEvent + mScaleTime)); + /* If the device is face-up or within the fade scaling range, find new scaling factor */ + if (device_face_up || now < mLastFaceUpEvent + mScaleTime) { + /* Device is face-up, so we will scale it down. Start with highest scaling factor */ + context_scale = mScalingFactor <= 100 ? static_cast(mScalingFactor)/100 : 1.0; + if (mFadeEnable && mScaleTime > 0 && (context_scale < 1.0) && (now < mLastFaceUpEvent + mScaleTime) && !device_face_up) { + float fade_scale = static_cast(now - mLastFaceUpEvent)/static_cast(mScaleTime); + context_scale += ((1.0 - context_scale)*fade_scale); + ALOGD("Vibrator fade scale applied: %f", fade_scale); + } + ratio *= context_scale; + ALOGD("Vibrator adjusting for face-up: pre: %f, post: %f", + std::round(pre_scaled_ratio), std::round(ratio)); + } + + /* If we haven't played an effect within the cooldown time, save the scaling factor */ + if ((now - last_played) > mScaleCooldown) { + ALOGD("Vibrator updating lastplayed scale, old: %f, new: %f", mLastPlayedScale, context_scale); + mLastPlayedScale = context_scale; + } + else { + /* Override the scale to match previously played scale */ + ratio = mLastPlayedScale * pre_scaled_ratio; + ALOGD("Vibrator repeating last scale: %f, new ratio: %f, duration since last: %u", mLastPlayedScale, ratio, (now - last_played)); + } + } + + return std::round(ratio); +} + +void Vibrator::updateContext() { + mContextEnable = mHwApi->getContextEnable(); + mFadeEnable = mHwApi->getContextFadeEnable(); + mScalingFactor = mHwApi->getContextScale(); + mScaleTime = mHwApi->getContextSettlingTime(); + mScaleCooldown = mHwApi->getContextCooldownTime(); +} + +ndk::ScopedAStatus Vibrator::setEffectAmplitude(float amplitude, float maximum, bool scalable) { + uint16_t scale; + + if (mAdaptiveHapticsEnable && scalable) { + updateContext(); + } + + scale = amplitudeToScale(amplitude, maximum, scalable); + if (!mHwApi->setFFGain(mInputFd, scale)) { ALOGE("Failed to set the gain to %u (%d): %s", scale, errno, strerror(errno)); return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE); @@ -680,7 +784,7 @@ ndk::ScopedAStatus Vibrator::setGlobalAmplitude(bool set) { if (!set) { mLongEffectScale = 1.0; // Reset the scale for the later new effect. } - return setEffectAmplitude(amplitude, VOLTAGE_SCALE_MAX); + return setEffectAmplitude(amplitude, VOLTAGE_SCALE_MAX, true); } ndk::ScopedAStatus Vibrator::getSupportedAlwaysOnEffects(std::vector * /*_aidl_return*/) { @@ -1054,6 +1158,16 @@ binder_status_t Vibrator::dump(int fd, const char **args, uint32_t numArgs) { mHwCal->debug(fd); + dprintf(fd, "Capo Info\n"); + if (vibeContextListener) { + dprintf(fd, "Capo ID: 0x%x\n", (uint32_t)(vibeContextListener->getNanoppAppId())); + dprintf(fd, "Capo State: %d DetectedState: %d\n", vibeContextListener->getCarriedPosition(), + getDeviceState()); + } else { + dprintf(fd, "Capo ID: 0x%x\n", (uint32_t)(0xdeadbeef)); + dprintf(fd, "Capo State: %d DetectedState: %d\n", (uint32_t)0x454545, getDeviceState()); + } + fsync(fd); return STATUS_OK; } @@ -1265,7 +1379,7 @@ exit: ndk::ScopedAStatus Vibrator::performEffect(uint32_t effectIndex, uint32_t volLevel, dspmem_chunk *ch, const std::shared_ptr &callback) { - setEffectAmplitude(volLevel, VOLTAGE_SCALE_MAX); + setEffectAmplitude(volLevel, VOLTAGE_SCALE_MAX, false); return on(MAX_TIME_MS, effectIndex, ch, callback); } diff --git a/vibrator/cs40l26/Vibrator.h b/vibrator/cs40l26/Vibrator.h index 220c974..7c9e99c 100644 --- a/vibrator/cs40l26/Vibrator.h +++ b/vibrator/cs40l26/Vibrator.h @@ -23,6 +23,8 @@ #include #include #include +#include +#include namespace aidl { namespace android { @@ -61,6 +63,21 @@ class Vibrator : public BnVibrator { virtual bool setRedcCompEnable(bool value) = 0; // Stores the minumun delay time between playback and stop effects. virtual bool setMinOnOffInterval(uint32_t value) = 0; + // Gets the scaling factor for contextual haptic events. + virtual uint32_t getContextScale() = 0; + // Gets the enable status for contextual haptic events. + virtual bool getContextEnable() = 0; + // Gets the settling time for contextual haptic events. + // This will allow the device to stay face up for the duration given, + // even if InMotion events were detected. + virtual uint32_t getContextSettlingTime() = 0; + // Gets the cooldown time for contextual haptic events. + // This is used to avoid changing the scale of close playback events. + virtual uint32_t getContextCooldownTime() = 0; + // Checks the enable status for contextual haptics fade feature. When enabled + // this feature will cause the scaling factor to fade back up to max over + // the setting time set, instead of instantaneously changing it back to max. + virtual bool getContextFadeEnable() = 0; // Indicates the number of 0.125-dB steps of attenuation to apply to // waveforms triggered in response to vibration calls from the // Android vibrator HAL. @@ -158,7 +175,7 @@ class Vibrator : public BnVibrator { ndk::ScopedAStatus on(uint32_t timeoutMs, uint32_t effectIndex, struct dspmem_chunk *ch, const std::shared_ptr &callback); // set 'amplitude' based on an arbitrary scale determined by 'maximum' - ndk::ScopedAStatus setEffectAmplitude(float amplitude, float maximum); + ndk::ScopedAStatus setEffectAmplitude(float amplitude, float maximum, bool scalable); ndk::ScopedAStatus setGlobalAmplitude(bool set); // 'simple' effects are those precompiled and loaded into the controller ndk::ScopedAStatus getSimpleDetails(Effect effect, EffectStrength strength, @@ -181,6 +198,8 @@ class Vibrator : public BnVibrator { bool findHapticAlsaDevice(int *card, int *device); bool hasHapticAlsaDevice(); bool enableHapticPcmAmp(struct pcm **haptic_pcm, bool enable, int card, int device); + uint16_t amplitudeToScale(float amplitude, float maximum, bool scalable); + void updateContext(); std::unique_ptr mHwApi; std::unique_ptr mHwCal; @@ -200,6 +219,11 @@ class Vibrator : public BnVibrator { bool mIsUnderExternalControl; float mLongEffectScale = 1.0; bool mIsChirpEnabled; + uint32_t mScaleTime; + bool mFadeEnable; + uint32_t mScalingFactor; + uint32_t mScaleCooldown; + bool mContextEnable; uint32_t mSupportedPrimitivesBits = 0x0; std::vector mSupportedPrimitives; bool mConfigHapticAlsaDeviceDone{false}; diff --git a/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.rc b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.rc similarity index 96% rename from vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.rc rename to vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.rc index 0fcca56..6986d1a 100644 --- a/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.rc +++ b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.rc @@ -20,10 +20,10 @@ on property:vendor.all.modules.ready=1 enable vendor.vibrator.cs40l26 -service vendor.vibrator.cs40l26 /vendor/bin/hw/android.hardware.vibrator-service.cs40l26 +service vendor.vibrator.cs40l26 /vendor/bin/hw/android.hardware.vibrator-service.cs40l26-private-lynx class hal user system - group system input + group system input context_hub setenv INPUT_EVENT_NAME cs40l26_input setenv INPUT_EVENT_PATH /dev/input/event* diff --git a/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.xml b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.xml similarity index 100% rename from vibrator/cs40l26/android.hardware.vibrator-service.cs40l26.xml rename to vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.xml diff --git a/vibrator/cs40l26/device.mk b/vibrator/cs40l26/device.mk index 5a3dd4f..68860ef 100644 --- a/vibrator/cs40l26/device.mk +++ b/vibrator/cs40l26/device.mk @@ -1,5 +1,5 @@ PRODUCT_PACKAGES += \ - android.hardware.vibrator-service.cs40l26 + android.hardware.vibrator-service.cs40l26-private-lynx BOARD_SEPOLICY_DIRS += \ hardware/google/pixel-sepolicy/vibrator/common \ diff --git a/vibrator/cs40l26/inc/CapoDetector.h b/vibrator/cs40l26/inc/CapoDetector.h new file mode 100644 index 0000000..4b898ef --- /dev/null +++ b/vibrator/cs40l26/inc/CapoDetector.h @@ -0,0 +1,107 @@ +/* + * Copyright 2022 Google LLC. All Rights Reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include + +#include "proto/capo.pb.h" + +using android::sp; +using android::chre::HostProtocolHost; +using android::chre::IChreMessageHandlers; +using android::chre::SocketClient; + +// following convention of CHRE code. +namespace fbs = ::chre::fbs; + +namespace android { +namespace chre { + +#define NS_FROM_MS(x) ((x)*1000000) + +struct CapoMDParams { + uint64_t still_time_threshold_ns; + uint32_t window_width_ns; + float motion_confidence_threshold; + float still_confidence_threshold; + float var_threshold; + float var_threshold_delta; +}; + +class CapoDetector : public android::chre::SocketClient::ICallbacks, + public android::chre::IChreMessageHandlers, + public android::chre::SocketClient { + public: + // Typedef declaration for callback function. + typedef std::function cb_fn_t; + + // Called when initializing connection with CHRE socket. + static android::sp start(); + // Called when the socket is successfully (re-)connected. + // Reset the position and try to send NanoappList request. + void onConnected() override; + // Called when we have failed to (re-)connect the socket after many attempts + // and are giving up. + void onConnectionAborted() override; + // Invoked when the socket is disconnected, and this connection loss + // was not the result of an explicit call to disconnect(). + // Reset the position while disconnecting. + void onDisconnected() override; + // Decode unix socket msgs to CHRE messages, and call the appropriate + // callback depending on the CHRE message. + void onMessageReceived(const void *data, size_t length) override; + // Listen for messages from capo nanoapp and handle the message. + void handleNanoappMessage(const ::chre::fbs::NanoappMessageT &message) override; + // Handle the response of a NanoappList request. + // Ensure that capo nanoapp is running. + void handleNanoappListResponse(const ::chre::fbs::NanoappListResponseT &response) override; + // Send enabling message to the nanoapp. + void enable(); + + // Get last carried position type. + uint8_t getCarriedPosition() { return last_position_type_; } + // Get the host endpoint. + uint16_t getHostEndPoint() { return kHostEndpoint; } + // Get the capo nanoapp ID. + uint64_t getNanoppAppId() { return kCapoNanoappId; } + // Set up callback_func_ if needed. + void setCallback(cb_fn_t cb) { callback_func_ = cb; } + + private: + // Nanoapp ID of capo, ref: go/nanoapp-id-tracker. + static constexpr uint64_t kCapoNanoappId = 0x476f6f676c001020ULL; + // String of socket name for connecting chre. + static constexpr char kChreSocketName[] = "chre"; + // The host endpoint we use when sending message. + // Set with 0x9020 based on 0x8000 AND capo_app_id(1020). + // Ref: go/host-endpoint-id-tracker. + static constexpr uint16_t kHostEndpoint = 0x9020; + // Using for hal layer callback function. + cb_fn_t callback_func_ = nullptr; + // Last carried position received from the nano app + capo::PositionType last_position_type_ = capo::PositionType::UNKNOWN; + // Motion detector parameters for host-driven capo config + const struct CapoMDParams mCapoDetectorMDParameters { + .still_time_threshold_ns = NS_FROM_MS(500), + .window_width_ns = NS_FROM_MS(100), + .motion_confidence_threshold = 0.98f, + .still_confidence_threshold = 0.99f, + .var_threshold = 0.0125f, + .var_threshold_delta = 0.0125f, + }; +}; + +} // namespace chre +} // namespace android diff --git a/vibrator/cs40l26/proto/capo.proto b/vibrator/cs40l26/proto/capo.proto new file mode 100644 index 0000000..00b3186 --- /dev/null +++ b/vibrator/cs40l26/proto/capo.proto @@ -0,0 +1,148 @@ +syntax = "proto3"; + +package capo; + +// The message types used in capo nanoapp. Some of them are H2C +// (Host-To-CHRE) and others are C2H (CHRE-To-Host). One message type must be +// either H2C or C2H. Each message type can choose to have payload or not. +enum MessageType { + // Explicitly prevents 0 from being used as a valid message type. + // Doing so protects from obscure bugs caused by default-initialized values. + INVALID = 0; + + // Detector configuration related message start from 100. + // Signal for host to acknowledge the notification. + // It contains AckNotification payload. + ACK_NOTIFICATION = 100; + + // Signal to enable the carried position detector for device. No payload. + ENABLE_DETECTOR = 101; + + // Signal to disable the carried position detector for device. No payload. + DISABLE_DETECTOR = 102; + + // Signal to request most recent carried position detector state. No payload. + REQUEST_UPDATE = 103; + + // Signal to force carried position detector to refresh state. No payload. + FORCE_UPDATE = 104; + + // Configure the detector with desired parameters. ConfigureDetector payload. + CONFIGURE_DETECTOR = 105; + + // Position Detection related message start from 200. + // Signal while carried position of device detected. + // It contains PositionDetected payload. + POSITION_DETECTED = 200; +} + +// Notification Type. +enum NotificationType { + // Explicitly prevents 0 from being used as a valid notification type. + // Doing so protects from obscure bugs caused by default-initialized values. + INVALID_NOTIFICATION = 0; + + // Notification of enabling the carried position detector for device. + ENABLE_NOTIFICATION = 1; + + // Notification of disabling the carried position detector for device. + DISABLE_NOTIFICATION = 2; + + // Notification of request update from the carried position detector. + REQUEST_UPDATE_NOTIFICATION = 3; + + // Notification of force update from the carried position detector. + FORCE_UPDATE_NOTIFICATION = 4; + + // Notification of configure message. + CONFIGURE_NOTIFICATION = 5; +} + +// This message type used for host to acknowledge the notification. +message AckNotification { + // Sent a notification type for host to acknowledge. + NotificationType notification_type = 1; +} + +// Position type. +enum PositionType { + // Explicitly prevents 0 from being used as a valid carried position type. + // Doing so protects from obscure bugs caused by default-initialized values. + UNKNOWN = 0; + + // Carried position while device is in motion. + IN_MOTION = 1; + + // Carried position while device is on table and faces up. + ON_TABLE_FACE_UP = 2; + + // Carried position while device is on table and faces down. + ON_TABLE_FACE_DOWN = 3; + + // Carried position while device is stationary in unknown orientation. + STATIONARY_UNKNOWN = 4; +} + +// This message type used to notify host a position was a detected. +message PositionDetected { + // Sent a position type that is defined in PositionTypes. + PositionType position_type = 1; +} + +// Predefined configurations for detector. +enum ConfigPresetType { + // Explicitly prevents 0 from being used as a valid type. + // Doing so protects from obscure bugs caused by default-initialized values. + CONFIG_PRESET_UNSPECIFIED = 0; + + // Default preset. + CONFIG_PRESET_DEFAULT = 1; + + // Preset for sticky-stationary behavior. + CONFIG_PRESET_STICKY_STATIONARY = 2; +} + +message ConfigureDetector { + // Ref: cs/location/lbs/contexthub/nanoapps/motiondetector/motion_detector.h + message ConfigData { + // These algo parameters are exposed to enable tuning via server flags. + // The amount of time that the algorithm's computed stillness confidence + // must exceed still_confidence_threshold before entering the stationary + // state. Increasing this value will make the algorithm take longer to + // transition from the in motion state to the stationary state. + uint64 still_time_threshold_nanosecond = 1; + + // The amount of time in which the variance should be averaged. Increasing + // this value will effectively smooth the input data, making the algorithm + // less likely to transition between states. + uint32 window_width_nanosecond = 2; + + // The required confidence that the device is in motion before entering the + // motion state. Valid range is [0.0, 1.0], where 1.0 indicates that the + // algorithm must be 100% certain that the device is moving before entering + // the motion state. If the Instant Motion sensor is triggered, this value + // is ignored and the algorithm is immediately transitioned into the in + // motion state. + float motion_confidence_threshold = 3; + + // The required confidence that the device is stationary before entering the + // stationary state. Valid range is [0.0, 1.0], where 1.0 indicates that the + // algorithm must be 100% certain that the device is stationary before + // entering the stationary state. + float still_confidence_threshold = 4; + + // The variance threshold for the StillnessDetector algorithm. Increasing + // this value causes the algorithm to be less likely to detect motion. + float var_threshold = 5; + + // The variance threshold delta for the StillnessDetector algorithm about + // which the stationary confidence is calculated. Valid range is + // [0.0, var_threshold]. + float var_threshold_delta = 6; + } + + oneof type { + ConfigPresetType preset_type = 1; + ConfigData config_data = 2; + } +} diff --git a/vibrator/cs40l26/tests/Android.bp b/vibrator/cs40l26/tests/Android.bp index 93c9a9f..c53ec23 100644 --- a/vibrator/cs40l26/tests/Android.bp +++ b/vibrator/cs40l26/tests/Android.bp @@ -18,8 +18,8 @@ package { } cc_test { - name: "VibratorHalCs40l26TestSuite", - defaults: ["VibratorHalCs40l26TestDefaults"], + name: "VibratorHalCs40l26TestSuitePrivateLynx", + defaults: ["VibratorHalCs40l26TestDefaultsPrivateLynx"], srcs: [ "test-hwcal.cpp", "test-hwapi.cpp", diff --git a/vibrator/cs40l26/tests/mocks.h b/vibrator/cs40l26/tests/mocks.h index 21466a0..5ba0270 100644 --- a/vibrator/cs40l26/tests/mocks.h +++ b/vibrator/cs40l26/tests/mocks.h @@ -34,6 +34,11 @@ class MockApi : public ::aidl::android::hardware::vibrator::Vibrator::HwApi { MOCK_METHOD1(setF0CompEnable, bool(bool value)); MOCK_METHOD1(setRedcCompEnable, bool(bool value)); MOCK_METHOD1(setMinOnOffInterval, bool(uint32_t value)); + MOCK_METHOD0(getContextScale, uint32_t()); + MOCK_METHOD0(getContextEnable, bool()); + MOCK_METHOD0(getContextSettlingTime, uint32_t()); + MOCK_METHOD0(getContextCooldownTime, uint32_t()); + MOCK_METHOD0(getContextFadeEnable, bool()); MOCK_METHOD2(setFFGain, bool(int fd, uint16_t value)); MOCK_METHOD3(setFFEffect, bool(int fd, struct ff_effect *effect, uint16_t timeoutMs)); MOCK_METHOD3(setFFPlay, bool(int fd, int8_t index, bool value)); diff --git a/vibrator/cs40l26/tests/test-vibrator.cpp b/vibrator/cs40l26/tests/test-vibrator.cpp index a8bedd5..603ef5e 100644 --- a/vibrator/cs40l26/tests/test-vibrator.cpp +++ b/vibrator/cs40l26/tests/test-vibrator.cpp @@ -284,6 +284,11 @@ class VibratorTest : public Test { EXPECT_CALL(*mMockApi, setFFEffect(_, _, _)).Times(times); EXPECT_CALL(*mMockApi, setFFPlay(_, _, _)).Times(times); EXPECT_CALL(*mMockApi, setMinOnOffInterval(_)).Times(times); + EXPECT_CALL(*mMockApi, getContextScale()).Times(times); + EXPECT_CALL(*mMockApi, getContextEnable()).Times(times); + EXPECT_CALL(*mMockApi, getContextSettlingTime()).Times(times); + EXPECT_CALL(*mMockApi, getContextCooldownTime()).Times(times); + EXPECT_CALL(*mMockApi, getContextFadeEnable()).Times(times); EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).Times(times); EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, _, _, _)).Times(times); @@ -363,6 +368,11 @@ TEST_F(VibratorTest, Constructor) { .WillOnce(DoAll(SetArgPointee<0>(supportedPrimitivesBits), Return(true))); EXPECT_CALL(*mMockApi, setMinOnOffInterval(MIN_ON_OFF_INTERVAL_US)).WillOnce(Return(true)); + EXPECT_CALL(*mMockApi, getContextScale()).WillOnce(Return(0)); + EXPECT_CALL(*mMockApi, getContextEnable()).WillOnce(Return(false)); + EXPECT_CALL(*mMockApi, getContextSettlingTime()).WillOnce(Return(0)); + EXPECT_CALL(*mMockApi, getContextCooldownTime()).WillOnce(Return(0)); + EXPECT_CALL(*mMockApi, getContextFadeEnable()).WillOnce(Return(false)); createVibrator(std::move(mockapi), std::move(mockcal), false); } From e21617d6177338c486db2ef2125c53cd9d32ee0e Mon Sep 17 00:00:00 2001 From: David Chao Date: Mon, 14 Nov 2022 16:27:43 +0800 Subject: [PATCH 096/124] thermal: update thermal config Based on EVT1.0 and SpeedTest results to update thermal formula v0.7-1117, Also add: - CPU/GPU power budget = CPU/GPU default power budget - MODEM power * 0.3 - Start throttle charging at 25C. Bug: 257243663 Test: ThermalHAL throttling worked properly Change-Id: I7c887fd27b776a0be36cddd7f84dcc5b4a736e57 --- thermal_info_config_charge_lynx.json | 46 ++++++++--------- thermal_info_config_lynx.json | 76 ++++++++++++++-------------- 2 files changed, 59 insertions(+), 63 deletions(-) diff --git a/thermal_info_config_charge_lynx.json b/thermal_info_config_charge_lynx.json index edcd76d..c1c3240 100644 --- a/thermal_info_config_charge_lynx.json +++ b/thermal_info_config_charge_lynx.json @@ -62,53 +62,47 @@ "Multiplier":0.001 }, { - "Name":"VIRTUAL-NEU-QUT-DISP-GNSS-BATT", + "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["neutral_therm", "quiet_therm", "disp_therm", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.28, 0.42, 0.1, 0.1, 0.1], + "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"], + "Coefficient":[0.05, 0.05, 0.7, 0.05, 0.05, 0.05, 0.05], + "Offset":-1500, "Multiplier":0.001 }, { - "Name":"VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", + "Name":"VIRTUAL-QUT-SKIN2-USB-USB2-2", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["neutral_therm", "disp_therm", "skin_therm1", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.27, 0.23, 0.1, 0.27, 0.13], + "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2"], + "Coefficient":[0.15, 0.15, 0.15, 0.55], + "Offset":-1000, "Multiplier":0.001 }, { - "Name":"VIRTUAL-SKIN2-USB2-DISP-BATT", + "Name":"VIRTUAL-QUT-SKIN2-USB-GNSS-3", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm", "battery"], - "Coefficient":[0.28, 0.21, 0.3, 0.21], + "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "gnss_tcxo_therm"], + "Coefficient":[0.166, 0.45, 0.217, 0.167], + "Offset":-1950, "Multiplier":0.001 }, { - "Name":"VIRTUAL-QUT-SKIN2-USB2-DISP", + "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm2", "disp_therm"], - "Coefficient":[0.35, 0.25, 0.2, 0.2], - "Multiplier":0.001 - }, - { - "Name":"VIRTUAL-SKIN2-USB2-DISP", - "Type":"UNKNOWN", - "Hidden":true, - "VirtualSensor":true, - "Formula":"WEIGHTED_AVG", - "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm"], - "Coefficient":[0.42, 0.29, 0.29], + "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"], + "Coefficient":[-0.05, -0.05, 1.3, -0.05, -0.05, -0.05, -0.05], + "Offset":-1950, "Multiplier":0.001 }, { @@ -118,9 +112,9 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP", "VIRTUAL-SKIN2-USB2-DISP"], - "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0], - "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], + "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], + "HotThreshold":["NAN", 25.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, "PollingDelay":300000, @@ -148,7 +142,7 @@ "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1], "MaxReleaseStep": 1, "MaxThrottleStep": 1, - "CdevCeiling": [0, 9, 10, 11, 12, 12, 12], + "CdevCeiling": [0, 11, 11, 11, 12, 12, 12], "LimitInfo": [0, 0, 0, 0, 0, 12, 12] } ] diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index 5ef123b..ea2cefd 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -36,7 +36,7 @@ { "Name":"skin_therm1", "Type":"UNKNOWN", - "HotThreshold":["NAN", 29.9, "NAN", "NAN", "NAN", "NAN", "NAN"], + "HotThreshold":["NAN", 27.9, "NAN", "NAN", "NAN", "NAN", "NAN"], "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0], "TempPath":"/dev/thermal/tz-by-name/skin_therm1/tz_temp", "Multiplier":0.001, @@ -62,64 +62,58 @@ "Multiplier":0.001 }, { - "Name":"VIRTUAL-NEU-QUT-DISP-GNSS-BATT", + "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["neutral_therm", "quiet_therm", "disp_therm", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.28, 0.42, 0.1, 0.1, 0.1], + "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"], + "Coefficient":[0.05, 0.05, 0.7, 0.05, 0.05, 0.05, 0.05], + "Offset":-1500, "Multiplier":0.001 }, { - "Name":"VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", + "Name":"VIRTUAL-QUT-SKIN2-USB-USB2-2", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["neutral_therm", "disp_therm", "skin_therm1", "gnss_tcxo_therm", "battery"], - "Coefficient":[0.27, 0.23, 0.1, 0.27, 0.13], + "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2"], + "Coefficient":[0.15, 0.15, 0.15, 0.55], + "Offset":-1000, "Multiplier":0.001 }, { - "Name":"VIRTUAL-SKIN2-USB2-DISP-BATT", + "Name":"VIRTUAL-QUT-SKIN2-USB-GNSS-3", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm", "battery"], - "Coefficient":[0.28, 0.21, 0.3, 0.21], + "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "gnss_tcxo_therm"], + "Coefficient":[0.166, 0.45, 0.217, 0.167], + "Offset":-1950, "Multiplier":0.001 }, { - "Name":"VIRTUAL-QUT-SKIN2-USB2-DISP", + "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, "Formula":"WEIGHTED_AVG", - "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm2", "disp_therm"], - "Coefficient":[0.35, 0.25, 0.2, 0.2], - "Multiplier":0.001 - }, - { - "Name":"VIRTUAL-SKIN2-USB2-DISP", - "Type":"UNKNOWN", - "Hidden":true, - "VirtualSensor":true, - "Formula":"WEIGHTED_AVG", - "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm"], - "Coefficient":[0.42, 0.29, 0.29], + "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"], + "Coefficient":[-0.05, -0.05, 1.3, -0.05, -0.05, -0.05, -0.05], + "Offset":-1950, "Multiplier":0.001 }, { "Name":"VIRTUAL-SKIN", "Type":"SKIN", - "Version":"0.6", + "Version":"0.7", "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP", "VIRTUAL-SKIN2-USB2-DISP"], - "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0], + "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", 39.0, 43.0, 45.0, 47.0, 52.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, @@ -139,8 +133,8 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP", "VIRTUAL-SKIN2-USB2-DISP"], - "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0], + "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", 37.0, 43.0, 45.0, 47.0, 52.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, @@ -155,8 +149,8 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP", "VIRTUAL-SKIN2-USB2-DISP"], - "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0], + "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", 37.0, 39.0, 41.0, 47.0, 52.0, 55.0], "HotHysteresis":[0.0, 0.9, 0.9, 0.9, 1.9, 1.9, 1.9], "Multiplier":0.001, @@ -174,6 +168,12 @@ "I_Cutoff":["NAN", "NAN", 0, 2, "NAN", "NAN", "NAN"], "TranCycle": 5 }, + "ExcludedPowerInfo": [ + { + "PowerRail": "VSYS_PWR_MODEM", + "PowerWeight": [0.3, 0.3, 0.3, 0.3, 0.3, 0.3, 0.3] + } + ], "BindedCdevInfo": [ { "CdevRequest": "thermal-cpufreq-0", @@ -219,9 +219,9 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP", "VIRTUAL-SKIN2-USB2-DISP"], - "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0], - "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], + "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], + "HotThreshold":["NAN", 25.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, "PollingDelay":300000, @@ -249,7 +249,7 @@ "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1], "MaxReleaseStep": 1, "MaxThrottleStep": 1, - "CdevCeiling": [0, 9, 10, 11, 12, 12, 12], + "CdevCeiling": [0, 11, 11, 11, 12, 12, 12], "LimitInfo": [0, 0, 0, 0, 0, 12, 12] } ] @@ -301,8 +301,8 @@ "VirtualSensor":true, "TriggerSensor":"skin_therm1", "Formula":"MAXIMUM", - "Combination":["VIRTUAL-NEU-QUT-DISP-GNSS-BATT", "VIRTUAL-NEU-DISP-SKIN1-GNSS-BATT", "VIRTUAL-SKIN2-USB2-DISP-BATT", "VIRTUAL-QUT-SKIN2-USB2-DISP", "VIRTUAL-SKIN2-USB2-DISP"], - "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0], + "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 54.0, "NAN"], "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0], "Multiplier":0.001, @@ -763,7 +763,9 @@ "Name":"VSYS_PWR_DISPLAY" }, { - "Name":"VSYS_PWR_MODEM" + "Name":"VSYS_PWR_MODEM", + "PowerSampleDelay":7000, + "PowerSampleCount":1 }, { "Name":"S2M_VDD_CPUCL2", From 20a943777179add6194d0501d097d350b1604ae7 Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Thu, 17 Nov 2022 14:43:17 +0800 Subject: [PATCH 097/124] audio: enable gapless offload flag Enable gapless support on compressed_offload w/o trimming delay and padding. Bug: 259490645 Test: manual Change-Id: I8b1a9281d2de9c46322cbe12f9e51b9f70adecae Signed-off-by: Yung Ti Su --- audio/lynx/config/audio_policy_configuration.xml | 2 +- .../audio_policy_configuration_a2dp_offload_disabled.xml | 2 +- .../config/audio_policy_configuration_bluetooth_legacy_hal.xml | 2 +- .../config/audio_policy_configuration_le_offload_disabled.xml | 2 +- audio/lynx/config/mixer_paths.xml | 3 +++ 5 files changed, 7 insertions(+), 4 deletions(-) diff --git a/audio/lynx/config/audio_policy_configuration.xml b/audio/lynx/config/audio_policy_configuration.xml index 69f334e..1418903 100644 --- a/audio/lynx/config/audio_policy_configuration.xml +++ b/audio/lynx/config/audio_policy_configuration.xml @@ -37,7 +37,7 @@ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/> + flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD"> diff --git a/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml b/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml index dc916ea..8253dcc 100644 --- a/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml +++ b/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml @@ -37,7 +37,7 @@ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/> + flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD"> diff --git a/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml b/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml index 484048f..a44a6c5 100644 --- a/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml +++ b/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml @@ -37,7 +37,7 @@ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/> + flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD"> diff --git a/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml b/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml index 573098e..4d28b12 100644 --- a/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml +++ b/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml @@ -37,7 +37,7 @@ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/> + flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD"> diff --git a/audio/lynx/config/mixer_paths.xml b/audio/lynx/config/mixer_paths.xml index e7b6a9d..a8b71fb 100644 --- a/audio/lynx/config/mixer_paths.xml +++ b/audio/lynx/config/mixer_paths.xml @@ -30,6 +30,9 @@ + + + From cc64b0221377401496a1ca5e3c6403dc7bf85bcb Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Mon, 21 Nov 2022 12:03:18 +0800 Subject: [PATCH 098/124] audio: Phase in fortemedia tuning tables Change List : Fortemedia: Handset : Optimize AMS performance Generic/TMO Optimize TX/RX performance for Orange Sync TX setting to HAC / TMO-HAC / SWB Reserve 2 HAC Handheld : Optimize AMS performance Optimize TX/RX performance for Orange Sync TX setting to - Condor-Headphone/ TTY-VCO / BT-HAC (NB/WB) - Condor-Headphone SWB / TTY-VCO SWB / Condor-Headphone Reserve2 SWB / TTY-VCO Reserve2 / Reserve2 SWB / BT-HAC SWB / BT-HAC Reserve2 SWB Sync RX setting to - TTY-HCO (NB/WB) - TTY-HCO SWB / TTY-HCO Reserve2 SWB / Reserve2 SWB Files from the latest attachment on b/259870425 Bug: 259870425 Test: verified by ntkuo@ Change-Id: Ib7a145ce75aa10699e96457a3c345e18d1bff103 --- audio/lynx/tuning/fortemedia/BLUETOOTH.dat | Bin 276978 -> 276978 bytes audio/lynx/tuning/fortemedia/BLUETOOTH.mods | 24 +- audio/lynx/tuning/fortemedia/HANDSET.dat | Bin 255674 -> 255674 bytes audio/lynx/tuning/fortemedia/HANDSET.mods | 398 +- audio/lynx/tuning/fortemedia/HANDSFREE.dat | Bin 117198 -> 117198 bytes audio/lynx/tuning/fortemedia/HANDSFREE.mods | 115948 ++++++++++++++--- audio/lynx/tuning/fortemedia/HEADSET.dat | Bin 426106 -> 426106 bytes audio/lynx/tuning/fortemedia/HEADSET.mods | 62 +- 8 files changed, 96931 insertions(+), 19501 deletions(-) diff --git a/audio/lynx/tuning/fortemedia/BLUETOOTH.dat b/audio/lynx/tuning/fortemedia/BLUETOOTH.dat index 49e6ad3fffe3ec7cdc937e30fd2e1da27f6bf013..a1ed9e6654b49cc3c02858bc2c2f99d28bd5c450 100644 GIT binary patch delta 101 zcmezLS>V%Wfemhaj53?u`DSbKmNB(3GcdF=A7E%>=Ggq+yjz7YAjX*~EyRVXEWwqj sqha%b^?3@D_i6G>&k|ta+00kF#0X7A^MUp42i7wJG1K+~>zR$Z01U?@z5oCK delta 101 zcmezLS>V%Wfemhaj0~II`DSbK<}kG|GcdF=A7E%>=Gy$;yjz7YCdQd5FUEzbF2j{+ tLdWI<>+=*Q@6+U&o+ZG-vzf1Ui4mHL<^${753FYdVy5i})-xM*0RR(gB@zGt diff --git a/audio/lynx/tuning/fortemedia/BLUETOOTH.mods b/audio/lynx/tuning/fortemedia/BLUETOOTH.mods index f4ac386..0121113 100644 --- a/audio/lynx/tuning/fortemedia/BLUETOOTH.mods +++ b/audio/lynx/tuning/fortemedia/BLUETOOTH.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG BLUETOOTH #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-10-28 11:56:59 +#SAVE_TIME 2022-11-21 11:32:52 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB #PARAM_MODE FULL @@ -908,7 +908,7 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x0200 //TX_MICMUTE_AMP_THR +900 0x021C //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0006 //TX_MICMUTE_CVG_TIME @@ -3578,10 +3578,10 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x026C //TX_MICMUTE_AMP_THR +900 0x0276 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME +903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 @@ -5927,10 +5927,10 @@ 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5C6E //TX_FDEQ_GAIN_13 -581 0x687E //TX_FDEQ_GAIN_14 -582 0x8890 //TX_FDEQ_GAIN_15 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -11267,10 +11267,10 @@ 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5C6E //TX_FDEQ_GAIN_13 -581 0x687E //TX_FDEQ_GAIN_14 -582 0x8890 //TX_FDEQ_GAIN_15 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 diff --git a/audio/lynx/tuning/fortemedia/HANDSET.dat b/audio/lynx/tuning/fortemedia/HANDSET.dat index 56923af46530349d072607bb1cec603a35c92d30..41de9d44609612609cf1d357737dd6d6ea339239 100644 GIT binary patch delta 1270 zcmdmWmVeh-{tZriW(v&B%tA~p%nS^z%m*0Sm^m2Qfw+U2fv*!N*2S#B(9Qg~9F&a$fvo+W(C8WVP{TDwHZ}Pe+4wL0<6*gN*oRAlS+3~-=kNHS_KhQpGcI2#J z@?$b6oqVC&Yx5(EhfKV78Vyk%nhi}kS`G82Ouk?(&bh*{p{U5HA){gQ2kU4?dJdB?xezfm`9Y!|Q;*GNgQTV)8pi#;ty?t6h|-|@dm!3~@k9Fp4#w>ZIGB!= z(!?X%fr*%1lXOpPXIsfMLz(=jnQV|0wtUqkCg1H=l}tLUH1pdLsp;=CnYow8IWTi> zf47Lq0+M<_`JCuH2=Z&C)OMgb?>VODonbPd%-h?6-Y$eVYx=4(Mv?7SZ<%T}x2x}E Lmgl709bm>Kvwfnr_E8Vudc40%1w z|Lc3187lgiZxrGJhV!JGZ~Ygi}G zo9HlE&Q@Wwl#mAFie0$)S;W6vx3Qw z=}!IR3*BCuA6YzP;&sqy2=mZvsLRl5nAJD=g0(p362pd~BBO?kj?EveqZ#ojnEb)| z-Q+a8T!LyKF1978&TC)7WIJ14Lh2Y}C*QZpA*gB!Ayu0dT%*LdpYms_QJB0>lV|#> zGDeZ@R&SYj_%|!{OwgcFgznqAMT5kc3c9~XWBa=hrY+3dy?7Zl7~5a*Fm8Xv!&Fm9 zbvJGYCOURa(%iS5Z6(tTWl%u!uq|J8iOF|!+j<>VnmFx<)b#h6%-qZ49GE#bTivu^ xCEcZ!Qrm$>yyw`yi-|FWbviIuUu*|Dx)5SAJQ37tZdc#SEYAt?7Dz>g6aW&LU$_7O diff --git a/audio/lynx/tuning/fortemedia/HANDSET.mods b/audio/lynx/tuning/fortemedia/HANDSET.mods index ed7455b..b6cebe1 100644 --- a/audio/lynx/tuning/fortemedia/HANDSET.mods +++ b/audio/lynx/tuning/fortemedia/HANDSET.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-11-02 16:49:10 +#SAVE_TIME 2022-11-21 11:47:52 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB #PARAM_MODE FULL @@ -907,20 +907,20 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0410 //TX_MICMUTE_RATIO_THR +899 0x0320 //TX_MICMUTE_RATIO_THR 900 0x0212 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME +903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x6E00 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x72D8 //TX_DTD_THR1_MICMUTE_0 -912 0x72D8 //TX_DTD_THR1_MICMUTE_1 +911 0x7B0C //TX_DTD_THR1_MICMUTE_0 +912 0x7EB8 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -930,10 +930,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x00B0 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -952,8 +952,8 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0xE4A8 //TX_AMS_RESRV_02 -945 0x7F58 //TX_AMS_RESRV_03 +944 0x36B0 //TX_AMS_RESRV_02 +945 0x7F26 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -1324,7 +1324,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0015 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -1423,7 +1423,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0025 //RX_SPK_VOL +129 0x0023 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -1522,7 +1522,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL +129 0x003A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -3586,11 +3586,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FC6 //TX_DTD_THR1_MICMUTE_0 -912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FC4 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -3600,10 +3600,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0100 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -3623,7 +3623,7 @@ 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 944 0xFFFF //TX_AMS_RESRV_02 -945 0x7FDC //TX_AMS_RESRV_03 +945 0x7530 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -3824,18 +3824,18 @@ 124 0x03AD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x485A //RX_FDEQ_GAIN_2 +42 0x6C82 //RX_FDEQ_GAIN_3 +43 0x949E //RX_FDEQ_GAIN_4 44 0x9C96 //RX_FDEQ_GAIN_5 45 0x908E //RX_FDEQ_GAIN_6 46 0x9296 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0xA4B0 //RX_FDEQ_GAIN_9 -49 0xA498 //RX_FDEQ_GAIN_10 +49 0xA898 //RX_FDEQ_GAIN_10 50 0x7272 //RX_FDEQ_GAIN_11 -51 0x8868 //RX_FDEQ_GAIN_12 +51 0x8068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -3923,18 +3923,18 @@ 124 0x03AD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x485A //RX_FDEQ_GAIN_2 +42 0x6C82 //RX_FDEQ_GAIN_3 +43 0x949E //RX_FDEQ_GAIN_4 44 0x9C96 //RX_FDEQ_GAIN_5 45 0x908E //RX_FDEQ_GAIN_6 46 0x9296 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0xA4B0 //RX_FDEQ_GAIN_9 -49 0xA498 //RX_FDEQ_GAIN_10 +49 0xA898 //RX_FDEQ_GAIN_10 50 0x7272 //RX_FDEQ_GAIN_11 -51 0x8868 //RX_FDEQ_GAIN_12 +51 0x8068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4022,18 +4022,18 @@ 124 0x03AD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x485A //RX_FDEQ_GAIN_2 +42 0x6C82 //RX_FDEQ_GAIN_3 +43 0x949E //RX_FDEQ_GAIN_4 44 0x9C96 //RX_FDEQ_GAIN_5 45 0x908E //RX_FDEQ_GAIN_6 46 0x9296 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0xA4B0 //RX_FDEQ_GAIN_9 -49 0xA498 //RX_FDEQ_GAIN_10 +49 0xA898 //RX_FDEQ_GAIN_10 50 0x7272 //RX_FDEQ_GAIN_11 -51 0x8868 //RX_FDEQ_GAIN_12 +51 0x8068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4093,7 +4093,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0025 //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4121,18 +4121,18 @@ 124 0x03AD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x485A //RX_FDEQ_GAIN_2 +42 0x6C82 //RX_FDEQ_GAIN_3 +43 0x949E //RX_FDEQ_GAIN_4 44 0x9C96 //RX_FDEQ_GAIN_5 45 0x908E //RX_FDEQ_GAIN_6 46 0x9296 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0xA4B0 //RX_FDEQ_GAIN_9 -49 0xA498 //RX_FDEQ_GAIN_10 +49 0xA898 //RX_FDEQ_GAIN_10 50 0x7272 //RX_FDEQ_GAIN_11 -51 0x8868 //RX_FDEQ_GAIN_12 +51 0x8068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4192,7 +4192,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003E //RX_SPK_VOL +129 0x0040 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4220,18 +4220,18 @@ 124 0x03AD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x485A //RX_FDEQ_GAIN_2 +42 0x6C82 //RX_FDEQ_GAIN_3 +43 0x949E //RX_FDEQ_GAIN_4 44 0x9C96 //RX_FDEQ_GAIN_5 45 0x908E //RX_FDEQ_GAIN_6 46 0x9296 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0xA4B0 //RX_FDEQ_GAIN_9 -49 0xA498 //RX_FDEQ_GAIN_10 +49 0xA898 //RX_FDEQ_GAIN_10 50 0x7272 //RX_FDEQ_GAIN_11 -51 0x8868 //RX_FDEQ_GAIN_12 +51 0x8068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4291,7 +4291,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005D //RX_SPK_VOL +129 0x0062 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4319,18 +4319,18 @@ 124 0x03AD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x485A //RX_FDEQ_GAIN_2 +42 0x6C82 //RX_FDEQ_GAIN_3 +43 0x949E //RX_FDEQ_GAIN_4 44 0x9C96 //RX_FDEQ_GAIN_5 45 0x908E //RX_FDEQ_GAIN_6 46 0x9296 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0xA4B0 //RX_FDEQ_GAIN_9 -49 0xA498 //RX_FDEQ_GAIN_10 +49 0xA898 //RX_FDEQ_GAIN_10 50 0x7272 //RX_FDEQ_GAIN_11 -51 0x8868 //RX_FDEQ_GAIN_12 +51 0x8068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -4390,7 +4390,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0094 //RX_SPK_VOL +129 0x009C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4418,18 +4418,18 @@ 124 0x03AD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x3C3C //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4856 //RX_FDEQ_GAIN_2 -42 0x687E //RX_FDEQ_GAIN_3 -43 0x8E9A //RX_FDEQ_GAIN_4 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x485A //RX_FDEQ_GAIN_2 +42 0x6C82 //RX_FDEQ_GAIN_3 +43 0x949E //RX_FDEQ_GAIN_4 44 0x9C96 //RX_FDEQ_GAIN_5 45 0x908E //RX_FDEQ_GAIN_6 46 0x9296 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0xA4B0 //RX_FDEQ_GAIN_9 -49 0xA498 //RX_FDEQ_GAIN_10 +49 0xA898 //RX_FDEQ_GAIN_10 50 0x7272 //RX_FDEQ_GAIN_11 -51 0x8868 //RX_FDEQ_GAIN_12 +51 0x8068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -5927,9 +5927,9 @@ 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4A49 //TX_FDEQ_GAIN_10 578 0x4642 //TX_FDEQ_GAIN_11 -579 0x4432 //TX_FDEQ_GAIN_12 -580 0x4040 //TX_FDEQ_GAIN_13 -581 0x3C54 //TX_FDEQ_GAIN_14 +579 0x382C //TX_FDEQ_GAIN_12 +580 0x3830 //TX_FDEQ_GAIN_13 +581 0x3054 //TX_FDEQ_GAIN_14 582 0x5270 //TX_FDEQ_GAIN_15 583 0x4858 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 @@ -6256,11 +6256,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7000 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FE4 //TX_DTD_THR1_MICMUTE_0 -912 0x7BD4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FE2 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -6270,9 +6270,9 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K +922 0x0FA0 //TX_MICMUTE_DT_CUT_K 923 0x0100 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT @@ -6292,7 +6292,7 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0x3800 //TX_AMS_RESRV_02 +944 0x3C8C //TX_AMS_RESRV_02 945 0x7FFF //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 @@ -11587,20 +11587,20 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0410 //TX_MICMUTE_RATIO_THR +899 0x0320 //TX_MICMUTE_RATIO_THR 900 0x0212 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME +903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x6E00 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x72D8 //TX_DTD_THR1_MICMUTE_0 -912 0x72D8 //TX_DTD_THR1_MICMUTE_1 +911 0x7B0C //TX_DTD_THR1_MICMUTE_0 +912 0x7EB8 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -11610,10 +11610,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x00B0 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -11632,8 +11632,8 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0xE4A8 //TX_AMS_RESRV_02 -945 0x7F58 //TX_AMS_RESRV_03 +944 0x36B0 //TX_AMS_RESRV_02 +945 0x7F26 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -14266,11 +14266,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FC6 //TX_DTD_THR1_MICMUTE_0 -912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FC4 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -14280,10 +14280,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0100 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -14303,7 +14303,7 @@ 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 944 0xFFFF //TX_AMS_RESRV_02 -945 0x7FDC //TX_AMS_RESRV_03 +945 0x7530 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -16936,11 +16936,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7000 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FE4 //TX_DTD_THR1_MICMUTE_0 -912 0x7BD4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FE2 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -16950,9 +16950,9 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K +922 0x0FA0 //TX_MICMUTE_DT_CUT_K 923 0x0100 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT @@ -16972,7 +16972,7 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0x3800 //TX_AMS_RESRV_02 +944 0x3C8C //TX_AMS_RESRV_02 945 0x7FFF //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 @@ -40957,20 +40957,20 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0410 //TX_MICMUTE_RATIO_THR +899 0x0320 //TX_MICMUTE_RATIO_THR 900 0x0212 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME +903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x6E00 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x72D8 //TX_DTD_THR1_MICMUTE_0 -912 0x72D8 //TX_DTD_THR1_MICMUTE_1 +911 0x7B0C //TX_DTD_THR1_MICMUTE_0 +912 0x7EB8 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -40980,10 +40980,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x00B0 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -41002,8 +41002,8 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0xE4A8 //TX_AMS_RESRV_02 -945 0x7F58 //TX_AMS_RESRV_03 +944 0x36B0 //TX_AMS_RESRV_02 +945 0x7F26 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -43636,11 +43636,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FC6 //TX_DTD_THR1_MICMUTE_0 -912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FC4 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -43650,10 +43650,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0100 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -43673,7 +43673,7 @@ 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 944 0xFFFF //TX_AMS_RESRV_02 -945 0x7FDC //TX_AMS_RESRV_03 +945 0x7530 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -45977,9 +45977,9 @@ 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4A49 //TX_FDEQ_GAIN_10 578 0x4642 //TX_FDEQ_GAIN_11 -579 0x4432 //TX_FDEQ_GAIN_12 -580 0x4040 //TX_FDEQ_GAIN_13 -581 0x3C54 //TX_FDEQ_GAIN_14 +579 0x382C //TX_FDEQ_GAIN_12 +580 0x3830 //TX_FDEQ_GAIN_13 +581 0x3054 //TX_FDEQ_GAIN_14 582 0x5270 //TX_FDEQ_GAIN_15 583 0x4858 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 @@ -46306,11 +46306,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7000 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FE4 //TX_DTD_THR1_MICMUTE_0 -912 0x7BD4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FE2 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -46320,9 +46320,9 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K +922 0x0FA0 //TX_MICMUTE_DT_CUT_K 923 0x0100 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT @@ -46342,7 +46342,7 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0x3800 //TX_AMS_RESRV_02 +944 0x3C8C //TX_AMS_RESRV_02 945 0x7FFF //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 @@ -51306,15 +51306,15 @@ 565 0x0000 //TX_PB_RESRV_1 566 0x0018 //TX_FDEQ_SUBNUM 567 0x6D61 //TX_FDEQ_GAIN_0 -568 0x594D //TX_FDEQ_GAIN_1 -569 0x4D4D //TX_FDEQ_GAIN_2 -570 0x4648 //TX_FDEQ_GAIN_3 -571 0x4242 //TX_FDEQ_GAIN_4 +568 0x5951 //TX_FDEQ_GAIN_1 +569 0x5151 //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4642 //TX_FDEQ_GAIN_4 572 0x4040 //TX_FDEQ_GAIN_5 -573 0x3E3E //TX_FDEQ_GAIN_6 -574 0x3431 //TX_FDEQ_GAIN_7 -575 0x2621 //TX_FDEQ_GAIN_8 -576 0x3338 //TX_FDEQ_GAIN_9 +573 0x4242 //TX_FDEQ_GAIN_6 +574 0x3835 //TX_FDEQ_GAIN_7 +575 0x2A25 //TX_FDEQ_GAIN_8 +576 0x373C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -51604,7 +51604,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0607 //TX_TDDRC_DRC_GAIN +866 0x05F5 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -51637,20 +51637,20 @@ 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2329 //TX_SENDFUNC_REG_MICMUTE 898 0x0010 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0410 //TX_MICMUTE_RATIO_THR +899 0x0320 //TX_MICMUTE_RATIO_THR 900 0x0212 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME +903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x6E00 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x72D8 //TX_DTD_THR1_MICMUTE_0 -912 0x72D8 //TX_DTD_THR1_MICMUTE_1 +911 0x7B0C //TX_DTD_THR1_MICMUTE_0 +912 0x7EB8 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -51660,10 +51660,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x00B0 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -51682,8 +51682,8 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0xE4A8 //TX_AMS_RESRV_02 -945 0x7F58 //TX_AMS_RESRV_03 +944 0x36B0 //TX_AMS_RESRV_02 +945 0x7F26 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -53982,13 +53982,13 @@ 571 0x473F //TX_FDEQ_GAIN_4 572 0x4245 //TX_FDEQ_GAIN_5 573 0x4B53 //TX_FDEQ_GAIN_6 -574 0x5246 //TX_FDEQ_GAIN_7 -575 0x3936 //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x3432 //TX_FDEQ_GAIN_10 -578 0x322F //TX_FDEQ_GAIN_11 -579 0x3434 //TX_FDEQ_GAIN_12 -580 0x3C48 //TX_FDEQ_GAIN_13 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3836 //TX_FDEQ_GAIN_10 +578 0x3633 //TX_FDEQ_GAIN_11 +579 0x3838 //TX_FDEQ_GAIN_12 +580 0x4048 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -54274,7 +54274,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -54316,11 +54316,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FC6 //TX_DTD_THR1_MICMUTE_0 -912 0x7EF4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FC4 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -54330,10 +54330,10 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +922 0x0FA0 //TX_MICMUTE_DT_CUT_K +923 0x0100 //TX_MICMUTE_DT_CUT_THR +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 +925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0100 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOL @@ -54353,7 +54353,7 @@ 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 944 0xFFFF //TX_AMS_RESRV_02 -945 0x7FDC //TX_AMS_RESRV_03 +945 0x7530 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -56645,24 +56645,24 @@ 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x584C //TX_FDEQ_GAIN_0 -568 0x4444 //TX_FDEQ_GAIN_1 -569 0x4444 //TX_FDEQ_GAIN_2 +567 0x5C50 //TX_FDEQ_GAIN_0 +568 0x4A47 //TX_FDEQ_GAIN_1 +569 0x4847 //TX_FDEQ_GAIN_2 570 0x4448 //TX_FDEQ_GAIN_3 571 0x4244 //TX_FDEQ_GAIN_4 -572 0x4044 //TX_FDEQ_GAIN_5 -573 0x4849 //TX_FDEQ_GAIN_6 -574 0x483C //TX_FDEQ_GAIN_7 -575 0x4040 //TX_FDEQ_GAIN_8 -576 0x4040 //TX_FDEQ_GAIN_9 -577 0x4040 //TX_FDEQ_GAIN_10 -578 0x463A //TX_FDEQ_GAIN_11 -579 0x4432 //TX_FDEQ_GAIN_12 -580 0x4028 //TX_FDEQ_GAIN_13 -581 0x3C3C //TX_FDEQ_GAIN_14 -582 0x3C3C //TX_FDEQ_GAIN_15 -583 0x3C3C //TX_FDEQ_GAIN_16 -584 0x3C3C //TX_FDEQ_GAIN_17 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5455 //TX_FDEQ_GAIN_6 +574 0x5844 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4642 //TX_FDEQ_GAIN_11 +579 0x382C //TX_FDEQ_GAIN_12 +580 0x3830 //TX_FDEQ_GAIN_13 +581 0x3054 //TX_FDEQ_GAIN_14 +582 0x5270 //TX_FDEQ_GAIN_15 +583 0x4858 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 @@ -56944,7 +56944,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05D3 //TX_TDDRC_DRC_GAIN +866 0x05F5 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -56986,11 +56986,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7000 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FE4 //TX_DTD_THR1_MICMUTE_0 -912 0x7BD4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FE2 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -57000,9 +57000,9 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K +922 0x0FA0 //TX_MICMUTE_DT_CUT_K 923 0x0100 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT @@ -57022,7 +57022,7 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0x3800 //TX_AMS_RESRV_02 +944 0x3C8C //TX_AMS_RESRV_02 945 0x7FFF //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 @@ -61997,9 +61997,9 @@ 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4A49 //TX_FDEQ_GAIN_10 578 0x4642 //TX_FDEQ_GAIN_11 -579 0x4432 //TX_FDEQ_GAIN_12 -580 0x4040 //TX_FDEQ_GAIN_13 -581 0x3C54 //TX_FDEQ_GAIN_14 +579 0x382C //TX_FDEQ_GAIN_12 +580 0x3830 //TX_FDEQ_GAIN_13 +581 0x3054 //TX_FDEQ_GAIN_14 582 0x5270 //TX_FDEQ_GAIN_15 583 0x4858 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 @@ -62326,11 +62326,11 @@ 905 0x0CD0 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x0028 //TX_MICMUTE_FRQ_AEC_L -908 0x7000 //TX_MICMUTE_EAD_THR +908 0x7FF6 //TX_MICMUTE_EAD_THR 909 0x3000 //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7800 //TX_MICMUTE_LAMBDA_RE_EST -911 0x7FE4 //TX_DTD_THR1_MICMUTE_0 -912 0x7BD4 //TX_DTD_THR1_MICMUTE_1 +911 0x7FE2 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x2000 //TX_DTD_THR2_MICMUTE_0 @@ -62340,9 +62340,9 @@ 919 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x2000 //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x7FFF //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K +922 0x0FA0 //TX_MICMUTE_DT_CUT_K 923 0x0100 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +924 0x0FA0 //TX_MICMUTE_DT_CUT_K2 925 0x0100 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT @@ -62362,7 +62362,7 @@ 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x05A0 //TX_AMS_RESRV_01 -944 0x3800 //TX_AMS_RESRV_02 +944 0x3C8C //TX_AMS_RESRV_02 945 0x7FFF //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 diff --git a/audio/lynx/tuning/fortemedia/HANDSFREE.dat b/audio/lynx/tuning/fortemedia/HANDSFREE.dat index 9833c947346d900bd185a133741998eef155c954..6fa37dbd3cf7aef0878cc1416e3f16b8008924bd 100644 GIT binary patch delta 144 zcmX>%nf=^k_6=@)j53?u`Mxu=1%>D}_y$crBm8f&lW+@^yZMZ86C<)zkQiL*ju@LF zZy8eyGXp~_^8to7W{%D8&AV0j0%Dw*(n4IA$`V|eIvO?~SpSWsxh`>gT_WQhcWjc| K%nf=^k_6=@)j0~II`Mxu6j+0AoZ(3s$mOb+&V^??eXgvXKV77F|{x=FtjosU}$6Jn6B-?@_W18OV$FZ>3p(G zJlpF&Gm3EX1;jWrrG>aKl_j_`bu?^W@P|<=7>nS4*6pWT8S|y4*Bxf!*=%*;DaUs6 zN+$E0Y(XJ<4ZcCs{{%Dtn_d*m+yWKY4iso&M3HR@L&)-kGnXBQxRaf6dzU=R6b)3@ zZU?%yTLp_l{;_U9=LGUYoB#{YcDr7d4MsRs)ksax0;$S!U>4yA*#gvN7t6}C{Z}Tl W0{?b3PnbaaI%C%D>x|jX_y7PEb8s^N delta 312 zcmey>AoZ(3s$mOb+&V^v?eXgvXKV82Ftso3p(G zJlpF&Gm3EX#l$!><;A!#)n&LcP3YLZ;18o#Fc!i8tlLkwGUiK7uRF}dv)SsxQ;zNC zl}zS0xA#RbvoKCC3TAGBGJl1@nN49Z=60?K=89twhp{tm?~-SkqJiqX?Lg;st6;JD zAM5sWP9R6e39#^Nx9eruV1!dujnwokkg6;PW)XgnEkJE{v8+7Xe`PW&@NZZ1gbB2- NGiKes&Y10t4*+)lX`KK7 diff --git a/audio/lynx/tuning/fortemedia/HEADSET.mods b/audio/lynx/tuning/fortemedia/HEADSET.mods index 084554a..0b4feaa 100644 --- a/audio/lynx/tuning/fortemedia/HEADSET.mods +++ b/audio/lynx/tuning/fortemedia/HEADSET.mods @@ -1,7 +1,7 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HEADSET #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-10-28 11:56:24 +#SAVE_TIME 2022-11-21 11:33:51 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_MODE FULL @@ -27608,7 +27608,7 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x0200 //TX_MICMUTE_AMP_THR +900 0x021C //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0006 //TX_MICMUTE_CVG_TIME @@ -30278,10 +30278,10 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x026C //TX_MICMUTE_AMP_THR +900 0x0276 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME +903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 @@ -32627,10 +32627,10 @@ 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5C6E //TX_FDEQ_GAIN_13 -581 0x687E //TX_FDEQ_GAIN_14 -582 0x8890 //TX_FDEQ_GAIN_15 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -37967,10 +37967,10 @@ 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5C6E //TX_FDEQ_GAIN_13 -581 0x687E //TX_FDEQ_GAIN_14 -582 0x8890 //TX_FDEQ_GAIN_15 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -54560,8 +54560,8 @@ 43 0x8E89 //RX_FDEQ_GAIN_4 44 0x7B71 //RX_FDEQ_GAIN_5 45 0x6655 //RX_FDEQ_GAIN_6 -46 0x544F //RX_FDEQ_GAIN_7 -47 0x4F4D //RX_FDEQ_GAIN_8 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 @@ -54659,8 +54659,8 @@ 43 0x8E89 //RX_FDEQ_GAIN_4 44 0x7B71 //RX_FDEQ_GAIN_5 45 0x6655 //RX_FDEQ_GAIN_6 -46 0x544F //RX_FDEQ_GAIN_7 -47 0x4F4D //RX_FDEQ_GAIN_8 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 @@ -54758,8 +54758,8 @@ 43 0x8E89 //RX_FDEQ_GAIN_4 44 0x7B71 //RX_FDEQ_GAIN_5 45 0x6655 //RX_FDEQ_GAIN_6 -46 0x544F //RX_FDEQ_GAIN_7 -47 0x4F4D //RX_FDEQ_GAIN_8 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 @@ -54857,8 +54857,8 @@ 43 0x8E89 //RX_FDEQ_GAIN_4 44 0x7B71 //RX_FDEQ_GAIN_5 45 0x6655 //RX_FDEQ_GAIN_6 -46 0x544F //RX_FDEQ_GAIN_7 -47 0x4F4D //RX_FDEQ_GAIN_8 +46 0x5452 //RX_FDEQ_GAIN_7 +47 0x524D //RX_FDEQ_GAIN_8 48 0x5A60 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 @@ -67658,7 +67658,7 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x0200 //TX_MICMUTE_AMP_THR +900 0x021C //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0006 //TX_MICMUTE_CVG_TIME @@ -70328,10 +70328,10 @@ 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x026C //TX_MICMUTE_AMP_THR +900 0x0276 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x000A //TX_MICMUTE_CVG_TIME +903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 @@ -72677,10 +72677,10 @@ 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5C6E //TX_FDEQ_GAIN_13 -581 0x687E //TX_FDEQ_GAIN_14 -582 0x8890 //TX_FDEQ_GAIN_15 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -78017,10 +78017,10 @@ 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5C6E //TX_FDEQ_GAIN_13 -581 0x687E //TX_FDEQ_GAIN_14 -582 0x8890 //TX_FDEQ_GAIN_15 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 From e57a5f03b58bc250c3d7cdf62d11898aba8ffd78 Mon Sep 17 00:00:00 2001 From: Rick Yiu Date: Thu, 17 Nov 2022 03:03:26 +0000 Subject: [PATCH 099/124] Change the default cpuset of camera daemon Changing cpuset itself takes time, so we should reduce the cpuset change as possible. Since all camera streaming mode change to the same cpuset value, we could make it default setting. Bug: 240889279 Test: build pass Change-Id: I11a865fa2eeeb67225d4b129497b1cd85237644f --- powerhint.json | 93 +++++--------------------------------------------- 1 file changed, 9 insertions(+), 84 deletions(-) diff --git a/powerhint.json b/powerhint.json index 9b9b658..7a0d0f7 100644 --- a/powerhint.json +++ b/powerhint.json @@ -225,8 +225,7 @@ "Path": "/dev/cpuset/camera-daemon-high-group/cpus", "Values": [ "0-3", - "6-7", - "0-7" + "6-7" ], "ResetOnInit": true }, @@ -235,8 +234,7 @@ "Path": "/dev/cpuset/camera-daemon-mid-group/cpus", "Values": [ "0-3", - "4-5", - "0-7" + "4-5" ], "ResetOnInit": true }, @@ -245,8 +243,7 @@ "Path": "/dev/cpuset/camera-daemon-mid-high-group/cpus", "Values": [ "0-3", - "4-7", - "0-7" + "4-7" ], "ResetOnInit": true }, @@ -716,18 +713,18 @@ "Duration": 1000, "Value": "612" }, - { - "PowerHint": "CAMERA_LAUNCH", - "Node": "CDCpuset", - "Duration": 1000, - "Value": "4-7" - }, { "PowerHint": "CAMERA_LAUNCH", "Node": "NPITaskPacking", "Duration": 1000, "Value": "0" }, + { + "PowerHint": "CAMERA_LAUNCH", + "Node": "CDCpuset", + "Duration": 1000, + "Value": "4-7" + }, { "PowerHint": "CAMERA_LAUNCH_EXTENDED", "Node": "CPUBigClusterMaxFreq", @@ -992,24 +989,6 @@ "Duration": 0, "Value": "0" }, - { - "PowerHint": "CAMERA_STREAMING_EXTREME", - "Node": "CDHighCpusetCpus", - "Duration": 0, - "Value": "6-7" - }, - { - "PowerHint": "CAMERA_STREAMING_EXTREME", - "Node": "CDMidCpusetCpus", - "Duration": 0, - "Value": "4-5" - }, - { - "PowerHint": "CAMERA_STREAMING_EXTREME", - "Node": "CDMidHighCpusetCpus", - "Duration": 0, - "Value": "4-7" - }, { "PowerHint": "CAMERA_STREAMING_EXTREME", "Node": "NPITaskPacking", @@ -1076,24 +1055,6 @@ "Duration": 0, "Value": "0" }, - { - "PowerHint": "CAMERA_STREAMING_HIGH", - "Node": "CDHighCpusetCpus", - "Duration": 0, - "Value": "6-7" - }, - { - "PowerHint": "CAMERA_STREAMING_HIGH", - "Node": "CDMidCpusetCpus", - "Duration": 0, - "Value": "4-5" - }, - { - "PowerHint": "CAMERA_STREAMING_HIGH", - "Node": "CDMidHighCpusetCpus", - "Duration": 0, - "Value": "4-7" - }, { "PowerHint": "CAMERA_STREAMING_HIGH", "Node": "NPITaskPacking", @@ -1148,24 +1109,6 @@ "Duration": 0, "Value": "20 10 80" }, - { - "PowerHint": "CAMERA_STREAMING_STANDARD", - "Node": "CDHighCpusetCpus", - "Duration": 0, - "Value": "6-7" - }, - { - "PowerHint": "CAMERA_STREAMING_STANDARD", - "Node": "CDMidCpusetCpus", - "Duration": 0, - "Value": "4-5" - }, - { - "PowerHint": "CAMERA_STREAMING_STANDARD", - "Node": "CDMidHighCpusetCpus", - "Duration": 0, - "Value": "4-7" - }, { "PowerHint": "CAMERA_STREAMING_STANDARD", "Node": "NPITaskPacking", @@ -1226,24 +1169,6 @@ "Duration": 0, "Value": "20 10 80" }, - { - "PowerHint": "CAMERA_STREAMING_LOW", - "Node": "CDHighCpusetCpus", - "Duration": 0, - "Value": "6-7" - }, - { - "PowerHint": "CAMERA_STREAMING_LOW", - "Node": "CDMidCpusetCpus", - "Duration": 0, - "Value": "4-5" - }, - { - "PowerHint": "CAMERA_STREAMING_LOW", - "Node": "CDMidHighCpusetCpus", - "Duration": 0, - "Value": "4-7" - }, { "PowerHint": "CAMERA_STREAMING_LOW", "Node": "NPITaskPacking", From bc0b6a7c013634a69f8fe978577b19e7bb7e2ef8 Mon Sep 17 00:00:00 2001 From: Robert Lee Date: Wed, 16 Nov 2022 14:30:21 +0800 Subject: [PATCH 100/124] audio: add new path for diag tools amp1 = Top speaker amp2 = Bottom speaker Bug: 215307768 Test: Builds Change-Id: Id285b89ac10d5e453b27a9bb1fa9fe8ef0a14fc6 Signed-off-by: Robert Lee --- audio/lynx/config/mixer_paths.xml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/audio/lynx/config/mixer_paths.xml b/audio/lynx/config/mixer_paths.xml index a8b71fb..45df0f8 100644 --- a/audio/lynx/config/mixer_paths.xml +++ b/audio/lynx/config/mixer_paths.xml @@ -676,6 +676,14 @@ + + + + + + + + From e8816c6b5877f306b50dafd6415ca3a87ece8cbc Mon Sep 17 00:00:00 2001 From: TeYuan Wang Date: Thu, 24 Nov 2022 18:06:05 +0800 Subject: [PATCH 101/124] thermal: increase GPU thermal power budget Bug: 260311882 Test: Test Burn8, MH_OFF, Genshin Change-Id: I7e0de89275e386446e01233619b54ebc071895ea --- thermal_info_config_lynx.json | 76 ++++++++++++++++++++++++++++++----- 1 file changed, 65 insertions(+), 11 deletions(-) diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index ea2cefd..bcc3557 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -143,7 +143,7 @@ "PassiveDelay":7000 }, { - "Name":"VIRTUAL-SKIN-CPU-GPU", + "Name":"VIRTUAL-SKIN-CPU", "Type":"UNKNOWN", "Hidden":true, "VirtualSensor":true, @@ -157,16 +157,15 @@ "PollingDelay":300000, "PassiveDelay":7000, "PIDInfo": { - "K_Po":["NAN", "NAN", 600, 500, "NAN", "NAN", "NAN"], - "K_Pu":["NAN", "NAN", 600, 500, "NAN", "NAN", "NAN"], - "K_I":["NAN", "NAN", 0, 5, "NAN", "NAN", "NAN"], - "K_D":["NAN", "NAN", 0, 0, "NAN", "NAN", "NAN"], - "I_Max":["NAN", "NAN", 0, 300, "NAN", "NAN", "NAN"], - "S_Power":["NAN", "NAN", 2000, 800, "NAN", "NAN", "NAN"], - "MinAllocPower":["NAN", "NAN", 1200, 800, "NAN", "NAN", "NAN"], - "MaxAllocPower":["NAN", "NAN", 10000, 10000, "NAN", "NAN", "NAN"], - "I_Cutoff":["NAN", "NAN", 0, 2, "NAN", "NAN", "NAN"], - "TranCycle": 5 + "K_Po":["NAN", "NAN", "NAN", 400, "NAN", "NAN", "NAN"], + "K_Pu":["NAN", "NAN", "NAN", 400, "NAN", "NAN", "NAN"], + "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"], + "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"], + "I_Max":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"], + "MinAllocPower":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"], + "MaxAllocPower":["NAN", "NAN", "NAN", 10000, "NAN", "NAN", "NAN"], + "I_Cutoff":["NAN", "NAN", "NAN", 2, "NAN", "NAN", "NAN"] }, "ExcludedPowerInfo": [ { @@ -174,6 +173,61 @@ "PowerWeight": [0.3, 0.3, 0.3, 0.3, 0.3, 0.3, 0.3] } ], + "BindedCdevInfo": [ + { + "CdevRequest": "thermal-cpufreq-0", + "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1], + "MaxReleaseStep": 1, + "MaxThrottleStep": 1, + "BindedPowerRail": "S4M_VDD_CPUCL0", + "CdevCeiling": [0, 8, 8, 8, 8, 10, 10], + "LimitInfo": [0, 0, 0, 0, 8, 10, 10] + }, + { + "CdevRequest": "thermal-cpufreq-1", + "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1], + "MaxReleaseStep": 1, + "MaxThrottleStep": 1, + "BindedPowerRail": "S3M_VDD_CPUCL1", + "CdevCeiling": [0, 12, 12, 12, 12, 14, 14], + "LimitInfo": [0, 0, 0, 0, 12, 14, 14] + }, + { + "CdevRequest": "thermal-cpufreq-2", + "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1], + "MaxReleaseStep": 1, + "MaxThrottleStep": 1, + "BindedPowerRail": "S2M_VDD_CPUCL2", + "CdevCeiling": [0, 15, 15, 15, 15, 17, 17], + "LimitInfo": [0, 0, 0, 0, 15, 17, 17] + } + ] + }, + { + "Name":"VIRTUAL-SKIN-CPU-GPU", + "Type":"UNKNOWN", + "Hidden":true, + "VirtualSensor":true, + "TriggerSensor":"skin_therm1", + "Formula":"MAXIMUM", + "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], + "Coefficient":[1.0, 1.0, 1.0, 1.0], + "HotThreshold":["NAN", 37.0, 43.0, 45.0, 47, 52.0, 55.0], + "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9], + "Multiplier":0.001, + "PollingDelay":300000, + "PassiveDelay":7000, + "PIDInfo": { + "K_Po":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"], + "K_Pu":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"], + "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"], + "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"], + "I_Max":["NAN", "NAN", "NAN", 700, "NAN", "NAN", "NAN"], + "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"], + "MinAllocPower":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"], + "MaxAllocPower":["NAN", "NAN", "NAN", 3900, "NAN", "NAN", "NAN"], + "I_Cutoff":["NAN", "NAN", "NAN", 2, "NAN", "NAN", "NAN"] + }, "BindedCdevInfo": [ { "CdevRequest": "thermal-cpufreq-0", From a0634db44da9ed60994d110d62ee9cea8d25c303 Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Mon, 28 Nov 2022 15:09:17 +0800 Subject: [PATCH 102/124] audio: Phase in fortemedia tuning tables Change List : Fortemedia: Handheld : Optimize TX SWB/VOIP performance for kid's voice Sync TX setting to - Condor-Headphone/ TTY-VCO / BT-HAC (NB/WB) - Condor-Headphone SWB / TTY-VCO SWB / Condor-Headphone Reserve2 SWB / TTY-VCO Reserve2 / Reserve2 SWB / BT-HAC SWB / BT-HAC Reserve2 SWB Files from the latest attachment on b/260539954 Bug: 260539954 Test: verified by ntkuo@ Change-Id: If25c0bbb1c202d70d2ebabd0093ce1468dedbc86 --- audio/lynx/tuning/fortemedia/BLUETOOTH.dat | Bin 276978 -> 276978 bytes audio/lynx/tuning/fortemedia/BLUETOOTH.mods | 140 +- audio/lynx/tuning/fortemedia/HANDSFREE.dat | Bin 117198 -> 117198 bytes audio/lynx/tuning/fortemedia/HANDSFREE.mods | 113708 +++-------------- audio/lynx/tuning/fortemedia/HEADSET.dat | Bin 426106 -> 426106 bytes audio/lynx/tuning/fortemedia/HEADSET.mods | 210 +- 6 files changed, 18314 insertions(+), 95744 deletions(-) diff --git a/audio/lynx/tuning/fortemedia/BLUETOOTH.dat b/audio/lynx/tuning/fortemedia/BLUETOOTH.dat index a1ed9e6654b49cc3c02858bc2c2f99d28bd5c450..6d49c73cafba025800955f54be519f8c4f62d59d 100644 GIT binary patch delta 117 zcmezLS>V%WfeoL+c_kPW86_B$7!??l86_tF53k@AaAIUoaAsskaA9N+n5@uby!riV ndzH!iGV%WfeoL+c@-EG85J0mfLNJPVe#Mur4uAa-G7P?)UHWW4$PYI~K* k`!so`X9=+IZ04(#(IZA%^ZV89?^iPdG1K<%nf=^k_6?uHc_kPW86_B$7!??l86_tF53k@AaAIUoaAsskaA9N+n5@ubJo)|V X_GY`t?RJrjQ@n}Quw8B$;|65_sLvb; delta 84 zcmX>%nf=^k_6?uHCu^-XoU9xX!mHrK$dKR+#4d~s3X>I@j3>We-QH{$x!o?3af&y7 MW!vSJF>X)>0Mc$8K>z>% diff --git a/audio/lynx/tuning/fortemedia/HANDSFREE.mods b/audio/lynx/tuning/fortemedia/HANDSFREE.mods index f8ecef9..1ea5e7e 100644 --- a/audio/lynx/tuning/fortemedia/HANDSFREE.mods +++ b/audio/lynx/tuning/fortemedia/HANDSFREE.mods @@ -1,26712 +1,12 @@ #PLATFORM_NAME gChip -#EXPORT_FLAG HEADSET +#EXPORT_FLAG HANDSFREE #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-11-21 11:39:12 +#SAVE_TIME 2022-11-28 15:01:14 -#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7CCC //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6333 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0010 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x2900 //TX_MIN_EQ_RE_EST_0 -153 0x1000 //TX_MIN_EQ_RE_EST_1 -154 0x1000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x0064 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x2000 //TX_DTD_THR2_3 -208 0x2000 //TX_DTD_THR2_4 -209 0x2000 //TX_DTD_THR2_5 -210 0x2000 //TX_DTD_THR2_6 -211 0x4100 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x2000 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0010 //TX_EPD_OFFSET_00 -233 0x0010 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFD00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xFA00 //TX_THR_SN_EST_6 -249 0xFA00 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0000 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0400 //TX_B_POST_FLT_0 -280 0x0400 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000D //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0012 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x000D //TX_MIN_GAIN_S_4 -294 0x000D //TX_MIN_GAIN_S_5 -295 0x0012 //TX_MIN_GAIN_S_6 -296 0x000D //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x5000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0014 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x7000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x7FFF //TX_A_POST_FILT_S_6 -321 0x4000 //TX_A_POST_FILT_S_7 -322 0x0400 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x0400 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x6000 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0FA0 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x0900 //TX_NOISE_TH_1 -371 0x0033 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 -373 0x0231 //TX_NOISE_TH_4 -374 0x68DE //TX_NOISE_TH_5 -375 0x5784 //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0280 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2400 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x443C //TX_FDEQ_GAIN_5 -573 0x2A30 //TX_FDEQ_GAIN_6 -574 0x2C2C //TX_FDEQ_GAIN_7 -575 0x2820 //TX_FDEQ_GAIN_8 -576 0x2024 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0010 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0802 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0010 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0802 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0010 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0802 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0007 //TX_GAIN_LIMIT_2 -776 0x0007 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0002 //TX_TDDRC_THRD_0 -855 0x0008 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0700 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA43C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4748 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x280A //RX_TPKA_FP -127 0x032D //RX_MIN_G_FP -128 0x0A00 //RX_MAX_G_FP -129 0x0009 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0010 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0049 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x007C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0211 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4040 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA43C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x280A //RX_TPKA_FP -284 0x032D //RX_MIN_G_FP -285 0x0A00 //RX_MAX_G_FP -286 0x0009 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0009 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x002C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0049 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x007C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0211 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4040 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x36B0 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x0064 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7D00 //TX_DTD_THR1_1 -199 0x7D00 //TX_DTD_THR1_2 -200 0x7D00 //TX_DTD_THR1_3 -201 0x7D00 //TX_DTD_THR1_4 -202 0x7D00 //TX_DTD_THR1_5 -203 0x7D00 //TX_DTD_THR1_6 -204 0x4000 //TX_DTD_THR2_0 -205 0x1000 //TX_DTD_THR2_1 -206 0x1000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x1000 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xF700 //TX_THR_SN_EST_2 -245 0xFC00 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x001C //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x0018 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x0009 //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x2000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x0900 //TX_NOISE_TH_1 -371 0x009B //TX_NOISE_TH_2 -372 0x4149 //TX_NOISE_TH_3 -373 0x0331 //TX_NOISE_TH_4 -374 0x542C //TX_NOISE_TH_5 -375 0x55E5 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00FB //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4849 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4140 //TX_FDEQ_GAIN_5 -573 0x3838 //TX_FDEQ_GAIN_6 -574 0x3839 //TX_FDEQ_GAIN_7 -575 0x3830 //TX_FDEQ_GAIN_8 -576 0x3033 //TX_FDEQ_GAIN_9 -577 0x2E2E //TX_FDEQ_GAIN_10 -578 0x2A2A //TX_FDEQ_GAIN_11 -579 0x2A32 //TX_FDEQ_GAIN_12 -580 0x3838 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1112 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0048 //TX_MIC_PWR_BIAS_2 -772 0x0048 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0003 //TX_GAIN_LIMIT_2 -776 0x0003 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0700 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xCCCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA43C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F40 //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1D00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01AE //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x280A //RX_TPKA_FP -127 0x032D //RX_MIN_G_FP -128 0x0A00 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01A0 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F3F //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01A0 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F3F //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0012 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01A0 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F3F //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01A0 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F3F //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0031 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01A0 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F3F //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01A0 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F3F //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01A0 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484B //RX_FDEQ_GAIN_6 -46 0x4B48 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4846 //RX_FDEQ_GAIN_10 -50 0x403F //RX_FDEQ_GAIN_11 -51 0x3F3F //RX_FDEQ_GAIN_12 -52 0x4248 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA43C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F40 //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1C00 //RX_TDDRC_THRD_2 -272 0x1D00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01AE //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x280A //RX_TPKA_FP -284 0x032D //RX_MIN_G_FP -285 0x0A00 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01A0 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F3F //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01A0 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F3F //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01A0 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F3F //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001E //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01A0 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F3F //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0031 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01A0 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F3F //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0052 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01A0 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F3F //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x008B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01A0 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x484B //RX_FDEQ_GAIN_6 -203 0x4B48 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4846 //RX_FDEQ_GAIN_10 -207 0x403F //RX_FDEQ_GAIN_11 -208 0x3F3F //RX_FDEQ_GAIN_12 -209 0x4248 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6D60 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x7D00 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xF700 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x001C //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x0009 //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x3000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7000 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x00FA //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x2904 //TX_NOISE_TH_3 -373 0x07D0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0064 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4040 //TX_FDEQ_GAIN_6 -574 0x4040 //TX_FDEQ_GAIN_7 -575 0x4040 //TX_FDEQ_GAIN_8 -576 0x3838 //TX_FDEQ_GAIN_9 -577 0x3838 //TX_FDEQ_GAIN_10 -578 0x3828 //TX_FDEQ_GAIN_11 -579 0x2828 //TX_FDEQ_GAIN_12 -580 0x2828 //TX_FDEQ_GAIN_13 -581 0x1C1C //TX_FDEQ_GAIN_14 -582 0x1C1C //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x284A //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0050 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0002 //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0020 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x243C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4E52 //RX_FDEQ_GAIN_0 -40 0x5252 //RX_FDEQ_GAIN_1 -41 0x5252 //RX_FDEQ_GAIN_2 -42 0x5250 //RX_FDEQ_GAIN_3 -43 0x4C46 //RX_FDEQ_GAIN_4 -44 0x4748 //RX_FDEQ_GAIN_5 -45 0x5768 //RX_FDEQ_GAIN_6 -46 0x6162 //RX_FDEQ_GAIN_7 -47 0x5252 //RX_FDEQ_GAIN_8 -48 0x5256 //RX_FDEQ_GAIN_9 -49 0x5248 //RX_FDEQ_GAIN_10 -50 0x3434 //RX_FDEQ_GAIN_11 -51 0x3436 //RX_FDEQ_GAIN_12 -52 0x2A18 //RX_FDEQ_GAIN_13 -53 0x1830 //RX_FDEQ_GAIN_14 -54 0x3648 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x023E //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x0D90 //RX_TPKA_FP -127 0x032D //RX_MIN_G_FP -128 0x0A00 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0030 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0050 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0089 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x043C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4E52 //RX_FDEQ_GAIN_0 -197 0x5252 //RX_FDEQ_GAIN_1 -198 0x5252 //RX_FDEQ_GAIN_2 -199 0x5250 //RX_FDEQ_GAIN_3 -200 0x4C46 //RX_FDEQ_GAIN_4 -201 0x4748 //RX_FDEQ_GAIN_5 -202 0x5768 //RX_FDEQ_GAIN_6 -203 0x6162 //RX_FDEQ_GAIN_7 -204 0x5252 //RX_FDEQ_GAIN_8 -205 0x5256 //RX_FDEQ_GAIN_9 -206 0x5248 //RX_FDEQ_GAIN_10 -207 0x3434 //RX_FDEQ_GAIN_11 -208 0x3436 //RX_FDEQ_GAIN_12 -209 0x2A18 //RX_FDEQ_GAIN_13 -210 0x1830 //RX_FDEQ_GAIN_14 -211 0x3648 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x023E //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x0D90 //RX_TPKA_FP -284 0x032D //RX_MIN_G_FP -285 0x0A00 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0011 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001D //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0030 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0050 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0089 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x6B6A //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B4C //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x61A8 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x0800 //TX_DTD_THR1_0 -198 0x0800 //TX_DTD_THR1_1 -199 0x0800 //TX_DTD_THR1_2 -200 0x0800 //TX_DTD_THR1_3 -201 0x0800 //TX_DTD_THR1_4 -202 0x0800 //TX_DTD_THR1_5 -203 0x0800 //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0020 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x0800 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x1000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x07DA //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x484C //TX_FDEQ_GAIN_10 -578 0x5054 //TX_FDEQ_GAIN_11 -579 0x606C //TX_FDEQ_GAIN_12 -580 0x7890 //TX_FDEQ_GAIN_13 -581 0x9C9C //TX_FDEQ_GAIN_14 -582 0x9C9C //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2020 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x242C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x280A //RX_TPKA_FP -127 0x032D //RX_MIN_G_FP -128 0x0A00 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0012 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001F //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0034 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0056 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0090 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0231 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4858 //RX_FDEQ_GAIN_0 -40 0x6265 //RX_FDEQ_GAIN_1 -41 0x6568 //RX_FDEQ_GAIN_2 -42 0x5654 //RX_FDEQ_GAIN_3 -43 0x676E //RX_FDEQ_GAIN_4 -44 0x6E6B //RX_FDEQ_GAIN_5 -45 0x5B5F //RX_FDEQ_GAIN_6 -46 0x5864 //RX_FDEQ_GAIN_7 -47 0x6548 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x242C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7B02 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x280A //RX_TPKA_FP -284 0x032D //RX_MIN_G_FP -285 0x0A00 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0012 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001F //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0034 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0056 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0090 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0231 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4858 //RX_FDEQ_GAIN_0 -197 0x6265 //RX_FDEQ_GAIN_1 -198 0x6568 //RX_FDEQ_GAIN_2 -199 0x5654 //RX_FDEQ_GAIN_3 -200 0x676E //RX_FDEQ_GAIN_4 -201 0x6E6B //RX_FDEQ_GAIN_5 -202 0x5B5F //RX_FDEQ_GAIN_6 -203 0x5864 //RX_FDEQ_GAIN_7 -204 0x6548 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-USB_BLACKBIRD-RESERVE2-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6F68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6D60 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x7D00 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xF700 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x001C //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x0009 //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x3000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7000 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x00FA //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x2904 //TX_NOISE_TH_3 -373 0x07D0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0064 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4040 //TX_FDEQ_GAIN_6 -574 0x4040 //TX_FDEQ_GAIN_7 -575 0x4040 //TX_FDEQ_GAIN_8 -576 0x3838 //TX_FDEQ_GAIN_9 -577 0x3838 //TX_FDEQ_GAIN_10 -578 0x3828 //TX_FDEQ_GAIN_11 -579 0x2828 //TX_FDEQ_GAIN_12 -580 0x2828 //TX_FDEQ_GAIN_13 -581 0x1C1C //TX_FDEQ_GAIN_14 -582 0x1C1C //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x284A //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0050 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0002 //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0020 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x003C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4E52 //RX_FDEQ_GAIN_0 -40 0x5252 //RX_FDEQ_GAIN_1 -41 0x5252 //RX_FDEQ_GAIN_2 -42 0x5250 //RX_FDEQ_GAIN_3 -43 0x4C46 //RX_FDEQ_GAIN_4 -44 0x4748 //RX_FDEQ_GAIN_5 -45 0x5768 //RX_FDEQ_GAIN_6 -46 0x6162 //RX_FDEQ_GAIN_7 -47 0x5252 //RX_FDEQ_GAIN_8 -48 0x5256 //RX_FDEQ_GAIN_9 -49 0x5248 //RX_FDEQ_GAIN_10 -50 0x3434 //RX_FDEQ_GAIN_11 -51 0x3436 //RX_FDEQ_GAIN_12 -52 0x2A18 //RX_FDEQ_GAIN_13 -53 0x1830 //RX_FDEQ_GAIN_14 -54 0x3648 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x023E //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x0D90 //RX_TPKA_FP -127 0x032D //RX_MIN_G_FP -128 0x0A00 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0030 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0050 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0089 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7220 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04CA //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x6270 //RX_FDEQ_GAIN_0 -40 0x7A70 //RX_FDEQ_GAIN_1 -41 0x7270 //RX_FDEQ_GAIN_2 -42 0x6A70 //RX_FDEQ_GAIN_3 -43 0x645A //RX_FDEQ_GAIN_4 -44 0x5A5E //RX_FDEQ_GAIN_5 -45 0x6E72 //RX_FDEQ_GAIN_6 -46 0x7268 //RX_FDEQ_GAIN_7 -47 0x665A //RX_FDEQ_GAIN_8 -48 0x5A5A //RX_FDEQ_GAIN_9 -49 0x5A64 //RX_FDEQ_GAIN_10 -50 0x6448 //RX_FDEQ_GAIN_11 -51 0x4949 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x284A //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x003C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4E52 //RX_FDEQ_GAIN_0 -197 0x5252 //RX_FDEQ_GAIN_1 -198 0x5252 //RX_FDEQ_GAIN_2 -199 0x5250 //RX_FDEQ_GAIN_3 -200 0x4C46 //RX_FDEQ_GAIN_4 -201 0x4748 //RX_FDEQ_GAIN_5 -202 0x5768 //RX_FDEQ_GAIN_6 -203 0x6162 //RX_FDEQ_GAIN_7 -204 0x5252 //RX_FDEQ_GAIN_8 -205 0x5256 //RX_FDEQ_GAIN_9 -206 0x5248 //RX_FDEQ_GAIN_10 -207 0x3434 //RX_FDEQ_GAIN_11 -208 0x3436 //RX_FDEQ_GAIN_12 -209 0x2A18 //RX_FDEQ_GAIN_13 -210 0x1830 //RX_FDEQ_GAIN_14 -211 0x3648 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x023E //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x0D90 //RX_TPKA_FP -284 0x032D //RX_MIN_G_FP -285 0x0A00 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000A //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0011 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x001D //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0030 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0050 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0089 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7220 //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1800 //RX_TDDRC_THRD_2 -272 0x1800 //RX_TDDRC_THRD_3 -273 0x7FFF //RX_TDDRC_SLANT_0 -274 0x7FFF //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x04CA //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x6270 //RX_FDEQ_GAIN_0 -197 0x7A70 //RX_FDEQ_GAIN_1 -198 0x7270 //RX_FDEQ_GAIN_2 -199 0x6A70 //RX_FDEQ_GAIN_3 -200 0x645A //RX_FDEQ_GAIN_4 -201 0x5A5E //RX_FDEQ_GAIN_5 -202 0x6E72 //RX_FDEQ_GAIN_6 -203 0x7268 //RX_FDEQ_GAIN_7 -204 0x665A //RX_FDEQ_GAIN_8 -205 0x5A5A //RX_FDEQ_GAIN_9 -206 0x5A64 //RX_FDEQ_GAIN_10 -207 0x6448 //RX_FDEQ_GAIN_11 -208 0x4949 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x284A //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7CCC //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6333 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0010 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x1000 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x0064 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x2000 //TX_DTD_THR2_3 -208 0x2000 //TX_DTD_THR2_4 -209 0x2000 //TX_DTD_THR2_5 -210 0x2000 //TX_DTD_THR2_6 -211 0x4100 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x1000 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0010 //TX_EPD_OFFSET_00 -233 0x0010 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xFA00 //TX_THR_SN_EST_6 -249 0xFA00 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0000 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0400 //TX_B_POST_FLT_0 -280 0x0400 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0010 //TX_NS_LVL_CTRL_1 -283 0x0010 //TX_NS_LVL_CTRL_2 -284 0x0010 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000D //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000D //TX_MIN_GAIN_S_3 -293 0x000D //TX_MIN_GAIN_S_4 -294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 -296 0x000D //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0014 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x4000 //TX_A_POST_FILT_S_7 -322 0x0400 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x0400 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x0FA0 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x02BC //TX_NOISE_TH_1 -371 0x1F40 //TX_NOISE_TH_2 -372 0x4650 //TX_NOISE_TH_3 -373 0x7148 //TX_NOISE_TH_4 -374 0x044C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x0032 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0280 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2400 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x6048 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4844 //TX_FDEQ_GAIN_6 -574 0x4242 //TX_FDEQ_GAIN_7 -575 0x3C34 //TX_FDEQ_GAIN_8 -576 0x343A //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0401 //TX_FDEQ_BIN_0 -592 0x0103 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0010 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0802 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0010 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0802 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0010 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0802 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x000B //TX_GAIN_LIMIT_0 -774 0x000B //TX_GAIN_LIMIT_1 -775 0x000B //TX_GAIN_LIMIT_2 -776 0x000B //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0650 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA02C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4844 //RX_FDEQ_GAIN_6 -46 0x4444 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4844 //RX_FDEQ_GAIN_6 -46 0x4444 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4844 //RX_FDEQ_GAIN_6 -46 0x4444 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4844 //RX_FDEQ_GAIN_6 -46 0x4444 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4844 //RX_FDEQ_GAIN_6 -46 0x4444 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4844 //RX_FDEQ_GAIN_6 -46 0x4444 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4844 //RX_FDEQ_GAIN_6 -46 0x4444 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4444 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA02C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4844 //RX_FDEQ_GAIN_6 -203 0x4444 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4844 //RX_FDEQ_GAIN_6 -203 0x4444 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4844 //RX_FDEQ_GAIN_6 -203 0x4444 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4844 //RX_FDEQ_GAIN_6 -203 0x4444 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4844 //RX_FDEQ_GAIN_6 -203 0x4444 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4844 //RX_FDEQ_GAIN_6 -203 0x4444 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4844 //RX_FDEQ_GAIN_6 -203 0x4444 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4444 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x6056 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0302 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D07 //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1119 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0619 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA02C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA02C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x002C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x6B6A //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B4C //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x61A8 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x0800 //TX_DTD_THR1_0 -198 0x0800 //TX_DTD_THR1_1 -199 0x0800 //TX_DTD_THR1_2 -200 0x0800 //TX_DTD_THR1_3 -201 0x0800 //TX_DTD_THR1_4 -202 0x0800 //TX_DTD_THR1_5 -203 0x0800 //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7B02 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR-RESERVE2-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x002C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x002C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -27671,26706 +971,6 @@ 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX -0 0xA02C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA02C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x6F7D //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0C00 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6C00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x6000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP -169 0x02A0 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0088 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x6D60 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x05DC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1194 //TX_RATIO_DT_L_TH_HIGH -226 0x4A38 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x07D0 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF200 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x2000 //TX_SNRI_SUP_1 -302 0x2000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x2000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x2000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7800 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x05DC //TX_DT_BINVAD_ENDF -358 0x2000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x0320 //TX_NOISE_TH_1 -371 0x0230 //TX_NOISE_TH_2 -372 0x2CEC //TX_NOISE_TH_3 -373 0x3E80 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x7999 //TX_RATIODTL_CUT_TH -383 0x0119 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x7FFF //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x4000 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0005 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x5048 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4A4F //TX_FDEQ_GAIN_2 -570 0x4E48 //TX_FDEQ_GAIN_3 -571 0x4444 //TX_FDEQ_GAIN_4 -572 0x444B //TX_FDEQ_GAIN_5 -573 0x5152 //TX_FDEQ_GAIN_6 -574 0x584F //TX_FDEQ_GAIN_7 -575 0x4950 //TX_FDEQ_GAIN_8 -576 0x4C48 //TX_FDEQ_GAIN_9 -577 0x3D40 //TX_FDEQ_GAIN_10 -578 0x4240 //TX_FDEQ_GAIN_11 -579 0x4C4C //TX_FDEQ_GAIN_12 -580 0x4C4C //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0F10 //TX_FDEQ_BIN_10 -602 0x1011 //TX_FDEQ_BIN_11 -603 0x1112 //TX_FDEQ_BIN_12 -604 0x120B //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0F10 //TX_PREEQ_BIN_MIC0_10 -652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1112 //TX_PREEQ_BIN_MIC0_12 -654 0x120B //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 -676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 -677 0x5052 //TX_PREEQ_GAIN_MIC1_11 -678 0x5454 //TX_PREEQ_GAIN_MIC1_12 -679 0x5454 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x484A //TX_PREEQ_GAIN_MIC2_3 -719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 -720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 -721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 -722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 -723 0x5050 //TX_PREEQ_GAIN_MIC2_8 -724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5252 //TX_PREEQ_GAIN_MIC2_10 -726 0x5253 //TX_PREEQ_GAIN_MIC2_11 -727 0x5454 //TX_PREEQ_GAIN_MIC2_12 -728 0x5454 //TX_PREEQ_GAIN_MIC2_13 -729 0x5455 //TX_PREEQ_GAIN_MIC2_14 -730 0x5555 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0808 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1200 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x10CA //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0276 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7DC8 //TX_DTD_THR1_MICMUTE_0 -912 0x7FFF //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x00B0 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0xFC18 //TX_MIC1MUTE_RATIO_THR -940 0x026C //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0100 //TX_AMS_RESRV_01 -944 0xE4A8 //TX_AMS_RESRV_02 -945 0x7EF4 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA02C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA02C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x00F3 //TX_PATCH_REG -3 0x6F7D //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0400 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0600 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x7FFF //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0260 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0300 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x6D60 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x09C4 //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x0708 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x001A //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 -291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 -293 0x0020 //TX_MIN_GAIN_S_4 -294 0x0020 //TX_MIN_GAIN_S_5 -295 0x0020 //TX_MIN_GAIN_S_6 -296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x2000 //TX_SNRI_SUP_1 -302 0x2000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x2000 //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x2000 //TX_A_POST_FILT_S_3 -318 0x7FFF //TX_A_POST_FILT_S_4 -319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7F00 //TX_LAMBDA_PFILT -339 0x7F00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7F00 //TX_LAMBDA_PFILT_S_2 -342 0x7F00 //TX_LAMBDA_PFILT_S_3 -343 0x7F00 //TX_LAMBDA_PFILT_S_4 -344 0x7F00 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x01F4 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0040 //TX_DT_BINVAD_TH_0 -354 0x0040 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x2000 //TX_DT_BINVAD_TH_3 -357 0x07D0 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x300C //TX_NOISE_TH_3 -373 0x2710 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x07D0 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0005 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4850 //TX_FDEQ_GAIN_2 -570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4B48 //TX_FDEQ_GAIN_4 -572 0x484E //TX_FDEQ_GAIN_5 -573 0x4E60 //TX_FDEQ_GAIN_6 -574 0x5C52 //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4E45 //TX_FDEQ_GAIN_9 -577 0x494A //TX_FDEQ_GAIN_10 -578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C50 //TX_FDEQ_GAIN_12 -580 0x5466 //TX_FDEQ_GAIN_13 -581 0x6076 //TX_FDEQ_GAIN_14 -582 0x8088 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x401E //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4849 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 -676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 -677 0x5052 //TX_PREEQ_GAIN_MIC1_11 -678 0x5354 //TX_PREEQ_GAIN_MIC1_12 -679 0x5454 //TX_PREEQ_GAIN_MIC1_13 -680 0x5653 //TX_PREEQ_GAIN_MIC1_14 -681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 -682 0x4444 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x401E //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x494B //TX_PREEQ_GAIN_MIC2_6 -722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 -723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 -724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5255 //TX_PREEQ_GAIN_MIC2_10 -726 0x5754 //TX_PREEQ_GAIN_MIC2_11 -727 0x5454 //TX_PREEQ_GAIN_MIC2_12 -728 0x544F //TX_PREEQ_GAIN_MIC2_13 -729 0x463D //TX_PREEQ_GAIN_MIC2_14 -730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0203 //TX_PREEQ_BIN_MIC2_0 -740 0x0303 //TX_PREEQ_BIN_MIC2_1 -741 0x0304 //TX_PREEQ_BIN_MIC2_2 -742 0x0405 //TX_PREEQ_BIN_MIC2_3 -743 0x0506 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0809 //TX_PREEQ_BIN_MIC2_6 -746 0x0A0A //TX_PREEQ_BIN_MIC2_7 -747 0x0C10 //TX_PREEQ_BIN_MIC2_8 -748 0x1013 //TX_PREEQ_BIN_MIC2_9 -749 0x1414 //TX_PREEQ_BIN_MIC2_10 -750 0x261E //TX_PREEQ_BIN_MIC2_11 -751 0x1E14 //TX_PREEQ_BIN_MIC2_12 -752 0x1414 //TX_PREEQ_BIN_MIC2_13 -753 0x2814 //TX_PREEQ_BIN_MIC2_14 -754 0x4022 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0003 //TX_TDDRC_THRD_0 -855 0x0004 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x13F4 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2379 //TX_SENDFUNC_REG_MICMUTE -898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x02B0 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7918 //TX_DTD_THR1_MICMUTE_0 -912 0x797C //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0xFE70 //TX_MIC1MUTE_RATIO_THR -940 0x02BC //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0100 //TX_AMS_RESRV_01 -944 0x3B38 //TX_AMS_RESRV_02 -945 0x7E2C //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x002C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A19 //TX_PGA_0 -28 0x0A19 //TX_PGA_1 -29 0x0A19 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x7999 //TX_RATIODTL_CUT_TH -383 0x0119 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x4000 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x5048 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x5B5B //TX_FDEQ_GAIN_10 -578 0x737B //TX_FDEQ_GAIN_11 -579 0x7B9A //TX_FDEQ_GAIN_12 -580 0x9AC4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4849 //TX_PREEQ_GAIN_MIC0_6 -624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 -626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 -628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 -629 0x4838 //TX_PREEQ_GAIN_MIC0_12 -630 0x3858 //TX_PREEQ_GAIN_MIC0_13 -631 0x7060 //TX_PREEQ_GAIN_MIC0_14 -632 0x9870 //TX_PREEQ_GAIN_MIC0_15 -633 0x5848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4645 //TX_PREEQ_GAIN_MIC1_6 -673 0x4442 //TX_PREEQ_GAIN_MIC1_7 -674 0x4140 //TX_PREEQ_GAIN_MIC1_8 -675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 -676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 -677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3938 //TX_PREEQ_GAIN_MIC1_12 -679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 -680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0FDA //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7B02 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x00F3 //TX_PATCH_REG -3 0x6F7D //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0400 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0600 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x7FFF //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0260 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0300 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x6D60 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x09C4 //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x0708 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x001A //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 -291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 -293 0x0020 //TX_MIN_GAIN_S_4 -294 0x0020 //TX_MIN_GAIN_S_5 -295 0x0020 //TX_MIN_GAIN_S_6 -296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x2000 //TX_SNRI_SUP_1 -302 0x2000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x2000 //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x2000 //TX_A_POST_FILT_S_3 -318 0x7FFF //TX_A_POST_FILT_S_4 -319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7F00 //TX_LAMBDA_PFILT -339 0x7F00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7F00 //TX_LAMBDA_PFILT_S_2 -342 0x7F00 //TX_LAMBDA_PFILT_S_3 -343 0x7F00 //TX_LAMBDA_PFILT_S_4 -344 0x7F00 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x01F4 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0040 //TX_DT_BINVAD_TH_0 -354 0x0040 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x2000 //TX_DT_BINVAD_TH_3 -357 0x07D0 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x300C //TX_NOISE_TH_3 -373 0x2710 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x07D0 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0005 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4850 //TX_FDEQ_GAIN_2 -570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4B48 //TX_FDEQ_GAIN_4 -572 0x484E //TX_FDEQ_GAIN_5 -573 0x4E60 //TX_FDEQ_GAIN_6 -574 0x5C52 //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4E45 //TX_FDEQ_GAIN_9 -577 0x494A //TX_FDEQ_GAIN_10 -578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C50 //TX_FDEQ_GAIN_12 -580 0x5466 //TX_FDEQ_GAIN_13 -581 0x6076 //TX_FDEQ_GAIN_14 -582 0x8088 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x401E //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4849 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 -676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 -677 0x5052 //TX_PREEQ_GAIN_MIC1_11 -678 0x5354 //TX_PREEQ_GAIN_MIC1_12 -679 0x5454 //TX_PREEQ_GAIN_MIC1_13 -680 0x5653 //TX_PREEQ_GAIN_MIC1_14 -681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 -682 0x4444 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x401E //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x494B //TX_PREEQ_GAIN_MIC2_6 -722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 -723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 -724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5255 //TX_PREEQ_GAIN_MIC2_10 -726 0x5754 //TX_PREEQ_GAIN_MIC2_11 -727 0x5454 //TX_PREEQ_GAIN_MIC2_12 -728 0x544F //TX_PREEQ_GAIN_MIC2_13 -729 0x463D //TX_PREEQ_GAIN_MIC2_14 -730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0203 //TX_PREEQ_BIN_MIC2_0 -740 0x0303 //TX_PREEQ_BIN_MIC2_1 -741 0x0304 //TX_PREEQ_BIN_MIC2_2 -742 0x0405 //TX_PREEQ_BIN_MIC2_3 -743 0x0506 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0809 //TX_PREEQ_BIN_MIC2_6 -746 0x0A0A //TX_PREEQ_BIN_MIC2_7 -747 0x0C10 //TX_PREEQ_BIN_MIC2_8 -748 0x1013 //TX_PREEQ_BIN_MIC2_9 -749 0x1414 //TX_PREEQ_BIN_MIC2_10 -750 0x261E //TX_PREEQ_BIN_MIC2_11 -751 0x1E14 //TX_PREEQ_BIN_MIC2_12 -752 0x1414 //TX_PREEQ_BIN_MIC2_13 -753 0x2814 //TX_PREEQ_BIN_MIC2_14 -754 0x4022 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0003 //TX_TDDRC_THRD_0 -855 0x0004 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x13F4 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2379 //TX_SENDFUNC_REG_MICMUTE -898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x02B0 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7918 //TX_DTD_THR1_MICMUTE_0 -912 0x797C //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0xFE70 //TX_MIC1MUTE_RATIO_THR -940 0x02BC //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0100 //TX_AMS_RESRV_01 -944 0x3B38 //TX_AMS_RESRV_02 -945 0x7E2C //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x002C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x002C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7CCC //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6333 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0010 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x1000 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x0064 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x2000 //TX_DTD_THR2_3 -208 0x2000 //TX_DTD_THR2_4 -209 0x2000 //TX_DTD_THR2_5 -210 0x2000 //TX_DTD_THR2_6 -211 0x4100 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x1000 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0010 //TX_EPD_OFFSET_00 -233 0x0010 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xFA00 //TX_THR_SN_EST_6 -249 0xFA00 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0000 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0400 //TX_B_POST_FLT_0 -280 0x0400 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0010 //TX_NS_LVL_CTRL_1 -283 0x0010 //TX_NS_LVL_CTRL_2 -284 0x0010 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000D //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000D //TX_MIN_GAIN_S_3 -293 0x000D //TX_MIN_GAIN_S_4 -294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 -296 0x000D //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0014 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x4000 //TX_A_POST_FILT_S_7 -322 0x0400 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x0400 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x0FA0 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x02BC //TX_NOISE_TH_1 -371 0x1F40 //TX_NOISE_TH_2 -372 0x4650 //TX_NOISE_TH_3 -373 0x7148 //TX_NOISE_TH_4 -374 0x044C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x0032 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0280 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2400 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0010 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0802 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0010 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0802 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0010 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0802 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x000B //TX_GAIN_LIMIT_0 -774 0x000B //TX_GAIN_LIMIT_1 -775 0x000B //TX_GAIN_LIMIT_2 -776 0x000B //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA024 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0021 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2030 //RX_TDDRC_THRD_2 -115 0x2030 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA024 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0021 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2030 //RX_TDDRC_THRD_2 -272 0x2030 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0478 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA024 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0021 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA024 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0010 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0021 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2024 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0021 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0024 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0021 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x6B6A //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B4C //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x61A8 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x0800 //TX_DTD_THR1_0 -198 0x0800 //TX_DTD_THR1_1 -199 0x0800 //TX_DTD_THR1_2 -200 0x0800 //TX_DTD_THR1_3 -201 0x0800 //TX_DTD_THR1_4 -202 0x0800 //TX_DTD_THR1_5 -203 0x0800 //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7B02 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x0024 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0021 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0037 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0024 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000C //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0014 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0021 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0037 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX 0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG @@ -56073,19 +2673,19 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT @@ -56099,30 +2699,30 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS +33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF +35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 @@ -56130,28 +2730,28 @@ 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 @@ -56186,36 +2786,36 @@ 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 @@ -56225,32 +2825,32 @@ 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6C00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x6000 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x02A0 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0088 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH @@ -56259,82 +2859,82 @@ 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 +181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK +191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x6D60 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x5000 //TX_DTD_THR2_0 +205 0x5000 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO +213 0x05DC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +225 0x1194 //TX_RATIO_DT_L_TH_HIGH +226 0x4A38 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 +234 0x07D0 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF200 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -56344,200 +2944,200 @@ 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS +305 0x50C0 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS +311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7800 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x05DC //TX_DT_BINVAD_ENDF +358 0x2000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 +366 0x0064 //TX_NDETCT +367 0x0032 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x0230 //TX_NOISE_TH_2 +372 0x2CEC //TX_NOISE_TH_3 +373 0x3E80 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH +392 0x7FFF //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH +440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A @@ -56550,115 +3150,115 @@ 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG +490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 +493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH +495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH +528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 +567 0x5048 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 +569 0x4A4F //TX_FDEQ_GAIN_2 +570 0x4E48 //TX_FDEQ_GAIN_3 +571 0x4444 //TX_FDEQ_GAIN_4 +572 0x444B //TX_FDEQ_GAIN_5 +573 0x5152 //TX_FDEQ_GAIN_6 +574 0x584F //TX_FDEQ_GAIN_7 +575 0x4950 //TX_FDEQ_GAIN_8 +576 0x4C48 //TX_FDEQ_GAIN_9 +577 0x3D40 //TX_FDEQ_GAIN_10 +578 0x4240 //TX_FDEQ_GAIN_11 +579 0x4C4C //TX_FDEQ_GAIN_12 +580 0x4C4C //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -56669,20 +3269,20 @@ 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -56719,20 +3319,20 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -56751,13 +3351,13 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +673 0x484A //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5454 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -56768,20 +3368,20 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1112 //TX_PREEQ_BIN_MIC1_12 +703 0x120B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -56796,19 +3396,19 @@ 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +718 0x484A //TX_PREEQ_GAIN_MIC2_3 +719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 +720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 +721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 +722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 +723 0x5050 //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5252 //TX_PREEQ_GAIN_MIC2_10 +726 0x5253 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x5454 //TX_PREEQ_GAIN_MIC2_13 +729 0x5455 //TX_PREEQ_GAIN_MIC2_14 +730 0x5555 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -56817,22 +3417,22 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0808 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -56842,34 +3442,34 @@ 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 +775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -56894,16 +3494,16 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 @@ -56911,10 +3511,10 @@ 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT @@ -56924,51 +3524,51 @@ 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD +846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1200 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN +863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD +865 0x0CCD //TX_TDDRC_SMT_W +866 0x10CA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL @@ -56976,21 +3576,21 @@ 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +900 0x0276 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 +911 0x7DC8 //TX_DTD_THR1_MICMUTE_0 +912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 @@ -57004,7 +3604,7 @@ 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N +926 0x00B0 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH @@ -57017,13 +3617,13 @@ 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0xFC18 //TX_MIC1MUTE_RATIO_THR +940 0x026C //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 +943 0x0100 //TX_AMS_RESRV_01 +944 0xE4A8 //TX_AMS_RESRV_02 +945 0x7EF4 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -58743,19 +5343,19 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00F3 //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT @@ -58769,30 +5369,30 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS +33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF +35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 @@ -58800,28 +5400,28 @@ 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 @@ -58856,36 +5456,36 @@ 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 @@ -58895,32 +5495,32 @@ 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0600 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0300 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH @@ -58929,82 +5529,82 @@ 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 +181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK +191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x6D60 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0708 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 +247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 +252 0x0000 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 +254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -59014,130 +5614,130 @@ 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x2000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS +311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +324 0x6000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH @@ -59145,69 +5745,69 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH +440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A @@ -59220,95 +5820,95 @@ 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG +490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 +493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH +495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR +497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT +505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH +528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N @@ -59317,20 +5917,20 @@ 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -59339,22 +5939,22 @@ 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -59364,7 +5964,7 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 @@ -59389,23 +5989,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -59413,7 +6013,7 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 @@ -59421,16 +6021,16 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -59438,23 +6038,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -59469,16 +6069,16 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -59487,22 +6087,22 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -59512,34 +6112,34 @@ 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -59564,16 +6164,16 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 @@ -59581,10 +6181,10 @@ 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT @@ -59594,73 +6194,73 @@ 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD +846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN +863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD +865 0x0CCD //TX_TDDRC_SMT_W +866 0x13F4 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x02B0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 +911 0x7918 //TX_DTD_THR1_MICMUTE_0 +912 0x797C //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 @@ -59687,13 +6287,13 @@ 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR +939 0xFE70 //TX_MIC1MUTE_RATIO_THR +940 0x02BC //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 +943 0x0100 //TX_AMS_RESRV_01 +944 0x3B38 //TX_AMS_RESRV_02 +945 0x7E2C //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 @@ -60562,14 +7162,14 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 +157 0x247C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA @@ -60591,32 +7191,32 @@ 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -60625,22 +7225,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -60674,24 +7274,24 @@ 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03FC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0014 //RX_SPK_VOL +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -60816,7 +7416,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0039 //RX_SPK_VOL +286 0x004D //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -60915,7 +7515,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0054 //RX_SPK_VOL +286 0x0073 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -61014,7 +7614,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0085 //RX_SPK_VOL +286 0x00A2 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -61113,7 +7713,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x00C7 //RX_SPK_VOL +286 0x00E5 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -61138,7 +7738,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0134 //RX_TDDRC_DRC_GAIN +281 0x017B //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8458 //RX_FDEQ_GAIN_0 197 0x4B4B //RX_FDEQ_GAIN_1 @@ -61212,7 +7812,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL +286 0x00A2 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -61239,21 +7839,21 @@ 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01EE //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x8464 //RX_FDEQ_GAIN_0 -197 0x5150 //RX_FDEQ_GAIN_1 -198 0x555C //RX_FDEQ_GAIN_2 -199 0x6E75 //RX_FDEQ_GAIN_3 -200 0x8077 //RX_FDEQ_GAIN_4 -201 0x756D //RX_FDEQ_GAIN_5 -202 0x6667 //RX_FDEQ_GAIN_6 -203 0x6D68 //RX_FDEQ_GAIN_7 -204 0x5E6A //RX_FDEQ_GAIN_8 -205 0x6668 //RX_FDEQ_GAIN_9 -206 0x645A //RX_FDEQ_GAIN_10 -207 0x5A5E //RX_FDEQ_GAIN_11 -208 0x6A58 //RX_FDEQ_GAIN_12 -209 0x646E //RX_FDEQ_GAIN_13 -210 0x787C //RX_FDEQ_GAIN_14 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x858A //RX_FDEQ_GAIN_4 +201 0x8A86 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5460 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A56 //RX_FDEQ_GAIN_10 +207 0x575A //RX_FDEQ_GAIN_11 +208 0x624C //RX_FDEQ_GAIN_12 +209 0x5C64 //RX_FDEQ_GAIN_13 +210 0x6761 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -61336,23 +7936,23 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x03AD //RX_TDDRC_DRC_GAIN +281 0x035A //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8468 //RX_FDEQ_GAIN_0 -197 0x4F4F //RX_FDEQ_GAIN_1 -198 0x555A //RX_FDEQ_GAIN_2 -199 0x6069 //RX_FDEQ_GAIN_3 -200 0x7D86 //RX_FDEQ_GAIN_4 -201 0x8682 //RX_FDEQ_GAIN_5 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x858A //RX_FDEQ_GAIN_4 +201 0x8A86 //RX_FDEQ_GAIN_5 202 0x7461 //RX_FDEQ_GAIN_6 203 0x5352 //RX_FDEQ_GAIN_7 -204 0x5860 //RX_FDEQ_GAIN_8 +204 0x5460 //RX_FDEQ_GAIN_8 205 0x5D5F //RX_FDEQ_GAIN_9 -206 0x5A52 //RX_FDEQ_GAIN_10 -207 0x535A //RX_FDEQ_GAIN_11 -208 0x6654 //RX_FDEQ_GAIN_12 -209 0x6068 //RX_FDEQ_GAIN_13 -210 0x6F69 //RX_FDEQ_GAIN_14 +206 0x5A56 //RX_FDEQ_GAIN_10 +207 0x575A //RX_FDEQ_GAIN_11 +208 0x624C //RX_FDEQ_GAIN_12 +209 0x5C64 //RX_FDEQ_GAIN_13 +210 0x6761 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -61413,19 +8013,19 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x4B7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT @@ -61439,30 +8039,30 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS +33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF +35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 @@ -61470,28 +8070,28 @@ 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 @@ -61526,36 +8126,36 @@ 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP 129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 @@ -61565,32 +8165,32 @@ 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH @@ -61599,29 +8199,29 @@ 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 +181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK +191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 @@ -61631,50 +8231,50 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 +236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -61684,130 +8284,130 @@ 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS +311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH @@ -61815,69 +8415,69 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH +440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A @@ -61890,95 +8490,95 @@ 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG +490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 +493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH +495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR +497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT +505 0x7FFF //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC +509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH +528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N @@ -61990,17 +8590,17 @@ 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 +572 0x5048 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -62009,22 +8609,22 @@ 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -62034,24 +8634,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -62059,23 +8659,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -62083,22 +8683,22 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -62108,23 +8708,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -62157,22 +8757,22 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -62183,33 +8783,33 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -62234,16 +8834,16 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 @@ -62251,10 +8851,10 @@ 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT @@ -62264,52 +8864,52 @@ 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD +846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN +863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -64083,19 +10683,19 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-TTY_HCO-RESERVE2-SWB +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00F3 //TX_PATCH_REG +3 0x6F75 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT @@ -64109,30 +10709,30 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS +33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF +35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 @@ -64140,28 +10740,28 @@ 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 @@ -64196,36 +10796,36 @@ 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 @@ -64235,32 +10835,32 @@ 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0600 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0300 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH @@ -64269,82 +10869,82 @@ 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 +181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK +191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x6D60 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0708 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 +247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -64354,130 +10954,130 @@ 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x4000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS +311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH @@ -64485,69 +11085,69 @@ 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L +397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH +440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A @@ -64560,95 +11160,95 @@ 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG +490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 +493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH +495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR +497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT +505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH +528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N @@ -64657,20 +11257,20 @@ 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C5C //TX_FDEQ_GAIN_12 +580 0x5C6E //TX_FDEQ_GAIN_13 +581 0x687E //TX_FDEQ_GAIN_14 +582 0x8890 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -64679,22 +11279,22 @@ 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -64704,7 +11304,7 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 @@ -64729,23 +11329,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -64753,7 +11353,2677 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x13F4 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x01C2 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7918 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x3A98 //TX_DTD_THR1_MICMUTE_2 +914 0x32C8 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_AMS_RESRV_01 +944 0xE4A8 //TX_AMS_RESRV_02 +945 0x1770 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x007C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0B50 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0073 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00E5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017B //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01EE //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x007C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0B50 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0054 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0085 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00C7 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0134 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01EE //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8464 //RX_FDEQ_GAIN_0 +197 0x5150 //RX_FDEQ_GAIN_1 +198 0x555C //RX_FDEQ_GAIN_2 +199 0x6E75 //RX_FDEQ_GAIN_3 +200 0x8077 //RX_FDEQ_GAIN_4 +201 0x756D //RX_FDEQ_GAIN_5 +202 0x6667 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03AD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F4F //RX_FDEQ_GAIN_1 +198 0x555A //RX_FDEQ_GAIN_2 +199 0x6069 //RX_FDEQ_GAIN_3 +200 0x7D86 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5860 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A52 //RX_FDEQ_GAIN_10 +207 0x535A //RX_FDEQ_GAIN_11 +208 0x6654 //RX_FDEQ_GAIN_12 +209 0x6068 //RX_FDEQ_GAIN_13 +210 0x6F69 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B74 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 @@ -64778,23 +14048,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -64827,22 +14097,22 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 @@ -64853,33 +14123,33 @@ 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -64904,16 +14174,16 @@ 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 @@ -64921,10 +14191,10 @@ 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT @@ -64934,52 +14204,52 @@ 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD +846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN +863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL @@ -65051,7 +14321,13357 @@ 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x247C //RX_RECVFUNC_MODE_0 +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00F3 //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0600 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0300 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x6D60 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0708 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x7FFF //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x7FFF //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x7FFF //TX_SNRI_SUP_1 +302 0x7FFF //TX_SNRI_SUP_2 +303 0x7FFF //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x7FFF //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x0000 //TX_A_POST_FILT_0 +313 0x0000 //TX_A_POST_FILT_1 +314 0x0000 //TX_A_POST_FILT_S_0 +315 0x0000 //TX_A_POST_FILT_S_1 +316 0x0000 //TX_A_POST_FILT_S_2 +317 0x0000 //TX_A_POST_FILT_S_3 +318 0x0000 //TX_A_POST_FILT_S_4 +319 0x0000 //TX_A_POST_FILT_S_5 +320 0x0000 //TX_A_POST_FILT_S_6 +321 0x0000 //TX_A_POST_FILT_S_7 +322 0x0000 //TX_B_POST_FILT_0 +323 0x0000 //TX_B_POST_FILT_1 +324 0x0000 //TX_B_POST_FILT_2 +325 0x0000 //TX_B_POST_FILT_3 +326 0x0000 //TX_B_POST_FILT_4 +327 0x0000 //TX_B_POST_FILT_5 +328 0x0000 //TX_B_POST_FILT_6 +329 0x0000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C5C //TX_FDEQ_GAIN_12 +580 0x5C6E //TX_FDEQ_GAIN_13 +581 0x687E //TX_FDEQ_GAIN_14 +582 0x8890 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x13F4 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x01C2 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7918 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x3A98 //TX_DTD_THR1_MICMUTE_2 +914 0x32C8 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_AMS_RESRV_01 +944 0xE4A8 //TX_AMS_RESRV_02 +945 0x1770 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x007C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0B50 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0073 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00E5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017B //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01EE //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x007C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0B50 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0054 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0085 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00C7 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0134 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01EE //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8464 //RX_FDEQ_GAIN_0 +197 0x5150 //RX_FDEQ_GAIN_1 +198 0x555C //RX_FDEQ_GAIN_2 +199 0x6E75 //RX_FDEQ_GAIN_3 +200 0x8077 //RX_FDEQ_GAIN_4 +201 0x756D //RX_FDEQ_GAIN_5 +202 0x6667 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03AD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F4F //RX_FDEQ_GAIN_1 +198 0x555A //RX_FDEQ_GAIN_2 +199 0x6069 //RX_FDEQ_GAIN_3 +200 0x7D86 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5860 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A52 //RX_FDEQ_GAIN_10 +207 0x535A //RX_FDEQ_GAIN_11 +208 0x6654 //RX_FDEQ_GAIN_12 +209 0x6068 //RX_FDEQ_GAIN_13 +210 0x6F69 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B5C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00F3 //TX_PATCH_REG +3 0x6F55 //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0600 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0300 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x6D60 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0708 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C5C //TX_FDEQ_GAIN_12 +580 0x5C6E //TX_FDEQ_GAIN_13 +581 0x687E //TX_FDEQ_GAIN_14 +582 0x8890 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x13F4 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x01C2 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7918 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x3A98 //TX_DTD_THR1_MICMUTE_2 +914 0x32C8 //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x7FFF //TX_MIC1MUTE_RATIO_THR +940 0x0001 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_AMS_RESRV_01 +944 0xE4A8 //TX_AMS_RESRV_02 +945 0x1770 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x007C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x847C //RX_FDEQ_GAIN_0 +40 0x5A56 //RX_FDEQ_GAIN_1 +41 0x6266 //RX_FDEQ_GAIN_2 +42 0x6E7A //RX_FDEQ_GAIN_3 +43 0x8678 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x706E //RX_FDEQ_GAIN_6 +46 0x6C64 //RX_FDEQ_GAIN_7 +47 0x5C6A //RX_FDEQ_GAIN_8 +48 0x6268 //RX_FDEQ_GAIN_9 +49 0x6462 //RX_FDEQ_GAIN_10 +50 0x646E //RX_FDEQ_GAIN_11 +51 0x6860 //RX_FDEQ_GAIN_12 +52 0x646A //RX_FDEQ_GAIN_13 +53 0x7478 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0105 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x0CE0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03FC //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0B50 //RX_MAX_G_FP +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0073 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0100 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00E5 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x19C0 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x017B //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8458 //RX_FDEQ_GAIN_0 +40 0x4B4B //RX_FDEQ_GAIN_1 +41 0x5156 //RX_FDEQ_GAIN_2 +42 0x646C //RX_FDEQ_GAIN_3 +43 0x7B73 //RX_FDEQ_GAIN_4 +44 0x6D66 //RX_FDEQ_GAIN_5 +45 0x6768 //RX_FDEQ_GAIN_6 +46 0x6D68 //RX_FDEQ_GAIN_7 +47 0x5E6A //RX_FDEQ_GAIN_8 +48 0x6668 //RX_FDEQ_GAIN_9 +49 0x645A //RX_FDEQ_GAIN_10 +50 0x5A5E //RX_FDEQ_GAIN_11 +51 0x6A58 //RX_FDEQ_GAIN_12 +52 0x646E //RX_FDEQ_GAIN_13 +53 0x787C //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x00A2 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01EE //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x6000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0006 //RX_TDDRC_THRD_1 +114 0x0340 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x0000 //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x8468 //RX_FDEQ_GAIN_0 +40 0x4F57 //RX_FDEQ_GAIN_1 +41 0x5952 //RX_FDEQ_GAIN_2 +42 0x5C69 //RX_FDEQ_GAIN_3 +43 0x858A //RX_FDEQ_GAIN_4 +44 0x8A86 //RX_FDEQ_GAIN_5 +45 0x7461 //RX_FDEQ_GAIN_6 +46 0x5352 //RX_FDEQ_GAIN_7 +47 0x5460 //RX_FDEQ_GAIN_8 +48 0x5D5F //RX_FDEQ_GAIN_9 +49 0x5A56 //RX_FDEQ_GAIN_10 +50 0x575A //RX_FDEQ_GAIN_11 +51 0x624C //RX_FDEQ_GAIN_12 +52 0x5C64 //RX_FDEQ_GAIN_13 +53 0x6761 //RX_FDEQ_GAIN_14 +54 0x9898 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0301 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0205 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0410 //RX_FDEQ_BIN_6 +70 0x050A //RX_FDEQ_BIN_7 +71 0x0B07 //RX_FDEQ_BIN_8 +72 0x120E //RX_FDEQ_BIN_9 +73 0x100E //RX_FDEQ_BIN_10 +74 0x0E2D //RX_FDEQ_BIN_11 +75 0x1923 //RX_FDEQ_BIN_12 +76 0x151E //RX_FDEQ_BIN_13 +77 0x1E2D //RX_FDEQ_BIN_14 +78 0x2D40 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x007C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03FC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0B50 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0054 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0085 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x00C7 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x19C0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0134 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8458 //RX_FDEQ_GAIN_0 +197 0x4B4B //RX_FDEQ_GAIN_1 +198 0x5156 //RX_FDEQ_GAIN_2 +199 0x646C //RX_FDEQ_GAIN_3 +200 0x7B73 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x6768 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01EE //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8464 //RX_FDEQ_GAIN_0 +197 0x5150 //RX_FDEQ_GAIN_1 +198 0x555C //RX_FDEQ_GAIN_2 +199 0x6E75 //RX_FDEQ_GAIN_3 +200 0x8077 //RX_FDEQ_GAIN_4 +201 0x756D //RX_FDEQ_GAIN_5 +202 0x6667 //RX_FDEQ_GAIN_6 +203 0x6D68 //RX_FDEQ_GAIN_7 +204 0x5E6A //RX_FDEQ_GAIN_8 +205 0x6668 //RX_FDEQ_GAIN_9 +206 0x645A //RX_FDEQ_GAIN_10 +207 0x5A5E //RX_FDEQ_GAIN_11 +208 0x6A58 //RX_FDEQ_GAIN_12 +209 0x646E //RX_FDEQ_GAIN_13 +210 0x787C //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0006 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03AD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F4F //RX_FDEQ_GAIN_1 +198 0x555A //RX_FDEQ_GAIN_2 +199 0x6069 //RX_FDEQ_GAIN_3 +200 0x7D86 //RX_FDEQ_GAIN_4 +201 0x8682 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5860 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A52 //RX_FDEQ_GAIN_10 +207 0x535A //RX_FDEQ_GAIN_11 +208 0x6654 //RX_FDEQ_GAIN_12 +209 0x6068 //RX_FDEQ_GAIN_13 +210 0x6F69 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B54 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0A19 //TX_PGA_0 +28 0x0A19 //TX_PGA_1 +29 0x0A19 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x5048 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x5B5B //TX_FDEQ_GAIN_10 +578 0x737B //TX_FDEQ_GAIN_11 +579 0x7B9A //TX_FDEQ_GAIN_12 +580 0x9AC4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484B //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x484C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4C //TX_PREEQ_GAIN_MIC0_11 +629 0x4038 //TX_PREEQ_GAIN_MIC0_12 +630 0x3838 //TX_PREEQ_GAIN_MIC0_13 +631 0x4840 //TX_PREEQ_GAIN_MIC0_14 +632 0x3848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0FDA //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x065B //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0025 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0034 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x004D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x03C3 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4850 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5640 //RX_FDEQ_GAIN_10 +50 0x4040 //RX_FDEQ_GAIN_11 +51 0x5C58 //RX_FDEQ_GAIN_12 +52 0x5C60 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE2-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x00F3 //TX_PATCH_REG +3 0x6F7D //TX_SENDFUNC_MODE_0 +4 0x0000 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x0096 //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0600 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0260 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0300 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x6D60 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x09C4 //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0708 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF600 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0000 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x001A //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x001A //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x001A //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x2000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x2000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x2000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x4000 //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x01F4 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x2000 //TX_DT_BINVAD_TH_3 +357 0x07D0 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x300C //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0005 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_BVE_NOISE_FLOOR_0 +553 0x0070 //TX_BVE_NOISE_FLOOR_1 +554 0x0070 //TX_BVE_NOISE_FLOOR_2 +555 0x0010 //TX_BVE_NOISE_FLOOR_3 +556 0x0070 //TX_BVE_NOISE_FLOOR_4 +557 0x00B0 //TX_BVE_NOISE_FLOOR_5 +558 0x0E66 //TX_BVE_NOISE_FLOOR_6 +559 0x0050 //TX_BVE_NOISE_FLOOR_7 +560 0x770A //TX_BVE_NOISE_FLOOR_8 +561 0x0000 //TX_BVE_NOISE_FLOOR_9 +562 0x0000 //TX_BVE_IN_N +563 0x0000 //TX_BVE_OUT_N +564 0x0000 //TX_BVE_MICALPHA_DOWN +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4E60 //TX_FDEQ_GAIN_6 +574 0x5C52 //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C50 //TX_FDEQ_GAIN_12 +580 0x5466 //TX_FDEQ_GAIN_13 +581 0x6076 //TX_FDEQ_GAIN_14 +582 0x8088 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x13F4 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2379 //TX_SENDFUNC_REG_MICMUTE +898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0320 //TX_MICMUTE_RATIO_THR +900 0x02B0 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x7918 //TX_DTD_THR1_MICMUTE_0 +912 0x797C //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0xFE70 //TX_MIC1MUTE_RATIO_THR +940 0x02BC //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0100 //TX_AMS_RESRV_01 +944 0x3B38 //TX_AMS_RESRV_02 +945 0x7E2C //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x047C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -65902,14 +28522,14 @@ 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 -157 0x027C //RX_RECVFUNC_MODE_0 +157 0x047C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 -164 0x6000 //RX_TDDRC_ALPHA_UP_2 +164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA @@ -65931,32 +28551,32 @@ 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +186 0x6000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4850 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4860 //RX_FDEQ_GAIN_8 -205 0x7468 //RX_FDEQ_GAIN_9 -206 0x6060 //RX_FDEQ_GAIN_10 -207 0x6060 //RX_FDEQ_GAIN_11 -208 0x5C54 //RX_FDEQ_GAIN_12 -209 0x5450 //RX_FDEQ_GAIN_13 -210 0x5050 //RX_FDEQ_GAIN_14 -211 0x5860 //RX_FDEQ_GAIN_15 +196 0x847C //RX_FDEQ_GAIN_0 +197 0x5A56 //RX_FDEQ_GAIN_1 +198 0x6266 //RX_FDEQ_GAIN_2 +199 0x6E7A //RX_FDEQ_GAIN_3 +200 0x8678 //RX_FDEQ_GAIN_4 +201 0x6D66 //RX_FDEQ_GAIN_5 +202 0x706E //RX_FDEQ_GAIN_6 +203 0x6C64 //RX_FDEQ_GAIN_7 +204 0x5C6A //RX_FDEQ_GAIN_8 +205 0x6268 //RX_FDEQ_GAIN_9 +206 0x6462 //RX_FDEQ_GAIN_10 +207 0x646E //RX_FDEQ_GAIN_11 +208 0x6860 //RX_FDEQ_GAIN_12 +209 0x646A //RX_FDEQ_GAIN_13 +210 0x7478 //RX_FDEQ_GAIN_14 +211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 @@ -65965,22 +28585,22 @@ 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 +220 0x0301 //RX_FDEQ_BIN_0 +221 0x0105 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 -225 0x0308 //RX_FDEQ_BIN_5 -226 0x0808 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0410 //RX_FDEQ_BIN_6 +227 0x050A //RX_FDEQ_BIN_7 +228 0x0B07 //RX_FDEQ_BIN_8 +229 0x120E //RX_FDEQ_BIN_9 +230 0x100E //RX_FDEQ_BIN_10 +231 0x0E2D //RX_FDEQ_BIN_11 +232 0x1923 //RX_FDEQ_BIN_12 +233 0x151E //RX_FDEQ_BIN_13 +234 0x1E2D //RX_FDEQ_BIN_14 +235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 @@ -66014,24 +28634,24 @@ 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX -269 0x0002 //RX_TDDRC_THRD_0 -270 0x0004 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x7EB8 //RX_TDDRC_SLANT_0 -274 0x2500 //RX_TDDRC_SLANT_1 +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x0340 //RX_TDDRC_THRD_2 +272 0x0CE0 //RX_TDDRC_THRD_3 +273 0x0000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0550 //RX_TDDRC_DRC_GAIN +281 0x03FC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x0014 //RX_SPK_VOL +283 0x13E0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x1000 //RX_MAX_G_FP +286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH @@ -66156,7 +28776,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0039 //RX_SPK_VOL +286 0x004D //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -66255,7 +28875,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0054 //RX_SPK_VOL +286 0x0073 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -66354,7 +28974,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0085 //RX_SPK_VOL +286 0x00A2 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -66453,7 +29073,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x00C7 //RX_SPK_VOL +286 0x00E5 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -66478,7 +29098,7 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x0134 //RX_TDDRC_DRC_GAIN +281 0x017B //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8458 //RX_FDEQ_GAIN_0 197 0x4B4B //RX_FDEQ_GAIN_1 @@ -66552,7 +29172,7 @@ 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL +286 0x00A2 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -66579,21 +29199,21 @@ 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01EE //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM -196 0x8464 //RX_FDEQ_GAIN_0 -197 0x5150 //RX_FDEQ_GAIN_1 -198 0x555C //RX_FDEQ_GAIN_2 -199 0x6E75 //RX_FDEQ_GAIN_3 -200 0x8077 //RX_FDEQ_GAIN_4 -201 0x756D //RX_FDEQ_GAIN_5 -202 0x6667 //RX_FDEQ_GAIN_6 -203 0x6D68 //RX_FDEQ_GAIN_7 -204 0x5E6A //RX_FDEQ_GAIN_8 -205 0x6668 //RX_FDEQ_GAIN_9 -206 0x645A //RX_FDEQ_GAIN_10 -207 0x5A5E //RX_FDEQ_GAIN_11 -208 0x6A58 //RX_FDEQ_GAIN_12 -209 0x646E //RX_FDEQ_GAIN_13 -210 0x787C //RX_FDEQ_GAIN_14 +196 0x8468 //RX_FDEQ_GAIN_0 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x858A //RX_FDEQ_GAIN_4 +201 0x8A86 //RX_FDEQ_GAIN_5 +202 0x7461 //RX_FDEQ_GAIN_6 +203 0x5352 //RX_FDEQ_GAIN_7 +204 0x5460 //RX_FDEQ_GAIN_8 +205 0x5D5F //RX_FDEQ_GAIN_9 +206 0x5A56 //RX_FDEQ_GAIN_10 +207 0x575A //RX_FDEQ_GAIN_11 +208 0x624C //RX_FDEQ_GAIN_12 +209 0x5C64 //RX_FDEQ_GAIN_13 +210 0x6761 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -66676,23 +29296,23 @@ 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W -281 0x03AD //RX_TDDRC_DRC_GAIN +281 0x035A //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8468 //RX_FDEQ_GAIN_0 -197 0x4F4F //RX_FDEQ_GAIN_1 -198 0x555A //RX_FDEQ_GAIN_2 -199 0x6069 //RX_FDEQ_GAIN_3 -200 0x7D86 //RX_FDEQ_GAIN_4 -201 0x8682 //RX_FDEQ_GAIN_5 +197 0x4F57 //RX_FDEQ_GAIN_1 +198 0x5952 //RX_FDEQ_GAIN_2 +199 0x5C69 //RX_FDEQ_GAIN_3 +200 0x858A //RX_FDEQ_GAIN_4 +201 0x8A86 //RX_FDEQ_GAIN_5 202 0x7461 //RX_FDEQ_GAIN_6 203 0x5352 //RX_FDEQ_GAIN_7 -204 0x5860 //RX_FDEQ_GAIN_8 +204 0x5460 //RX_FDEQ_GAIN_8 205 0x5D5F //RX_FDEQ_GAIN_9 -206 0x5A52 //RX_FDEQ_GAIN_10 -207 0x535A //RX_FDEQ_GAIN_11 -208 0x6654 //RX_FDEQ_GAIN_12 -209 0x6068 //RX_FDEQ_GAIN_13 -210 0x6F69 //RX_FDEQ_GAIN_14 +206 0x5A56 //RX_FDEQ_GAIN_10 +207 0x575A //RX_FDEQ_GAIN_11 +208 0x624C //RX_FDEQ_GAIN_12 +209 0x5C64 //RX_FDEQ_GAIN_13 +210 0x6761 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 @@ -66753,40053 +29373,3 @@ 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x6F7D //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0100 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0200 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1800 //TX_MIN_EQ_RE_EST_7 -160 0x1800 //TX_MIN_EQ_RE_EST_8 -161 0x3000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x6000 //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0050 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7700 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7148 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x1000 //TX_ADPT_STRICT_L -222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1B58 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FF0 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x09C4 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xF200 //TX_THR_SN_EST_2 -245 0xF200 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0080 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x01A0 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x0018 //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x0800 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0800 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0015 //TX_NS_LVL_CTRL_1 -283 0x0015 //TX_NS_LVL_CTRL_2 -284 0x0012 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x000F //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x2000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x2400 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 -318 0x3000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1400 //TX_B_POST_FILT_3 -326 0x3000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7400 //TX_LAMBDA_PFILT_S_1 -341 0x7900 //TX_LAMBDA_PFILT_S_2 -342 0x7000 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7900 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 -347 0x0400 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0080 //TX_C_POST_FLT_DT -359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0023 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x03ED //TX_NOISE_TH_2 -372 0x2CEC //TX_NOISE_TH_3 -373 0x4268 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x1000 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x7000 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x007A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x5000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x5250 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4A43 //TX_FDEQ_GAIN_3 -571 0x374B //TX_FDEQ_GAIN_4 -572 0x3444 //TX_FDEQ_GAIN_5 -573 0x433C //TX_FDEQ_GAIN_6 -574 0x3A37 //TX_FDEQ_GAIN_7 -575 0x2A2A //TX_FDEQ_GAIN_8 -576 0x2C2C //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0014 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4A //TX_PREEQ_GAIN_MIC1_7 -674 0x4B4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x484A //TX_PREEQ_GAIN_MIC2_6 -722 0x4B4B //TX_PREEQ_GAIN_MIC2_7 -723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 -724 0x4D50 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0708 //TX_PREEQ_BIN_MIC2_6 -746 0x090A //TX_PREEQ_BIN_MIC2_7 -747 0x0B0C //TX_PREEQ_BIN_MIC2_8 -748 0x0D0E //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x4000 //TX_TDDRC_ALPHA_UP_01 -784 0x4000 //TX_TDDRC_ALPHA_UP_02 -785 0x4000 //TX_TDDRC_ALPHA_UP_03 -786 0x4000 //TX_TDDRC_ALPHA_UP_04 -787 0x6000 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1200 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x4000 //TX_TDDRC_ALPHA_UP_00 -861 0x6000 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0DCE //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x021C //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0006 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7B70 //TX_MICMUTE_EAD_THR -909 0x4000 //TX_MICMUTE_LAMBDA_CB_NLE -910 0x4000 //TX_MICMUTE_LAMBDA_RE_EST -911 0x7EF4 //TX_DTD_THR1_MICMUTE_0 -912 0x7D00 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0000 //TX_MIC1MUTE_RATIO_THR -940 0x01F4 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0100 //TX_AMS_RESRV_01 -944 0x3BF6 //TX_AMS_RESRV_02 -945 0x7F26 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0073 //TX_PATCH_REG -3 0x6F7D //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0C00 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6C00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x6000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP -169 0x02A0 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0088 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x6D60 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x05DC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1194 //TX_RATIO_DT_L_TH_HIGH -226 0x4A38 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x07D0 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF200 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x2000 //TX_SNRI_SUP_1 -302 0x2000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x2000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x2000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7800 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x05DC //TX_DT_BINVAD_ENDF -358 0x2000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x0320 //TX_NOISE_TH_1 -371 0x0230 //TX_NOISE_TH_2 -372 0x2CEC //TX_NOISE_TH_3 -373 0x3E80 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x7999 //TX_RATIODTL_CUT_TH -383 0x0119 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x7FFF //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x4000 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0005 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x5048 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4A4F //TX_FDEQ_GAIN_2 -570 0x4E48 //TX_FDEQ_GAIN_3 -571 0x4444 //TX_FDEQ_GAIN_4 -572 0x444B //TX_FDEQ_GAIN_5 -573 0x5152 //TX_FDEQ_GAIN_6 -574 0x584F //TX_FDEQ_GAIN_7 -575 0x4950 //TX_FDEQ_GAIN_8 -576 0x4C48 //TX_FDEQ_GAIN_9 -577 0x3D40 //TX_FDEQ_GAIN_10 -578 0x4240 //TX_FDEQ_GAIN_11 -579 0x4C4C //TX_FDEQ_GAIN_12 -580 0x4C4C //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0F10 //TX_FDEQ_BIN_10 -602 0x1011 //TX_FDEQ_BIN_11 -603 0x1112 //TX_FDEQ_BIN_12 -604 0x120B //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0F10 //TX_PREEQ_BIN_MIC0_10 -652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1112 //TX_PREEQ_BIN_MIC0_12 -654 0x120B //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 -676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 -677 0x5052 //TX_PREEQ_GAIN_MIC1_11 -678 0x5454 //TX_PREEQ_GAIN_MIC1_12 -679 0x5454 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x484A //TX_PREEQ_GAIN_MIC2_3 -719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 -720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 -721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 -722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 -723 0x5050 //TX_PREEQ_GAIN_MIC2_8 -724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5252 //TX_PREEQ_GAIN_MIC2_10 -726 0x5253 //TX_PREEQ_GAIN_MIC2_11 -727 0x5454 //TX_PREEQ_GAIN_MIC2_12 -728 0x5454 //TX_PREEQ_GAIN_MIC2_13 -729 0x5455 //TX_PREEQ_GAIN_MIC2_14 -730 0x5555 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0808 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1200 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x10CA //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0276 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7DC8 //TX_DTD_THR1_MICMUTE_0 -912 0x7FFF //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x00B0 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0xFC18 //TX_MIC1MUTE_RATIO_THR -940 0x026C //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0100 //TX_AMS_RESRV_01 -944 0xE4A8 //TX_AMS_RESRV_02 -945 0x7EF4 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x00F3 //TX_PATCH_REG -3 0x6F7D //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0400 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0600 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x7FFF //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0260 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0300 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x6D60 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x09C4 //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x0708 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x001A //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 -291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 -293 0x0020 //TX_MIN_GAIN_S_4 -294 0x0020 //TX_MIN_GAIN_S_5 -295 0x0020 //TX_MIN_GAIN_S_6 -296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x2000 //TX_SNRI_SUP_1 -302 0x2000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x2000 //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x2000 //TX_A_POST_FILT_S_3 -318 0x7FFF //TX_A_POST_FILT_S_4 -319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7F00 //TX_LAMBDA_PFILT -339 0x7F00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7F00 //TX_LAMBDA_PFILT_S_2 -342 0x7F00 //TX_LAMBDA_PFILT_S_3 -343 0x7F00 //TX_LAMBDA_PFILT_S_4 -344 0x7F00 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x01F4 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0040 //TX_DT_BINVAD_TH_0 -354 0x0040 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x2000 //TX_DT_BINVAD_TH_3 -357 0x07D0 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x300C //TX_NOISE_TH_3 -373 0x2710 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x07D0 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0005 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4850 //TX_FDEQ_GAIN_2 -570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4B48 //TX_FDEQ_GAIN_4 -572 0x484E //TX_FDEQ_GAIN_5 -573 0x4E60 //TX_FDEQ_GAIN_6 -574 0x5C52 //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4E45 //TX_FDEQ_GAIN_9 -577 0x494A //TX_FDEQ_GAIN_10 -578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C50 //TX_FDEQ_GAIN_12 -580 0x5466 //TX_FDEQ_GAIN_13 -581 0x6076 //TX_FDEQ_GAIN_14 -582 0x8088 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x401E //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4849 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 -676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 -677 0x5052 //TX_PREEQ_GAIN_MIC1_11 -678 0x5354 //TX_PREEQ_GAIN_MIC1_12 -679 0x5454 //TX_PREEQ_GAIN_MIC1_13 -680 0x5653 //TX_PREEQ_GAIN_MIC1_14 -681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 -682 0x4444 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x401E //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x494B //TX_PREEQ_GAIN_MIC2_6 -722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 -723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 -724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5255 //TX_PREEQ_GAIN_MIC2_10 -726 0x5754 //TX_PREEQ_GAIN_MIC2_11 -727 0x5454 //TX_PREEQ_GAIN_MIC2_12 -728 0x544F //TX_PREEQ_GAIN_MIC2_13 -729 0x463D //TX_PREEQ_GAIN_MIC2_14 -730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0203 //TX_PREEQ_BIN_MIC2_0 -740 0x0303 //TX_PREEQ_BIN_MIC2_1 -741 0x0304 //TX_PREEQ_BIN_MIC2_2 -742 0x0405 //TX_PREEQ_BIN_MIC2_3 -743 0x0506 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0809 //TX_PREEQ_BIN_MIC2_6 -746 0x0A0A //TX_PREEQ_BIN_MIC2_7 -747 0x0C10 //TX_PREEQ_BIN_MIC2_8 -748 0x1013 //TX_PREEQ_BIN_MIC2_9 -749 0x1414 //TX_PREEQ_BIN_MIC2_10 -750 0x261E //TX_PREEQ_BIN_MIC2_11 -751 0x1E14 //TX_PREEQ_BIN_MIC2_12 -752 0x1414 //TX_PREEQ_BIN_MIC2_13 -753 0x2814 //TX_PREEQ_BIN_MIC2_14 -754 0x4022 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0003 //TX_TDDRC_THRD_0 -855 0x0004 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x13F4 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2379 //TX_SENDFUNC_REG_MICMUTE -898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x02B0 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7918 //TX_DTD_THR1_MICMUTE_0 -912 0x797C //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0xFE70 //TX_MIC1MUTE_RATIO_THR -940 0x02BC //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0100 //TX_AMS_RESRV_01 -944 0x3B38 //TX_AMS_RESRV_02 -945 0x7E2C //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0010 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0A19 //TX_PGA_0 -28 0x0A19 //TX_PGA_1 -29 0x0A19 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0018 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x50C0 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x4C00 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7A00 //TX_LAMBDA_PFILT_S_2 -342 0x7C00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x7999 //TX_RATIODTL_CUT_TH -383 0x0119 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x4000 //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x5048 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x5B5B //TX_FDEQ_GAIN_10 -578 0x737B //TX_FDEQ_GAIN_11 -579 0x7B9A //TX_FDEQ_GAIN_12 -580 0x9AC4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4849 //TX_PREEQ_GAIN_MIC0_6 -624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 -626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 -627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 -628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 -629 0x4838 //TX_PREEQ_GAIN_MIC0_12 -630 0x3858 //TX_PREEQ_GAIN_MIC0_13 -631 0x7060 //TX_PREEQ_GAIN_MIC0_14 -632 0x9870 //TX_PREEQ_GAIN_MIC0_15 -633 0x5848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4645 //TX_PREEQ_GAIN_MIC1_6 -673 0x4442 //TX_PREEQ_GAIN_MIC1_7 -674 0x4140 //TX_PREEQ_GAIN_MIC1_8 -675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 -676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 -677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 -678 0x3938 //TX_PREEQ_GAIN_MIC1_12 -679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 -680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0FDA //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_VCO-RESERVE2-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x00F3 //TX_PATCH_REG -3 0x6F7D //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0096 //TX_DIST2REF1 -22 0x0019 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0400 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0600 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x7FFF //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0260 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x0300 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x6D60 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x09C4 //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0001 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x0708 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x0001 //TX_RATIO_DT_L0_TH -228 0x7FFF //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0100 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 -283 0x0024 //TX_NS_LVL_CTRL_2 -284 0x001A //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 -286 0x0011 //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 -291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 -293 0x0020 //TX_MIN_GAIN_S_4 -294 0x0020 //TX_MIN_GAIN_S_5 -295 0x0020 //TX_MIN_GAIN_S_6 -296 0x0020 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x2000 //TX_SNRI_SUP_1 -302 0x2000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x2000 //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7FFF //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x2000 //TX_A_POST_FILT_S_3 -318 0x7FFF //TX_A_POST_FILT_S_4 -319 0x7FFF //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7F00 //TX_LAMBDA_PFILT -339 0x7F00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7F00 //TX_LAMBDA_PFILT_S_2 -342 0x7F00 //TX_LAMBDA_PFILT_S_3 -343 0x7F00 //TX_LAMBDA_PFILT_S_4 -344 0x7F00 //TX_LAMBDA_PFILT_S_5 -345 0x7F00 //TX_LAMBDA_PFILT_S_6 -346 0x7F00 //TX_LAMBDA_PFILT_S_7 -347 0x01F4 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0040 //TX_DT_BINVAD_TH_0 -354 0x0040 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x2000 //TX_DT_BINVAD_TH_3 -357 0x07D0 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x300C //TX_NOISE_TH_3 -373 0x2710 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x07D0 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0005 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x3000 //TX_DEREVERB_LF_MU -515 0x34CD //TX_DEREVERB_HF_MU -516 0x0007 //TX_DEREVERB_DELAY -517 0x0004 //TX_DEREVERB_COEF_LEN -518 0x0003 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x3A98 //TX_GSC_RTOL_TH -522 0x3A98 //TX_GSC_RTOH_TH -523 0x7E2C //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4850 //TX_FDEQ_GAIN_2 -570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4B48 //TX_FDEQ_GAIN_4 -572 0x484E //TX_FDEQ_GAIN_5 -573 0x4E60 //TX_FDEQ_GAIN_6 -574 0x5C52 //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4E45 //TX_FDEQ_GAIN_9 -577 0x494A //TX_FDEQ_GAIN_10 -578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C50 //TX_FDEQ_GAIN_12 -580 0x5466 //TX_FDEQ_GAIN_13 -581 0x6076 //TX_FDEQ_GAIN_14 -582 0x8088 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x401E //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4849 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 -676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 -677 0x5052 //TX_PREEQ_GAIN_MIC1_11 -678 0x5354 //TX_PREEQ_GAIN_MIC1_12 -679 0x5454 //TX_PREEQ_GAIN_MIC1_13 -680 0x5653 //TX_PREEQ_GAIN_MIC1_14 -681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 -682 0x4444 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x401E //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x494B //TX_PREEQ_GAIN_MIC2_6 -722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 -723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 -724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5255 //TX_PREEQ_GAIN_MIC2_10 -726 0x5754 //TX_PREEQ_GAIN_MIC2_11 -727 0x5454 //TX_PREEQ_GAIN_MIC2_12 -728 0x544F //TX_PREEQ_GAIN_MIC2_13 -729 0x463D //TX_PREEQ_GAIN_MIC2_14 -730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0203 //TX_PREEQ_BIN_MIC2_0 -740 0x0303 //TX_PREEQ_BIN_MIC2_1 -741 0x0304 //TX_PREEQ_BIN_MIC2_2 -742 0x0405 //TX_PREEQ_BIN_MIC2_3 -743 0x0506 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0809 //TX_PREEQ_BIN_MIC2_6 -746 0x0A0A //TX_PREEQ_BIN_MIC2_7 -747 0x0C10 //TX_PREEQ_BIN_MIC2_8 -748 0x1013 //TX_PREEQ_BIN_MIC2_9 -749 0x1414 //TX_PREEQ_BIN_MIC2_10 -750 0x261E //TX_PREEQ_BIN_MIC2_11 -751 0x1E14 //TX_PREEQ_BIN_MIC2_12 -752 0x1414 //TX_PREEQ_BIN_MIC2_13 -753 0x2814 //TX_PREEQ_BIN_MIC2_14 -754 0x4022 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0003 //TX_TDDRC_THRD_0 -855 0x0004 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x13F4 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2379 //TX_SENDFUNC_REG_MICMUTE -898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 -899 0x0320 //TX_MICMUTE_RATIO_THR -900 0x02B0 //TX_MICMUTE_AMP_THR -901 0x0000 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE -906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x7918 //TX_DTD_THR1_MICMUTE_0 -912 0x797C //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0xFE70 //TX_MIC1MUTE_RATIO_THR -940 0x02BC //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0100 //TX_AMS_RESRV_01 -944 0x3B38 //TX_AMS_RESRV_02 -945 0x7E2C //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x2040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-TTY_FULL-RESERVE2-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0000 //TX_PATCH_REG -3 0x0200 //TX_SENDFUNC_MODE_0 -4 0x0000 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x0078 //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0302 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0000 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0000 //TX_MICS_OF_PAIR0 -38 0x0000 //TX_MICS_OF_PAIR1 -39 0x0000 //TX_MICS_OF_PAIR2 -40 0x0000 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0003 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x0000 //TX_HD_BIN_MASK -53 0x0000 //TX_HD_SUBAND_MASK -54 0x0000 //TX_HD_FRAME_AVG_MASK -55 0x0000 //TX_HD_MIN_FRQ -56 0x0000 //TX_HD_ALPHA_PSD -57 0x0000 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0x0000 //TX_T_PSDVAT -63 0x0000 //TX_CNT -64 0x0000 //TX_ANTI_HOWL_GAIN -65 0x0000 //TX_MICFORBFMARK_0 -66 0x0000 //TX_MICFORBFMARK_1 -67 0x0000 //TX_MICFORBFMARK_2 -68 0x0000 //TX_MICFORBFMARK_3 -69 0x0000 //TX_MICFORBFMARK_4 -70 0x0000 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x0000 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x0000 //TX_ADCS_GAIN -112 0x0000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x7FFF //TX_BLMIC_BLKFACTOR -116 0x7FFF //TX_BRMIC_BLKFACTOR -117 0x000A //TX_MICBLK_START_BIN -118 0x0041 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x0000 //TX_FE_ENER_TH_MTS -124 0x0000 //TX_FE_ENER_TH_EXP -125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x0000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0020 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7800 //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6000 //TX_THR_PITCH_DET_2 -133 0x0000 //TX_PITCH_BFR_LEN -134 0x0000 //TX_SBD_PITCH_DET -135 0x0000 //TX_TD_AEC_L -136 0x0000 //TX_MU0_UNP_TD_AEC -137 0x0000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x2000 //TX_AEC_REF_GAIN_0 -148 0x2000 //TX_AEC_REF_GAIN_1 -149 0x2000 //TX_AEC_REF_GAIN_2 -150 0x4000 //TX_EAD_THR -151 0x0200 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0100 //TX_MIN_EQ_RE_EST_3 -156 0x0100 //TX_MIN_EQ_RE_EST_4 -157 0x0100 //TX_MIN_EQ_RE_EST_5 -158 0x0100 //TX_MIN_EQ_RE_EST_6 -159 0x0100 //TX_MIN_EQ_RE_EST_7 -160 0x0100 //TX_MIN_EQ_RE_EST_8 -161 0x0100 //TX_MIN_EQ_RE_EST_9 -162 0x0100 //TX_MIN_EQ_RE_EST_10 -163 0x0100 //TX_MIN_EQ_RE_EST_11 -164 0x0100 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x0000 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0008 //TX_SE_HOLD_N -170 0x0050 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x0000 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x0000 //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0000 //TX_FRQ_LIN_LEN -184 0x0000 //TX_FRQ_AEC_LEN_RHO -185 0x0000 //TX_MU0_UNP_FRQ_AEC -186 0x0000 //TX_MU0_PTD_FRQ_AEC -187 0x0000 //TX_MINENOISETH -188 0x0000 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x0000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7333 //TX_DTD_THR1_0 -198 0x7333 //TX_DTD_THR1_1 -199 0x7333 //TX_DTD_THR1_2 -200 0x7333 //TX_DTD_THR1_3 -201 0x7333 //TX_DTD_THR1_4 -202 0x7333 //TX_DTD_THR1_5 -203 0x7333 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0400 //TX_DT_CUT_K -214 0x0000 //TX_DT_CUT_THR -215 0x0000 //TX_COMFORT_G -216 0x0000 //TX_POWER_YOUT_TH -217 0x0000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x0800 //TX_B_POST_FILT_ECHO_H -230 0x0000 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x0000 //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0000 //TX_DT_RESRV_7 -240 0x0000 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF800 //TX_THR_SN_EST_2 -245 0xF600 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0A00 //TX_N_SN_EST -267 0x0000 //TX_INBEAM_T -268 0x0000 //TX_INBEAMHOLDT -269 0x1FFF //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0000 //TX_B_POST_FLT_0 -280 0x0000 //TX_B_POST_FLT_1 -281 0x001A //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x000C //TX_NS_LVL_CTRL_3 -285 0x000C //TX_NS_LVL_CTRL_4 -286 0x000C //TX_NS_LVL_CTRL_5 -287 0x001A //TX_NS_LVL_CTRL_6 -288 0x000C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0014 //TX_MIN_GAIN_S_1 -291 0x0014 //TX_MIN_GAIN_S_2 -292 0x0014 //TX_MIN_GAIN_S_3 -293 0x0014 //TX_MIN_GAIN_S_4 -294 0x0014 //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x0000 //TX_NMOS_SUP -298 0x0064 //TX_NS_MAX_PRI_SNR_TH -299 0x7FFF //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x1200 //TX_THR_LFNS -309 0x0147 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x7FFF //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x7FFF //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x6666 //TX_A_POST_FILT_S_3 -318 0x6666 //TX_A_POST_FILT_S_4 -319 0x6666 //TX_A_POST_FILT_S_5 -320 0x199A //TX_A_POST_FILT_S_6 -321 0x6666 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7E00 //TX_LAMBDA_PFILT_S_0 -340 0x7E00 //TX_LAMBDA_PFILT_S_1 -341 0x7E00 //TX_LAMBDA_PFILT_S_2 -342 0x7E00 //TX_LAMBDA_PFILT_S_3 -343 0x7E00 //TX_LAMBDA_PFILT_S_4 -344 0x7E00 //TX_LAMBDA_PFILT_S_5 -345 0x7E00 //TX_LAMBDA_PFILT_S_6 -346 0x7E00 //TX_LAMBDA_PFILT_S_7 -347 0x0010 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x0000 //TX_K_PEPPER_HF -350 0x0000 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0000 //TX_DT_BINVAD_TH_0 -354 0x0000 //TX_DT_BINVAD_TH_1 -355 0x0000 //TX_DT_BINVAD_TH_2 -356 0x0000 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0001 //TX_BF_SGRAD_FLG -362 0x0000 //TX_BF_DVG_TH -363 0x0000 //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x05A0 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x1388 //TX_NOISE_TH_0_2 -369 0x3A98 //TX_NOISE_TH_0_3 -370 0x0C80 //TX_NOISE_TH_1 -371 0x0032 //TX_NOISE_TH_2 -372 0x3D54 //TX_NOISE_TH_3 -373 0x012C //TX_NOISE_TH_4 -374 0x07D0 //TX_NOISE_TH_5 -375 0x6590 //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x00C8 //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x6400 //TX_OUT_ENER_S_TH_CLEAN -385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x6400 //TX_OUT_ENER_S_TH_NOISY -387 0x6400 //TX_OUT_ENER_TH_NOISE -388 0x7D00 //TX_OUT_ENER_TH_SPEECH -389 0x0000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0000 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0000 //TX_MIN_G_LOW300HZ -401 0x0010 //TX_MAXLEVEL_CNG -402 0x0000 //TX_STN_NOISE_TH -403 0x0000 //TX_POST_MASK_SUP -404 0x0000 //TX_POST_MASK_ADJUST -405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x0226 //TX_MINENOISE_MIC0_S_TH -408 0x2879 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0080 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x2000 //TX_RHO_UPB -415 0x0020 //TX_N_HOLD_HS -416 0x0009 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0000 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x0219 //TX_THR_STD_PLH -421 0x09C4 //TX_N_HOLD_STD -422 0x0166 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x0000 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x1000 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0000 //TX_HS_VAD_BIN -435 0x0000 //TX_THR_VAD_HS -436 0x0000 //TX_MEAN_RTO_MIN_TH2 -437 0x0000 //TX_SILENCE_T -438 0x4000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x099A //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x001E //TX_DOA_VAD_THR_1 -445 0x001E //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B -453 0x005A //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C -456 0x005A //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D -459 0x005A //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0172 //TX_BF_HOLDOFF_T -473 0x8000 //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x071C //TX_DOA_TRACK_HT -477 0x0280 //TX_N1_HOLD_HF -478 0x0140 //TX_N2_HOLD_HF -479 0x2AAB //TX_BF_RESET_THR_HF -480 0x4000 //TX_DOA_SMOOTH -481 0x0000 //TX_MU_BF -482 0x0200 //TX_BF_MU_LF_B2 -483 0x0000 //TX_BF_FC_END_BIN_B2 -484 0x0000 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0000 //TX_N_DOA_SEED -488 0x0000 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x0000 //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x0000 //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x0000 //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0168 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0004 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0230 //TX_NOR_OFF_TH1 -503 0xD333 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x000A //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x6666 //TX_MICTOBFGAIN0 -513 0x0014 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x0000 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0028 //TX_SNR_THR -531 0x03E8 //TX_ENGY_THR -532 0x0000 //TX_CORR_HIGH_TH -533 0x0000 //TX_ENGY_THR_2 -534 0x0000 //TX_MEAN_RTO_THR -535 0x0000 //TX_WNS_ENOISE_MIC0_TH -536 0x0000 //TX_RATIOMICL_TH -537 0x0000 //TX_CALIG_HS -538 0x000A //TX_LVL_CTRL -539 0x0000 //TX_WIND_SUPRTO -540 0x0000 //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x0000 //TX_RATIOMICH_TH -543 0x0000 //TX_WIND_INBEAM_L_TH -544 0x0000 //TX_WIND_INBEAM_H_TH -545 0x0000 //TX_WNS_RESRV_0 -546 0x0000 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0000 //TX_BVE_NOISE_FLOOR_1 -554 0x0000 //TX_BVE_NOISE_FLOOR_2 -555 0x0000 //TX_BVE_NOISE_FLOOR_3 -556 0x0000 //TX_BVE_NOISE_FLOOR_4 -557 0x0000 //TX_BVE_NOISE_FLOOR_5 -558 0x0000 //TX_BVE_NOISE_FLOOR_6 -559 0x0000 //TX_BVE_NOISE_FLOOR_7 -560 0x0000 //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0000 //TX_FDEQ_BIN_0 -592 0x0000 //TX_FDEQ_BIN_1 -593 0x0000 //TX_FDEQ_BIN_2 -594 0x0000 //TX_FDEQ_BIN_3 -595 0x0000 //TX_FDEQ_BIN_4 -596 0x0000 //TX_FDEQ_BIN_5 -597 0x0000 //TX_FDEQ_BIN_6 -598 0x0000 //TX_FDEQ_BIN_7 -599 0x0000 //TX_FDEQ_BIN_8 -600 0x0000 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0000 //TX_PREEQ_BIN_MIC0_0 -642 0x0000 //TX_PREEQ_BIN_MIC0_1 -643 0x0000 //TX_PREEQ_BIN_MIC0_2 -644 0x0000 //TX_PREEQ_BIN_MIC0_3 -645 0x0000 //TX_PREEQ_BIN_MIC0_4 -646 0x0000 //TX_PREEQ_BIN_MIC0_5 -647 0x0000 //TX_PREEQ_BIN_MIC0_6 -648 0x0000 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0000 //TX_PREEQ_BIN_MIC1_0 -691 0x0000 //TX_PREEQ_BIN_MIC1_1 -692 0x0000 //TX_PREEQ_BIN_MIC1_2 -693 0x0000 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0000 //TX_PREEQ_BIN_MIC2_0 -740 0x0000 //TX_PREEQ_BIN_MIC2_1 -741 0x0000 //TX_PREEQ_BIN_MIC2_2 -742 0x0000 //TX_PREEQ_BIN_MIC2_3 -743 0x0000 //TX_PREEQ_BIN_MIC2_4 -744 0x0000 //TX_PREEQ_BIN_MIC2_5 -745 0x0000 //TX_PREEQ_BIN_MIC2_6 -746 0x0000 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0064 //TX_MIC_CALIBRATION_0 -766 0x006A //TX_MIC_CALIBRATION_1 -767 0x006A //TX_MIC_CALIBRATION_2 -768 0x006B //TX_MIC_CALIBRATION_3 -769 0x0048 //TX_MIC_PWR_BIAS_0 -770 0x003C //TX_MIC_PWR_BIAS_1 -771 0x003C //TX_MIC_PWR_BIAS_2 -772 0x003C //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0009 //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 -788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 -789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 -790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 -791 0x65AD //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0002 //TX_DEADMIC_SILENCE_TH -817 0x0147 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x0000 //TX_KS_NOISEPASTE_FACTOR -824 0x0000 //TX_KS_CONFIG -825 0x0000 //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x0000 //TX_A_POST_FLT_FP -835 0x0000 //TX_RTO_OUTBEAM_TH -836 0x0000 //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0000 //TX_FFP_RESRV_2 -849 0x0000 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x0E80 //TX_TDDRC_THRD_2 -857 0x3800 //TX_TDDRC_THRD_3 -858 0x2A00 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x0000 //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0000 //TX_TDDRC_SMT_W -866 0x0100 //TX_TDDRC_DRC_GAIN -867 0x0000 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x1EB8 //TX_TFMASKLTH -870 0x170A //TX_TFMASKLTHL -871 0x7FFF //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x4000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x0000 //TX_FASTNS_OUTIN_TH -884 0x0000 //TX_FASTNS_TFMASK_TH -885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 -886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 -887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x2040 //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x050D //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0000 //RX_PITCH_BFR_LEN -17 0x0000 //RX_SBD_PITCH_DET -18 0x0000 //RX_PP_RESRV_0 -19 0x0000 //RX_PP_RESRV_1 -20 0xF800 //RX_N_SN_EST -21 0x0000 //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0000 //RX_FENS_RESRV_1 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -30 0x0000 //RX_EXTRA_NS_L -31 0x0000 //RX_EXTRA_NS_A -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x0000 //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0003 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0010 //RX_MAXLEVEL_CNG -132 0x0000 //RX_BWE_UV_TH -133 0x0000 //RX_BWE_UV_TH2 -134 0x0000 //RX_BWE_UV_TH3 -135 0x0000 //RX_BWE_V_TH -136 0x0000 //RX_BWE_GAIN1_V_TH1 -137 0x0000 //RX_BWE_GAIN1_V_TH2 -138 0x0000 //RX_BWE_UV_EQ -139 0x0000 //RX_BWE_V_EQ -140 0x0000 //RX_BWE_TONE_TH -141 0x0000 //RX_BWE_UV_HOLD_T -142 0x0000 //RX_BWE_GAIN2_ALPHA -143 0x0000 //RX_BWE_GAIN3_ALPHA -144 0x0000 //RX_BWE_CUTOFF -145 0x0000 //RX_BWE_GAINFILL -146 0x0000 //RX_BWE_MAXTH_TONE -147 0x0000 //RX_BWE_EQ_0 -148 0x0000 //RX_BWE_EQ_1 -149 0x0000 //RX_BWE_EQ_2 -150 0x0000 //RX_BWE_EQ_3 -151 0x0000 //RX_BWE_EQ_4 -152 0x0000 //RX_BWE_EQ_5 -153 0x0000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -33 0xDA9E //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x0E80 //RX_TDDRC_THRD_2 -115 0x3800 //RX_TDDRC_THRD_3 -116 0x2A00 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x0000 //RX_TDDRC_HMNC_GAIN -122 0x0000 //RX_TDDRC_SMT_FLAG -123 0x0000 //RX_TDDRC_SMT_W -124 0x0100 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0000 //RX_FDEQ_BIN_0 -64 0x0000 //RX_FDEQ_BIN_1 -65 0x0000 //RX_FDEQ_BIN_2 -66 0x0000 //RX_FDEQ_BIN_3 -67 0x0000 //RX_FDEQ_BIN_4 -68 0x0000 //RX_FDEQ_BIN_5 -69 0x0000 //RX_FDEQ_BIN_6 -70 0x0000 //RX_FDEQ_BIN_7 -71 0x0000 //RX_FDEQ_BIN_8 -72 0x0000 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x0000 //RX_FDEQ_RESRV_0 -88 0x0000 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x2000 //RX_FDDRC_SLANT_1_0 -107 0x2000 //RX_FDDRC_SLANT_1_1 -108 0x2000 //RX_FDDRC_SLANT_1_2 -109 0x2000 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x0040 //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x050D //RX_PGA -168 0x7652 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0000 //RX_PITCH_BFR_LEN -174 0x0000 //RX_SBD_PITCH_DET -175 0x0000 //RX_PP_RESRV_0 -176 0x0000 //RX_PP_RESRV_1 -177 0xF800 //RX_N_SN_EST -178 0x0000 //RX_N2_SN_EST -179 0x000F //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7E00 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0000 //RX_FENS_RESRV_1 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -187 0x0000 //RX_EXTRA_NS_L -188 0x0000 //RX_EXTRA_NS_A -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x0000 //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0003 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x0080 //RX_MIN_G_FP -285 0x2000 //RX_MAX_G_FP -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0010 //RX_MAXLEVEL_CNG -289 0x0000 //RX_BWE_UV_TH -290 0x0000 //RX_BWE_UV_TH2 -291 0x0000 //RX_BWE_UV_TH3 -292 0x0000 //RX_BWE_V_TH -293 0x0000 //RX_BWE_GAIN1_V_TH1 -294 0x0000 //RX_BWE_GAIN1_V_TH2 -295 0x0000 //RX_BWE_UV_EQ -296 0x0000 //RX_BWE_V_EQ -297 0x0000 //RX_BWE_TONE_TH -298 0x0000 //RX_BWE_UV_HOLD_T -299 0x0000 //RX_BWE_GAIN2_ALPHA -300 0x0000 //RX_BWE_GAIN3_ALPHA -301 0x0000 //RX_BWE_CUTOFF -302 0x0000 //RX_BWE_GAINFILL -303 0x0000 //RX_BWE_MAXTH_TONE -304 0x0000 //RX_BWE_EQ_0 -305 0x0000 //RX_BWE_EQ_1 -306 0x0000 //RX_BWE_EQ_2 -307 0x0000 //RX_BWE_EQ_3 -308 0x0000 //RX_BWE_EQ_4 -309 0x0000 //RX_BWE_EQ_5 -310 0x0000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 -185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 -186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 -189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 -190 0xDA9E //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x0E80 //RX_TDDRC_THRD_2 -272 0x3800 //RX_TDDRC_THRD_3 -273 0x2A00 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x0000 //RX_TDDRC_HMNC_GAIN -279 0x0000 //RX_TDDRC_SMT_FLAG -280 0x0000 //RX_TDDRC_SMT_W -281 0x0100 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0000 //RX_FDEQ_BIN_0 -221 0x0000 //RX_FDEQ_BIN_1 -222 0x0000 //RX_FDEQ_BIN_2 -223 0x0000 //RX_FDEQ_BIN_3 -224 0x0000 //RX_FDEQ_BIN_4 -225 0x0000 //RX_FDEQ_BIN_5 -226 0x0000 //RX_FDEQ_BIN_6 -227 0x0000 //RX_FDEQ_BIN_7 -228 0x0000 //RX_FDEQ_BIN_8 -229 0x0000 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x0000 //RX_FDEQ_RESRV_0 -245 0x0000 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0004 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x2000 //RX_FDDRC_SLANT_1_0 -264 0x2000 //RX_FDDRC_SLANT_1_1 -265 0x2000 //RX_FDDRC_SLANT_1_2 -266 0x2000 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x7CCC //TX_THR_PITCH_DET_0 -131 0x7000 //TX_THR_PITCH_DET_1 -132 0x6333 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0010 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x1000 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x0064 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x5000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7F00 //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x2000 //TX_DTD_THR2_3 -208 0x2000 //TX_DTD_THR2_4 -209 0x2000 //TX_DTD_THR2_5 -210 0x2000 //TX_DTD_THR2_6 -211 0x4100 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x1000 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0010 //TX_EPD_OFFSET_00 -233 0x0010 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xFA00 //TX_THR_SN_EST_6 -249 0xFA00 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0000 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0000 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x0400 //TX_B_POST_FLT_0 -280 0x0400 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0010 //TX_NS_LVL_CTRL_1 -283 0x0010 //TX_NS_LVL_CTRL_2 -284 0x0010 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000D //TX_MIN_GAIN_S_0 -290 0x000D //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000D //TX_MIN_GAIN_S_3 -293 0x000D //TX_MIN_GAIN_S_4 -294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 -296 0x000D //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0014 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x1000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x4000 //TX_A_POST_FILT_S_7 -322 0x0400 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x0400 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x0FA0 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x003B //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x02BC //TX_NOISE_TH_1 -371 0x1F40 //TX_NOISE_TH_2 -372 0x4650 //TX_NOISE_TH_3 -373 0x7148 //TX_NOISE_TH_4 -374 0x044C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x0032 //TX_NOISE_TH_6 -379 0x00C8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0032 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0280 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2400 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x2000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0064 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x6048 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4844 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4040 //TX_FDEQ_GAIN_8 -576 0x3C3C //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0401 //TX_FDEQ_BIN_0 -592 0x0103 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0010 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0802 //TX_PREEQ_BIN_MIC0_7 -649 0x0000 //TX_PREEQ_BIN_MIC0_8 -650 0x0000 //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0010 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0802 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0010 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0802 //TX_PREEQ_BIN_MIC2_7 -747 0x0000 //TX_PREEQ_BIN_MIC2_8 -748 0x0000 //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x000B //TX_GAIN_LIMIT_0 -774 0x000B //TX_GAIN_LIMIT_1 -775 0x000B //TX_GAIN_LIMIT_2 -776 0x000B //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA02C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0200 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA02C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0000 //RX_SAMPLINGFREQ_SIG -160 0x0000 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0200 //RX_TDDRC_DRC_GAIN -195 0x0014 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D08 //RX_FDEQ_BIN_9 -230 0x0000 //RX_FDEQ_BIN_10 -231 0x0000 //RX_FDEQ_BIN_11 -232 0x0000 //RX_FDEQ_BIN_12 -233 0x0000 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0008 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7D83 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0019 //TX_EPD_OFFSET_00 -233 0x0019 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0102 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x00F8 //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x00DC //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x0000 //TX_NS_FP_K_METAL -411 0x7FFF //TX_NOISEDET_BOOST_TH -412 0x0000 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5850 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0302 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D07 //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1119 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0608 //TX_PREEQ_BIN_MIC0_0 -642 0x0808 //TX_PREEQ_BIN_MIC0_1 -643 0x0808 //TX_PREEQ_BIN_MIC0_2 -644 0x0808 //TX_PREEQ_BIN_MIC0_3 -645 0x0808 //TX_PREEQ_BIN_MIC0_4 -646 0x0808 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0808 //TX_PREEQ_BIN_MIC0_7 -649 0x0808 //TX_PREEQ_BIN_MIC0_8 -650 0x0808 //TX_PREEQ_BIN_MIC0_9 -651 0x0808 //TX_PREEQ_BIN_MIC0_10 -652 0x0808 //TX_PREEQ_BIN_MIC0_11 -653 0x0808 //TX_PREEQ_BIN_MIC0_12 -654 0x0808 //TX_PREEQ_BIN_MIC0_13 -655 0x0808 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0608 //TX_PREEQ_BIN_MIC1_0 -691 0x0808 //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x0808 //TX_PREEQ_BIN_MIC1_3 -694 0x0808 //TX_PREEQ_BIN_MIC1_4 -695 0x0808 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0808 //TX_PREEQ_BIN_MIC1_7 -698 0x0808 //TX_PREEQ_BIN_MIC1_8 -699 0x0808 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0808 //TX_PREEQ_BIN_MIC1_11 -702 0x0808 //TX_PREEQ_BIN_MIC1_12 -703 0x0808 //TX_PREEQ_BIN_MIC1_13 -704 0x0808 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0000 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0001 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0xA02C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x3800 //RX_THR_PITCH_DET_0 -14 0x3000 //RX_THR_PITCH_DET_1 -15 0x2800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0006 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x3000 //RX_TDDRC_ALPHA_UP_1 -7 0x3000 //RX_TDDRC_ALPHA_UP_2 -8 0x3000 //RX_TDDRC_ALPHA_UP_3 -9 0x3000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x2000 //RX_TDDRC_THRD_2 -115 0x3000 //RX_TDDRC_THRD_3 -116 0x0800 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x3000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0196 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0xA02C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0001 //RX_SAMPLINGFREQ_SIG -160 0x0001 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x4000 //RX_B_PE -170 0x3800 //RX_THR_PITCH_DET_0 -171 0x3000 //RX_THR_PITCH_DET_1 -172 0x2800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0600 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0006 //RX_NS_LVL_CTRL -180 0xF800 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x3000 //RX_TDDRC_ALPHA_UP_1 -164 0x3000 //RX_TDDRC_ALPHA_UP_2 -165 0x3000 //RX_TDDRC_ALPHA_UP_3 -166 0x3000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x2000 //RX_TDDRC_THRD_2 -272 0x3000 //RX_TDDRC_THRD_3 -273 0x0800 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x3000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0196 //RX_TDDRC_DRC_GAIN -195 0x001C //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x0E0F //RX_FDEQ_BIN_10 -231 0x0F10 //RX_FDEQ_BIN_11 -232 0x1011 //RX_FDEQ_BIN_12 -233 0x1104 //RX_FDEQ_BIN_13 -234 0x0000 //RX_FDEQ_BIN_14 -235 0x0000 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x002C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0009 //TX_OPERATION_MODE_1 -2 0x0020 //TX_PATCH_REG -3 0x6B6A //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B4C //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x6800 //TX_THR_PITCH_DET_0 -131 0x6000 //TX_THR_PITCH_DET_1 -132 0x5800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0200 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x61A8 //TX_EAD_THR -151 0x0400 //TX_THR_RE_EST -152 0x3000 //TX_MIN_EQ_RE_EST_0 -153 0x3000 //TX_MIN_EQ_RE_EST_1 -154 0x4000 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x6000 //TX_MIN_EQ_RE_EST_6 -159 0x6000 //TX_MIN_EQ_RE_EST_7 -160 0x6000 //TX_MIN_EQ_RE_EST_8 -161 0x6000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x4000 //TX_MIN_EQ_RE_EST_11 -164 0x4000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x3000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x0800 //TX_DTD_THR1_0 -198 0x0800 //TX_DTD_THR1_1 -199 0x0800 //TX_DTD_THR1_2 -200 0x0800 //TX_DTD_THR1_3 -201 0x0800 //TX_DTD_THR1_4 -202 0x0800 //TX_DTD_THR1_5 -203 0x0800 //TX_DTD_THR1_6 -204 0x0800 //TX_DTD_THR2_0 -205 0x0800 //TX_DTD_THR2_1 -206 0x0800 //TX_DTD_THR2_2 -207 0x0800 //TX_DTD_THR2_3 -208 0x0800 //TX_DTD_THR2_4 -209 0x0100 //TX_DTD_THR2_5 -210 0x0100 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x03E8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00C0 //TX_EPD_OFFSET_00 -233 0x00C0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF700 //TX_THR_SN_EST_0 -243 0xFB00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF700 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF600 //TX_THR_SN_EST_5 -248 0xF600 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0400 //TX_DELTA_THR_SN_EST_1 -252 0x0300 //TX_DELTA_THR_SN_EST_2 -253 0x0600 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0019 //TX_NS_LVL_CTRL_3 -285 0x0010 //TX_NS_LVL_CTRL_4 -286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0019 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0011 //TX_MIN_GAIN_S_6 -296 0x000C //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7000 //TX_SNRI_SUP_0 -301 0x7000 //TX_SNRI_SUP_1 -302 0x7000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0016 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x6000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x6000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x6000 //TX_A_POST_FILT_S_6 -321 0x6000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x2000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7CCD //TX_LAMBDA_PFILT -339 0x7CCD //TX_LAMBDA_PFILT_S_0 -340 0x7CCD //TX_LAMBDA_PFILT_S_1 -341 0x7CCD //TX_LAMBDA_PFILT_S_2 -342 0x7CCD //TX_LAMBDA_PFILT_S_3 -343 0x7CCD //TX_LAMBDA_PFILT_S_4 -344 0x7CCD //TX_LAMBDA_PFILT_S_5 -345 0x7CCD //TX_LAMBDA_PFILT_S_6 -346 0x7CCD //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0500 //TX_A_PEPPER -349 0x1600 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x04E8 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x02A6 //TX_NOISE_TH_1 -371 0x04B0 //TX_NOISE_TH_2 -372 0x3194 //TX_NOISE_TH_3 -373 0x0960 //TX_NOISE_TH_4 -374 0x5555 //TX_NOISE_TH_5 -375 0x3FF4 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x02BC //TX_NOISE_TH_6 -379 0x02BC //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x1482 //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x04E7 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0001 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x07F2 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x202C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0500 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000A //RX_NS_LVL_CTRL -23 0xF600 //RX_THR_SN_EST -24 0x7000 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0304 //RX_FDEQ_BIN_2 -66 0x0405 //RX_FDEQ_BIN_3 -67 0x0607 //RX_FDEQ_BIN_4 -68 0x0809 //RX_FDEQ_BIN_5 -69 0x0A0B //RX_FDEQ_BIN_6 -70 0x0C0D //RX_FDEQ_BIN_7 -71 0x0E0F //RX_FDEQ_BIN_8 -72 0x1011 //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1618 //RX_FDEQ_BIN_11 -75 0x1C1C //RX_FDEQ_BIN_12 -76 0x2020 //RX_FDEQ_BIN_13 -77 0x2020 //RX_FDEQ_BIN_14 -78 0x2011 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x202C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0004 //RX_SAMPLINGFREQ_SIG -160 0x0004 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7B02 //RX_A_HP -169 0x4000 //RX_B_PE -170 0x7800 //RX_THR_PITCH_DET_0 -171 0x7000 //RX_THR_PITCH_DET_1 -172 0x6000 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0500 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x000A //RX_NS_LVL_CTRL -180 0xF600 //RX_THR_SN_EST -181 0x7000 //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x1000 //RX_TDDRC_ALPHA_UP_1 -164 0x1000 //RX_TDDRC_ALPHA_UP_2 -165 0x1000 //RX_TDDRC_ALPHA_UP_3 -166 0x1000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x7FFF //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1200 //RX_TDDRC_THRD_2 -272 0x1900 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x6E00 //RX_TDDRC_SLANT_1 -275 0x1000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x0240 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0304 //RX_FDEQ_BIN_2 -223 0x0405 //RX_FDEQ_BIN_3 -224 0x0607 //RX_FDEQ_BIN_4 -225 0x0809 //RX_FDEQ_BIN_5 -226 0x0A0B //RX_FDEQ_BIN_6 -227 0x0C0D //RX_FDEQ_BIN_7 -228 0x0E0F //RX_FDEQ_BIN_8 -229 0x1011 //RX_FDEQ_BIN_9 -230 0x1214 //RX_FDEQ_BIN_10 -231 0x1618 //RX_FDEQ_BIN_11 -232 0x1C1C //RX_FDEQ_BIN_12 -233 0x2020 //RX_FDEQ_BIN_13 -234 0x2020 //RX_FDEQ_BIN_14 -235 0x2011 //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HEADSET-RESERVE1-RESERVE2-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 -#TX -0 0x0009 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2B68 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0001 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009B //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0B80 //TX_PGA_0 -28 0x0800 //TX_PGA_1 -29 0x0800 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0001 //TX_MIC_DATA_SRC1 -43 0x0002 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3E00 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0800 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7EFF //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x001E //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7000 //TX_EAD_THR -151 0x0800 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x0800 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x0800 //TX_MIN_EQ_RE_EST_4 -157 0x0800 //TX_MIN_EQ_RE_EST_5 -158 0x0800 //TX_MIN_EQ_RE_EST_6 -159 0x0800 //TX_MIN_EQ_RE_EST_7 -160 0x0800 //TX_MIN_EQ_RE_EST_8 -161 0x0800 //TX_MIN_EQ_RE_EST_9 -162 0x0800 //TX_MIN_EQ_RE_EST_10 -163 0x0800 //TX_MIN_EQ_RE_EST_11 -164 0x0800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x2000 //TX_LAMBDA_CB_NLE -167 0x6000 //TX_C_POST_FLT -168 0x7000 //TX_GAIN_NP -169 0x00C8 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7800 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7FFF //TX_DTD_THR1_2 -200 0x7FFF //TX_DTD_THR1_3 -201 0x7FFF //TX_DTD_THR1_4 -202 0x7FFF //TX_DTD_THR1_5 -203 0x7FFF //TX_DTD_THR1_6 -204 0x7FFF //TX_DTD_THR2_0 -205 0x7FFF //TX_DTD_THR2_1 -206 0x7FFF //TX_DTD_THR2_2 -207 0x7FFF //TX_DTD_THR2_3 -208 0x7FFF //TX_DTD_THR2_4 -209 0x7FFF //TX_DTD_THR2_5 -210 0x7FFF //TX_DTD_THR2_6 -211 0x1000 //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0BB8 //TX_DT_CUT_K -214 0x0CCD //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x00F0 //TX_EPD_OFFSET_00 -233 0x00F0 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x7FFF //TX_DTD_THR1_7 -238 0x7FFF //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xFA00 //TX_THR_SN_EST_0 -243 0xF400 //TX_THR_SN_EST_1 -244 0xF600 //TX_THR_SN_EST_2 -245 0xF400 //TX_THR_SN_EST_3 -246 0xF400 //TX_THR_SN_EST_4 -247 0xF400 //TX_THR_SN_EST_5 -248 0xF400 //TX_THR_SN_EST_6 -249 0xF600 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x6000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x000B //TX_NS_LVL_CTRL_0 -282 0x0011 //TX_NS_LVL_CTRL_1 -283 0x000F //TX_NS_LVL_CTRL_2 -284 0x000F //TX_NS_LVL_CTRL_3 -285 0x000F //TX_NS_LVL_CTRL_4 -286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000C //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000C //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x7FFF //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 -304 0x7FFF //TX_SNRI_SUP_4 -305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x000E //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x5000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x5000 //TX_A_POST_FILT_S_4 -319 0x5000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x5000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x1000 //TX_B_POST_FILT_4 -327 0x1000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x1000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7900 //TX_LAMBDA_PFILT -339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7B00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7B00 //TX_LAMBDA_PFILT_S_3 -343 0x7B00 //TX_LAMBDA_PFILT_S_4 -344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 -346 0x7B00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0800 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0000 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0383 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x00C8 //TX_NOISE_TH_2 -372 0x3A98 //TX_NOISE_TH_3 -373 0x0FA0 //TX_NOISE_TH_4 -374 0x157C //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x7FFF //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x044C //TX_NOISE_TH_6 -379 0x044C //TX_MINENOISE_TH -380 0xD508 //TX_MORENS_TFMASK_TH -381 0x0001 //TX_DRC_QUIET_FLOOR -382 0x3A98 //TX_RATIODTL_CUT_TH -383 0x0DAC //TX_DT_CUT_K1 -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x7FFF //TX_POST_MASK_SUP_HSNE -392 0x1388 //TX_TAIL_DET_TH -393 0x4000 //TX_B_LESSCUT_RTO_WTA -394 0x0000 //TX_MEL_G_R -395 0x0080 //TX_SUPHIGH_TH -396 0x0000 //TX_MASK_G_R -397 0x0002 //TX_EXTRA_NS_L -398 0x1800 //TX_C_POST_FLT_MASK -399 0x7FFF //TX_A_POST_FLT_WNS -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x02F3 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0xC000 //TX_DEREVERB_LF_MU -515 0xC000 //TX_DEREVERB_HF_MU -516 0xCCCC //TX_DEREVERB_DELAY -517 0xD999 //TX_DEREVERB_COEF_LEN -518 0x1F40 //TX_DEREVERB_DNR -519 0x0000 //TX_DEREVERB_ALPHA -520 0x0000 //TX_DEREVERB_BETA -521 0x0000 //TX_GSC_RTOL_TH -522 0x7000 //TX_GSC_RTOH_TH -523 0x0064 //TX_WIDE2_MEANHTH -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_BVE_NOISE_FLOOR_0 -553 0x0070 //TX_BVE_NOISE_FLOOR_1 -554 0x0070 //TX_BVE_NOISE_FLOOR_2 -555 0x0010 //TX_BVE_NOISE_FLOOR_3 -556 0x0070 //TX_BVE_NOISE_FLOOR_4 -557 0x00B0 //TX_BVE_NOISE_FLOOR_5 -558 0x0E66 //TX_BVE_NOISE_FLOOR_6 -559 0x0050 //TX_BVE_NOISE_FLOOR_7 -560 0x770A //TX_BVE_NOISE_FLOOR_8 -561 0x0000 //TX_BVE_NOISE_FLOOR_9 -562 0x0000 //TX_BVE_IN_N -563 0x0000 //TX_BVE_OUT_N -564 0x0000 //TX_BVE_MICALPHA_DOWN -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4868 //TX_PREEQ_GAIN_MIC0_8 -626 0x6860 //TX_PREEQ_GAIN_MIC0_9 -627 0x6048 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0E10 //TX_PREEQ_BIN_MIC0_0 -642 0x1010 //TX_PREEQ_BIN_MIC0_1 -643 0x1010 //TX_PREEQ_BIN_MIC0_2 -644 0x1010 //TX_PREEQ_BIN_MIC0_3 -645 0x1010 //TX_PREEQ_BIN_MIC0_4 -646 0x1010 //TX_PREEQ_BIN_MIC0_5 -647 0x1010 //TX_PREEQ_BIN_MIC0_6 -648 0x1010 //TX_PREEQ_BIN_MIC0_7 -649 0x1010 //TX_PREEQ_BIN_MIC0_8 -650 0x1010 //TX_PREEQ_BIN_MIC0_9 -651 0x1010 //TX_PREEQ_BIN_MIC0_10 -652 0x1010 //TX_PREEQ_BIN_MIC0_11 -653 0x1010 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 -655 0x1010 //TX_PREEQ_BIN_MIC0_14 -656 0x0200 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0E10 //TX_PREEQ_BIN_MIC1_0 -691 0x1010 //TX_PREEQ_BIN_MIC1_1 -692 0x1010 //TX_PREEQ_BIN_MIC1_2 -693 0x1010 //TX_PREEQ_BIN_MIC1_3 -694 0x1010 //TX_PREEQ_BIN_MIC1_4 -695 0x1010 //TX_PREEQ_BIN_MIC1_5 -696 0x1010 //TX_PREEQ_BIN_MIC1_6 -697 0x1010 //TX_PREEQ_BIN_MIC1_7 -698 0x1010 //TX_PREEQ_BIN_MIC1_8 -699 0x1010 //TX_PREEQ_BIN_MIC1_9 -700 0x1010 //TX_PREEQ_BIN_MIC1_10 -701 0x1010 //TX_PREEQ_BIN_MIC1_11 -702 0x1010 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 -704 0x1010 //TX_PREEQ_BIN_MIC1_14 -705 0x0200 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x000C //TX_GAIN_LIMIT_0 -774 0x000C //TX_GAIN_LIMIT_1 -775 0x000C //TX_GAIN_LIMIT_2 -776 0x000C //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x3000 //TX_TDDRC_ALPHA_UP_01 -784 0x3000 //TX_TDDRC_ALPHA_UP_02 -785 0x3000 //TX_TDDRC_ALPHA_UP_03 -786 0x3000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0000 //TX_DEADMIC_SILENCE_TH -817 0x0000 //TX_MIC_DEGRADE_TH -818 0x0000 //TX_DEADMIC_CNT -819 0x0000 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0000 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0000 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x2000 //TX_TDDRC_THRD_2 -857 0x2000 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x3000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x78D6 //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x8000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -897 0x2339 //TX_SENDFUNC_REG_MICMUTE -898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 -899 0x02BC //TX_MICMUTE_RATIO_THR -900 0x0140 //TX_MICMUTE_AMP_THR -901 0x0004 //TX_MICMUTE_HPF_IND -902 0x00C0 //TX_MICMUTE_LOG_EYR_TH -903 0x0008 //TX_MICMUTE_CVG_TIME -904 0x0008 //TX_MICMUTE_RELEASE_TIME -905 0x01FE //TX_MIC_VOLUME_MIC0MUTE -906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 -907 0x001E //TX_MICMUTE_FRQ_AEC_L -908 0x7999 //TX_MICMUTE_EAD_THR -909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE -910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST -911 0x4000 //TX_DTD_THR1_MICMUTE_0 -912 0x7000 //TX_DTD_THR1_MICMUTE_1 -913 0x7FFF //TX_DTD_THR1_MICMUTE_2 -914 0x7FFF //TX_DTD_THR1_MICMUTE_3 -915 0x6CCC //TX_DTD_THR2_MICMUTE_0 -916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 -917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 -918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 -919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 -920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 -921 0x4000 //TX_MICMUTE_C_POST_FLT -922 0x03E8 //TX_MICMUTE_DT_CUT_K -923 0x0001 //TX_MICMUTE_DT_CUT_THR -924 0x03E8 //TX_MICMUTE_DT_CUT_K2 -925 0x0001 //TX_MICMUTE_DT_CUT_THR2 -926 0x0064 //TX_MICMUTE_DT2_HOLD_N -927 0x1000 //TX_MICMUTE_RATIODTH_THCUT -928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL -929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH -930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK -931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH -932 0x0258 //TX_MICMUTE_DT_CUT_K1 -933 0x0800 //TX_MICMUTE_N2_SN_EST -934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 -935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 -936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 -937 0x7000 //TX_MICMUTE_B_POST_FILT_0 -938 0x2710 //TX_MIC1RUB_AMP_THR -939 0x0010 //TX_MIC1MUTE_RATIO_THR -940 0x0450 //TX_MIC1MUTE_AMP_THR -941 0x0008 //TX_MIC1MUTE_CVG_TIME -942 0x0008 //TX_MIC1MUTE_RELEASE_TIME -943 0x0000 //TX_AMS_RESRV_01 -944 0x0000 //TX_AMS_RESRV_02 -945 0x0000 //TX_AMS_RESRV_03 -946 0x0000 //TX_AMS_RESRV_04 -947 0x0000 //TX_AMS_RESRV_05 -948 0x0000 //TX_AMS_RESRV_06 -949 0x0000 //TX_AMS_RESRV_07 -950 0x0000 //TX_AMS_RESRV_08 -951 0x0000 //TX_AMS_RESRV_09 -952 0x0000 //TX_AMS_RESRV_10 -953 0x0000 //TX_AMS_RESRV_11 -954 0x0000 //TX_AMS_RESRV_12 -955 0x0000 //TX_AMS_RESRV_13 -956 0x0000 //TX_AMS_RESRV_14 -957 0x0000 //TX_AMS_RESRV_15 -958 0x0000 //TX_AMS_RESRV_16 -959 0x0000 //TX_AMS_RESRV_17 -960 0x0000 //TX_AMS_RESRV_18 -961 0x0000 //TX_AMS_RESRV_19 -#RX -0 0x002C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x0000 //RX_B_PE -13 0x1800 //RX_THR_PITCH_DET_0 -14 0x1000 //RX_THR_PITCH_DET_1 -15 0x0800 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0003 //RX_NS_LVL_CTRL -23 0x9000 //RX_THR_SN_EST -24 0x7CCD //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x5000 //RX_TDDRC_ALPHA_UP_1 -7 0x5000 //RX_TDDRC_ALPHA_UP_2 -8 0x5000 //RX_TDDRC_ALPHA_UP_3 -9 0x2000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x65AD //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 -118 0x5000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01C8 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4848 //RX_FDEQ_GAIN_8 -48 0x4848 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#RX 2 -157 0x002C //RX_RECVFUNC_MODE_0 -158 0x0000 //RX_RECVFUNC_MODE_1 -159 0x0003 //RX_SAMPLINGFREQ_SIG -160 0x0003 //RX_SAMPLINGFREQ_PROC -161 0x000A //RX_FRAME_SZ -162 0x0000 //RX_DELAY_OPT -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -167 0x0800 //RX_PGA -168 0x7FFF //RX_A_HP -169 0x0000 //RX_B_PE -170 0x1800 //RX_THR_PITCH_DET_0 -171 0x1000 //RX_THR_PITCH_DET_1 -172 0x0800 //RX_THR_PITCH_DET_2 -173 0x0008 //RX_PITCH_BFR_LEN -174 0x0003 //RX_SBD_PITCH_DET -175 0x0100 //RX_PP_RESRV_0 -176 0x0020 //RX_PP_RESRV_1 -177 0x0400 //RX_N_SN_EST -178 0x000C //RX_N2_SN_EST -179 0x0003 //RX_NS_LVL_CTRL -180 0x9000 //RX_THR_SN_EST -181 0x7CCD //RX_LAMBDA_PFILT -182 0x000A //RX_FENS_RESRV_0 -183 0x0190 //RX_FENS_RESRV_1 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -187 0x0002 //RX_EXTRA_NS_L -188 0x0800 //RX_EXTRA_NS_A -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -192 0x199A //RX_A_POST_FLT -193 0x0000 //RX_LMT_THRD -194 0x4000 //RX_LMT_ALPHA -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -268 0x0002 //RX_FILTINDX -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -282 0x7C00 //RX_LAMBDA_PKA_FP -283 0x2000 //RX_TPKA_FP -284 0x2000 //RX_MIN_G_FP -285 0x0080 //RX_MAX_G_FP -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -288 0x0000 //RX_MAXLEVEL_CNG -289 0x3000 //RX_BWE_UV_TH -290 0x3000 //RX_BWE_UV_TH2 -291 0x1800 //RX_BWE_UV_TH3 -292 0x1000 //RX_BWE_V_TH -293 0x04CD //RX_BWE_GAIN1_V_TH1 -294 0x0F33 //RX_BWE_GAIN1_V_TH2 -295 0x7333 //RX_BWE_UV_EQ -296 0x199A //RX_BWE_V_EQ -297 0x7333 //RX_BWE_TONE_TH -298 0x0004 //RX_BWE_UV_HOLD_T -299 0x6CCD //RX_BWE_GAIN2_ALPHA -300 0x799A //RX_BWE_GAIN3_ALPHA -301 0x001E //RX_BWE_CUTOFF -302 0x3000 //RX_BWE_GAINFILL -303 0x3200 //RX_BWE_MAXTH_TONE -304 0x2000 //RX_BWE_EQ_0 -305 0x2000 //RX_BWE_EQ_1 -306 0x2000 //RX_BWE_EQ_2 -307 0x2000 //RX_BWE_EQ_3 -308 0x2000 //RX_BWE_EQ_4 -309 0x2000 //RX_BWE_EQ_5 -310 0x2000 //RX_BWE_EQ_6 -311 0x0000 //RX_BWE_RESRV_0 -312 0x0000 //RX_BWE_RESRV_1 -313 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x000B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0013 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0020 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0036 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x005B //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0099 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -163 0x5000 //RX_TDDRC_ALPHA_UP_1 -164 0x5000 //RX_TDDRC_ALPHA_UP_2 -165 0x5000 //RX_TDDRC_ALPHA_UP_3 -166 0x2000 //RX_TDDRC_ALPHA_UP_4 -184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -190 0x65AD //RX_TDDRC_LIMITER_THRD -191 0x0800 //RX_TDDRC_LIMITER_GAIN -269 0x0000 //RX_TDDRC_THRD_0 -270 0x0000 //RX_TDDRC_THRD_1 -271 0x1A00 //RX_TDDRC_THRD_2 -272 0x1A00 //RX_TDDRC_THRD_3 -273 0x3000 //RX_TDDRC_SLANT_0 -274 0x7EB8 //RX_TDDRC_SLANT_1 -275 0x5000 //RX_TDDRC_ALPHA_UP_0 -276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -277 0x0000 //RX_TDDRC_HMNC_FLAG -278 0x199A //RX_TDDRC_HMNC_GAIN -279 0x0001 //RX_TDDRC_SMT_FLAG -280 0x0CCD //RX_TDDRC_SMT_W -281 0x01C8 //RX_TDDRC_DRC_GAIN -195 0x0020 //RX_FDEQ_SUBNUM -196 0x4848 //RX_FDEQ_GAIN_0 -197 0x4848 //RX_FDEQ_GAIN_1 -198 0x4848 //RX_FDEQ_GAIN_2 -199 0x4848 //RX_FDEQ_GAIN_3 -200 0x4848 //RX_FDEQ_GAIN_4 -201 0x4848 //RX_FDEQ_GAIN_5 -202 0x4848 //RX_FDEQ_GAIN_6 -203 0x4848 //RX_FDEQ_GAIN_7 -204 0x4848 //RX_FDEQ_GAIN_8 -205 0x4848 //RX_FDEQ_GAIN_9 -206 0x4848 //RX_FDEQ_GAIN_10 -207 0x4848 //RX_FDEQ_GAIN_11 -208 0x4848 //RX_FDEQ_GAIN_12 -209 0x4848 //RX_FDEQ_GAIN_13 -210 0x4848 //RX_FDEQ_GAIN_14 -211 0x4848 //RX_FDEQ_GAIN_15 -212 0x4848 //RX_FDEQ_GAIN_16 -213 0x4848 //RX_FDEQ_GAIN_17 -214 0x4848 //RX_FDEQ_GAIN_18 -215 0x4848 //RX_FDEQ_GAIN_19 -216 0x4848 //RX_FDEQ_GAIN_20 -217 0x4848 //RX_FDEQ_GAIN_21 -218 0x4848 //RX_FDEQ_GAIN_22 -219 0x4848 //RX_FDEQ_GAIN_23 -220 0x0202 //RX_FDEQ_BIN_0 -221 0x0203 //RX_FDEQ_BIN_1 -222 0x0303 //RX_FDEQ_BIN_2 -223 0x0304 //RX_FDEQ_BIN_3 -224 0x0405 //RX_FDEQ_BIN_4 -225 0x0506 //RX_FDEQ_BIN_5 -226 0x0708 //RX_FDEQ_BIN_6 -227 0x090A //RX_FDEQ_BIN_7 -228 0x0B0C //RX_FDEQ_BIN_8 -229 0x0D0E //RX_FDEQ_BIN_9 -230 0x1013 //RX_FDEQ_BIN_10 -231 0x1719 //RX_FDEQ_BIN_11 -232 0x1B1E //RX_FDEQ_BIN_12 -233 0x1E1E //RX_FDEQ_BIN_13 -234 0x1E28 //RX_FDEQ_BIN_14 -235 0x282C //RX_FDEQ_BIN_15 -236 0x0000 //RX_FDEQ_BIN_16 -237 0x0000 //RX_FDEQ_BIN_17 -238 0x0000 //RX_FDEQ_BIN_18 -239 0x0000 //RX_FDEQ_BIN_19 -240 0x0000 //RX_FDEQ_BIN_20 -241 0x0000 //RX_FDEQ_BIN_21 -242 0x0000 //RX_FDEQ_BIN_22 -243 0x0000 //RX_FDEQ_BIN_23 -244 0x4000 //RX_FDEQ_RESRV_0 -245 0x0320 //RX_FDEQ_RESRV_1 -246 0x0018 //RX_FDDRC_BAND_MARGIN_0 -247 0x0030 //RX_FDDRC_BAND_MARGIN_1 -248 0x0050 //RX_FDDRC_BAND_MARGIN_2 -249 0x0080 //RX_FDDRC_BAND_MARGIN_3 -250 0x0007 //RX_FDDRC_BLOCK_EXP -251 0x5000 //RX_FDDRC_THRD_2_0 -252 0x5000 //RX_FDDRC_THRD_2_1 -253 0x5000 //RX_FDDRC_THRD_2_2 -254 0x5000 //RX_FDDRC_THRD_2_3 -255 0x6400 //RX_FDDRC_THRD_3_0 -256 0x6400 //RX_FDDRC_THRD_3_1 -257 0x6400 //RX_FDDRC_THRD_3_2 -258 0x6400 //RX_FDDRC_THRD_3_3 -259 0x2000 //RX_FDDRC_SLANT_0_0 -260 0x2000 //RX_FDDRC_SLANT_0_1 -261 0x2000 //RX_FDDRC_SLANT_0_2 -262 0x2000 //RX_FDDRC_SLANT_0_3 -263 0x5333 //RX_FDDRC_SLANT_1_0 -264 0x5333 //RX_FDDRC_SLANT_1_1 -265 0x5333 //RX_FDDRC_SLANT_1_2 -266 0x5333 //RX_FDDRC_SLANT_1_3 -267 0x0000 //RX_FDDRC_RESRV_0 -286 0x0100 //RX_SPK_VOL -287 0x0000 //RX_VOL_RESRV_0 - diff --git a/audio/lynx/tuning/fortemedia/HEADSET.dat b/audio/lynx/tuning/fortemedia/HEADSET.dat index d1ceac6bb1a4ca055e47bb6fc261595c327fe012..57d9ce695995a21f4a762eeb3210a47b233a24d1 100644 GIT binary patch delta 253 zcmey>AoZ(3s$mNw*AHF^21P~*1|>!X24zNx>HgkK6}$pYj0_6Sj0_1bj0^(X4`i?~ zac!T+#I(eNSjDGW84IMQ*Bxf!*=%*;DM!0`CDV5EO6KqHh%#VV5K+pCRHoa-vhqyN s5@6xkp5?$S!oR&so&{(xNOb$JOlAfC?P{Jdf%bLAtlQTavz_q)01n4J3IG5A delta 269 zcmey>AoZ(3s$mNw*AHF=21P~%1|=X?W>lE&@6A-fso=!Okl+l&(-rJl%(tKa!B`wb zoVp8~+fTPL=1WblJIuth+3Lbmj&}1(rtRjH%-`P;XTo{T?dP0W3#6vU39#^Nx9erm z&?7}-jnwokkj5+rW)c4FUGgkIlk8$ydA9$`WLDtcuI337XkTZ{x_zB7+Zi7K>AFfo diff --git a/audio/lynx/tuning/fortemedia/HEADSET.mods b/audio/lynx/tuning/fortemedia/HEADSET.mods index 0b4feaa..0c79ac8 100644 --- a/audio/lynx/tuning/fortemedia/HEADSET.mods +++ b/audio/lynx/tuning/fortemedia/HEADSET.mods @@ -1,12 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HEADSET #SINGLE_API_VER 1.2.1 -#SAVE_TIME 2022-11-21 11:33:51 +#SAVE_TIME 2022-11-28 15:00:49 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -2675,8 +2675,8 @@ #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -5345,8 +5345,8 @@ #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -8015,8 +8015,8 @@ #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -10685,8 +10685,8 @@ #CASE_NAME HEADSET-USB_BLACKBIRD-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -13355,8 +13355,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16025,8 +16025,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -18695,8 +18695,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -21365,8 +21365,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -24035,8 +24035,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -26705,8 +26705,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -29375,8 +29375,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -32045,8 +32045,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -32337,10 +32337,10 @@ 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 +292 0x0018 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 @@ -32370,10 +32370,10 @@ 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x1000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -34715,8 +34715,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -37385,8 +37385,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -37677,10 +37677,10 @@ 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 +292 0x0018 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 @@ -37710,10 +37710,10 @@ 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x1000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -40055,8 +40055,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -42725,8 +42725,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -45395,8 +45395,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -48065,8 +48065,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -50735,8 +50735,8 @@ #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -53405,8 +53405,8 @@ #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -56075,8 +56075,8 @@ #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -58745,8 +58745,8 @@ #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -61415,8 +61415,8 @@ #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -64085,8 +64085,8 @@ #CASE_NAME HEADSET-TTY_HCO-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -66755,8 +66755,8 @@ #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -69425,8 +69425,8 @@ #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -72095,8 +72095,8 @@ #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -72387,10 +72387,10 @@ 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 +292 0x0018 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 @@ -72420,10 +72420,10 @@ 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x1000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -74765,8 +74765,8 @@ #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -77435,8 +77435,8 @@ #CASE_NAME HEADSET-TTY_VCO-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -77727,10 +77727,10 @@ 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x0020 //TX_MIN_GAIN_S_0 -290 0x0020 //TX_MIN_GAIN_S_1 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 -292 0x0020 //TX_MIN_GAIN_S_3 +292 0x0018 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 @@ -77760,10 +77760,10 @@ 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x6000 //TX_B_POST_FILT_1 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x1000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -80105,8 +80105,8 @@ #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -82775,8 +82775,8 @@ #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -85445,8 +85445,8 @@ #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -88115,8 +88115,8 @@ #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -90785,8 +90785,8 @@ #CASE_NAME HEADSET-TTY_FULL-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -93455,8 +93455,8 @@ #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -96125,8 +96125,8 @@ #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -98795,8 +98795,8 @@ #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -101465,8 +101465,8 @@ #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -104135,8 +104135,8 @@ #CASE_NAME HEADSET-RESERVE1-RESERVE2-SWB #PARAM_MODE FULL -#PARAM_TYPE TX+2RX -#TOTAL_CUSTOM_STEP 7+7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 From 97f951425c7403eaf19f8c1627b324d4fc2beb8a Mon Sep 17 00:00:00 2001 From: Jinyoung Jeong Date: Fri, 25 Nov 2022 01:30:37 +0000 Subject: [PATCH 103/124] Add system property for transfer in non-QS flow For Lynx/L10 (Pixel 7a) Bug: 245814974 Bug: 260297446 Test: manual Change-Id: I43cfb4b249f9e9e026ce5855b48b525c9f7d2450 --- device-lynx.mk | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/device-lynx.mk b/device-lynx.mk index 5bf8123..214ba87 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -252,6 +252,11 @@ PRODUCT_COPY_FILES += \ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += \ debug.sf.enable_adpf_cpu_hint=true +# The default value of this variable is false and should only be set to true when +# the device allows users to enable the seamless transfer feature. +PRODUCT_PRODUCT_PROPERTIES += \ + euicc.seamless_transfer_enabled_in_non_qs=true + ##Audio Vendor property PRODUCT_PROPERTY_OVERRIDES += \ persist.vendor.audio.cca.enabled=true From 465e6e27f8fcb3d0060b9178e0677bc78f2a2af8 Mon Sep 17 00:00:00 2001 From: timothywang Date: Mon, 14 Nov 2022 19:46:27 +0800 Subject: [PATCH 104/124] Remove the useless property persist.vendor.camera.1080P_60fps_binning_except_rear_main is not used anymore. Test: GCA Bug: 257859918 Change-Id: I0fbb2fb2ed9950bb684596166393774fe5319f81 Merged-In: I0fbb2fb2ed9950bb684596166393774fe5319f81 (cherry picked from commit 518a1291d6f1c6a805a2050c3c33d4e8e227e7f8) --- device-lynx.mk | 4 ---- 1 file changed, 4 deletions(-) diff --git a/device-lynx.mk b/device-lynx.mk index 214ba87..5cededf 100644 --- a/device-lynx.mk +++ b/device-lynx.mk @@ -229,10 +229,6 @@ PRODUCT_PROPERTY_OVERRIDES += \ PRODUCT_VENDOR_PROPERTIES += \ persist.vendor.camera.1080P_60fps_binning=true -# Limit camera 1080P 60FPS binning mode to not rear main camera -PRODUCT_VENDOR_PROPERTIES += \ - persist.vendor.camera.1080P_60fps_binning_except_rear_main=true - # Increase thread priority for nodes stop PRODUCT_VENDOR_PROPERTIES += \ persist.vendor.camera.increase_thread_priority_nodes_stop=true From 5fb6fed0a1d75c53c87b0b56b72da3b02e4b58bf Mon Sep 17 00:00:00 2001 From: David Chao Date: Mon, 28 Nov 2022 19:16:35 +0800 Subject: [PATCH 105/124] thermal: update thermal config for FCC - Change charging throttling switch-on temp from 25C to 35C Bug: 260522422 Test: ThermalHAL throttling worked properly Change-Id: Ifbf27e56203db712fa4b5e29f1e4a91671ca852c --- thermal_info_config_charge_lynx.json | 2 +- thermal_info_config_lynx.json | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/thermal_info_config_charge_lynx.json b/thermal_info_config_charge_lynx.json index c1c3240..63e35fb 100644 --- a/thermal_info_config_charge_lynx.json +++ b/thermal_info_config_charge_lynx.json @@ -114,7 +114,7 @@ "Formula":"MAXIMUM", "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], "Coefficient":[1.0, 1.0, 1.0, 1.0], - "HotThreshold":["NAN", 25.0, 39.0, 43.0, 45.0, 47.0, 55.0], + "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, "PollingDelay":300000, diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json index bcc3557..3b63011 100644 --- a/thermal_info_config_lynx.json +++ b/thermal_info_config_lynx.json @@ -275,7 +275,7 @@ "Formula":"MAXIMUM", "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"], "Coefficient":[1.0, 1.0, 1.0, 1.0], - "HotThreshold":["NAN", 25.0, 39.0, 43.0, 45.0, 47.0, 55.0], + "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0], "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9], "Multiplier":0.001, "PollingDelay":300000, From 110d6bb04351772d64a4c26eb5383d6853bce459 Mon Sep 17 00:00:00 2001 From: Yanting Yang Date: Tue, 29 Nov 2022 14:56:01 +0800 Subject: [PATCH 106/124] Update MIC e-label for JP SKU of L10 Bug: 259926917 Test: visual Change-Id: I0d6a5cb5423e94379afd177872cce738df1789fd --- .../res/drawable/regulatory_info.png | Bin 25898 -> 235399 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/lynx/overlay_packages/SettingsOverlayG82U8/res/drawable/regulatory_info.png b/lynx/overlay_packages/SettingsOverlayG82U8/res/drawable/regulatory_info.png index cfc010eabb863c8e5231659e0c1420c803c43648..cb9d27345988aeb287680283d5ace1f96670a350 100644 GIT binary patch literal 235399 zcmeEuc{Eh<8@FVO?A0Uz7J!| zZpJB#b!;pgF z{3!(mbvzvna7KhP^FHw3IWI#^HHz=Z>ubOdRQ9TRsuUCzaSW#~sDYm^xNDhu0Uy;N z|2qc@@YbWCAQfn9s2clOZO$+Unb;9%x62Wy=iku~i*=n8TD@=meUv2ntCnhAD>42G zuk`gNazpN4Z##sy>ChHZCcjCoemwN5_`}<)9QE;6+d@9DanRS@Uf1gCQ}Kc0_BMlR zRN00%v1AJ08Ejv(5gWm((oh zRsQEmio5?k$;$d)gOJ_f@qe9xY=-|gXV_ZNsBI(fx|uN)N+d(ZHDP_-$%uGR9@6zU zhV$PH4DFM`!XfYZ<*nMyE+jHp9KI7R;WBaO_^3k#gXH7k$uphLXn)24w)g>e*^6Dmw#MhwV(^(tbVswhzzt0!OmWL2F3h&<& zYT83WDua$aZ;OZ|RUs90nUwYis(&j49l56|`d8M;g(8ZK)zrKH{(WF1TOE3Z(f671 z&L4KW)1#f;XzSC~pYM-W^W#v`Va$lE`g#SgO*vXQP=FPa%Bj1T$2pM1Sh+RAAPWQ- z@;{eq6|h$DlgjJuTLfVXin%(N9rip9vOn+sj4R~S1LlNNI^AxQ2-tTx2G(e1>oYEg zbgJowAozB5c77~}ACy$O&$lv(GC4Ur|0CkDDN*bK-E%ErdcxtZ)75oe4K%7DZSNQ* zUbIpT2b}Y<;dGdMt{%<&(>ql;xIT!umm>>O?C$CLN5G+BDRf*)vex*iaof(1HIU)Zo@ zB#1X3aO;WS@^q+V}G^p$MjLT2= z+SA=0y`I;fRi7ias;7JFTCl&%S8_tEcK7xYPsE}kBSUi{9pYMNnodpvV5Rtp%$!3S zRMh>w{ZGPA>y4(so}D*6yZBN%6AhGan^(KUqX`(8=hmy*@R4h=?%w=@6KMK$SakJbwUwYt@<)zI2`n!UnvDl85w{W(yz;_*mU z-iO@O(>2f(W|h+)uG6&+5jJr?E$4>^QBB3gU0Fkc^L`%lG@{&%?rsAua~aTP$Lx)c zN^BD@+kc<3Osmn|>V0&yo-REP&-!&BK|j70JkMZ#=VoW}w^sx@hLWe{vEPJ+g?qp} zI!aV#Z~dvn#HA1<0yYGi{p&%IbC<&E=ddMn^hvV68=CWk73Fc40&%Rta%E688^+DL z%7#Lgz!%*|W-ixgi$-m}#+BPSv z`tmP=tb;22!$Pg-TB_p|ceUh6r+a-wF|(hYB2Zv`)9N0*UR>{U=kmDu2M^^&LWp2> zuVC+yA_Uliu63HzeX|0|02in*OJ!kwEJXtZIH}gazdIs7L{0imJV3*4qOXz7NC;LD z_CfIACAC@Y!h7MRA{ByT#G|pxtE!}AbGNleATfTI*~Uq5ba`%Wi#LV6dXYa}hF|9A zs%X~Qf$b7&g3g1OYyb2e!|jg;yDaPnlDPYcHu&l^N&ECM8en}pW^Px^zoAY4M%qn5 zeBd}4-gy_NbOB`4Sf(~$pqhtf6pNi}?9GCVXARMVn6{M`8`)VO2VFeX&~SXmRp?P< zoolM1u)Hqjt@Unsczu7^0PAj_BxtfgZH8j)*jtaHEVHIt^1IK8IhxvjsC+`L^#>0- zw|bo=?&^`p$Yag4S0tIYx~OnWY4|y@2YzVd*IV!v2zuwh;rt(nFV#N{(DeX`Ocm%v z$NkjXMukTwGjolfdDSyHIoE@Z|E0{_<>7fB4*0cTA4{ud?De(SUuy1a$gJB`%u=k? z^YRWTzFRu9KOeSiEV$H41_Hr3Jz1pq?J|n4XBL8hb4B>ihl5bLzJ6e9i4e}BOwad@ zcWv6j>t`BZ4K`qh1OJ zU~BVN1U@`d@#ILq9)F_2llR#M$O$@PoT`pq)Y$V-WE&iXRSCSwMtD4wlewPnd+XgBuh&*> zJDIWp=IBIlaW2SfhFNr#d!ejm)-y#bXWS}K^i>?LmOX~SZ0+@LB_OfX?GNedMflbR z692FpbbeM1L-7sKX07pgSseBGdjootdyaKAV z+9SwM?@3-md6XisPbD0OZUNcs&UCw_9YkxM=R$QDoYkF`vR}GL$a}G&mT)+&Cuwt? zJ(jT}(#AxNcJ&+=RG;?+2+VkOyS|-%ViX+?Obt;b3B?n zIj2hkGr7K9R+n0!=gK3i=G~;ksQ!5VK1Z9{K{LQfq6S$!H&dE>oc*1~*urI_tPf|? z(#`;lz7QnPW%YYoS>jw*HQNoIsc~{svURT5Wh}0+sdl({VDtD(qP}NGJuR$Ez#!YD zm0>n?3#4`z)3|tbFyFuO+*R1dPP(Xt?X!CCV#qJAIHki>AV)la;~LO)M)gd&V5}$=q?&RcLK!9?hmAk zUUMFo4(^a3Ljna0>sItx`u=Dvy%BOaX`fGQ1NEV7W=0=gp=3&Tz%!yM=2Ygy>sNW| zu+8`&*}4wT+NxNb$24r1@OyWa8eA^1L2r@ztm0+((!YN`tM^gjis~OeM?5Vr*d2VA zO{v<04^p^6fv;O^F3L4|kDCl>97AGp(Zsur*ys*wDn+Z0-=0WC&Bb5#*0SHwj}C2O z#4Gu3K7*BB7IT^-oWO~%wqfrXf@)J=w%sr4haXm9uClVWw~{wd#2=@zIMNS;W#pao z-&6e<-pHUeUF&sUmX>x}shmTZX&Tg4IgqgDuj$3?aHCfhFZN-}8!!s;n?Kr6eC9U= zbLENZ%t}ie`YN;K@V!1+*lG|1jEa?xTmh#w^wwMcRQ&C=PrpG}mPL4UB!odKjEeNP z++{C!c#oPqO^X(u;IEFc>5#uC84`%6#}?(Ngutgxu1uJ3Z_1f{ni$AMttjK3#0Cenk?28@C778E;pGZmh^U=ASJ4sx-Tn5tm5$-aYm_LAs8G9uji+|IefP7aw?#{tJjML?{ zzfo3+y%(i_0VHna(mV|WkAa6zSLHm%N=;o6VcxCnbf@2mrz@r80|9xZrM-&dR$jY6Kl}$##f7Xep!4z5pW>`1+>1V^SU)!-(+WmX2P|SQR>v*2%U9OK zF@SI=uQg15v`h!WxKD6caau0F&ycab&%ClfC0ej;&4O>Sw4l^& z*+|^(A`g>U$912P$IEUNxHQkxD;^+)QRweTT2cM&>6)9Uyzq0BUeE|EWe6J?>SR{mQsPQpM+EsqCDZo00QOrRZ1n z6Pl<3gRx{$a|Q3i2-kdjqHU{X=~jN1${W8&e*!elfj9y@=V;%;6$3(}6=1Xe_J(Du zKe)t7f&R?W68_7oa{C!0SNu-3oa&E*L+ybKuvhQhO4}|rFSw1;HFoA^m7usIWseH+ z!Eh}e9;fyYQJ{nPjFH;F$*gD&PuQwGBzL3h13_1@zM8`;w%F|X?{evL(?9wh0=PFW z+pJ!gX>dgy>n=~aZ}Og8)skVE{}eg4_+qR9SAJ{H8PH%)O9pAyh0p{xM%)rKGrj@!9>J0%W z)_ic&Jd_F=vQ4w5F(AL#A42r%>h6}%+a&z_y(aWF*gJJ?OOPe*{d4X&`&05i*HuZ^ z{SLWc$BDthv}Wq_l<08;(Py&OBOmf9GE$-KEI9fU0B+zgZ@ECHV7P&67cW>F4hM`*GvBeR54EPYKQ8cvQ}7t^-4rfYg4xZw_B zin#|D;OulLxH#1QAG*%A3v&oWiO|KIS z^C~46t!CVN)t^0+o5S?;TK(J`hA-c~b&Kd~XzY+tzpWP)=?9B$mof16u-`7|f

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zJ$KqN4#6-_L3LgQ^z~vWntYLgRmlT9yz~W4Tc%LMCV06tp7p;E`r)a8iAGb*pb0pk zOTKALdUF{9nhS6BH`3XyB}|f$kjTELe@N*9EUs9?OjIn9 z9*|(N^A^x8QWA@_kFD#i4LfL(aO}#vWVQgs8uXRmOY{xF_ayivm8o*CpKLOX*Z(!2=7Ap!;Yci(Jv5+)zslAM|a3*8`Bf7)zBOAyJ?d< zGRI|(vl%^3l+|I!^Xw^6Vx(K1z%Zayz?iOTZlBt#4)*6Z9fw8PbDX%jy;bl?i*o)E zYX9sgBReL={FwuzTg5WaccQSOzRpl5Jj9%O`1js?0k`n%CFzWF#rp||a*PamApTxa zOc?yNYhr0|VXoSkDj#>9SMjcXMj~sv&${+|QHg?g-m< zupF$cd@e)|8x7%e;31BjWxC!G{AFLF_&>%9RSxXF5-}{tZt39Mw3!^v4aDgiNT(Hr z__U+AJ!E69E@n$VFMsF5bWJ5>6Cs_4b(x}vJo5dEHAH&_?AR0{aA5Os_zvni1CuM= z$GhUIy&4HV@XihI<`K@s6$}v`8mNeJ4i==H#nldAf`$L~WwEB&Nw6s&sO?I2J6xgu zhRPgN#;9XE*O4I%ALfz_*cgVZl3ylM?Mko7>^e_Wo0n(pXXL#m)3@-=nWe>sF<{5Bi((yK(pAGZX*oQNaIif3V{J i+b?bWumA90x4#}XEt?r1n8G(u$PD$&bRS@@#QhHwD!mc_ From 1be5765f1ef0a9e268d03c68482b921d606a5526 Mon Sep 17 00:00:00 2001 From: pointerkung Date: Tue, 27 Sep 2022 20:15:10 +0800 Subject: [PATCH 107/124] Camera powerhint update Sync PMU and EM_Profile tuning changes (ag/19819352, ag/20017229) for 60fps power saving. Bug: 253411744 Test: Build pass, GCA, Camera power/performance evaluation Change-Id: I21ddc855c0eace1ad516ba1c9ccd9736fc924671 --- powerhint.json | 144 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 126 insertions(+), 18 deletions(-) diff --git a/powerhint.json b/powerhint.json index 7a0d0f7..18817dd 100644 --- a/powerhint.json +++ b/powerhint.json @@ -510,6 +510,78 @@ ], "DefaultIndex": 0 }, + { + "Name": "EM_Profile", + "Path": "/sys/kernel/pixel_em/active_profile", + "Values": [ + "default", + "cam1" + ], + "DefaultIndex": 0 + }, + { + "Name": "PMU_LIT_LCPI_THRESHOLD", + "Path": "/sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/lcpi_threshold", + "Values": [ + "2", + "0" + ], + "DefaultIndex": 0 + }, + { + "Name": "PMU_LIT_SPC_THRESHOLD", + "Path": "/sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/spc_threshold", + "Values": [ + "70", + "0" + ], + "DefaultIndex": 0 + }, + { + "Name": "PMU_MID_LCPI_THRESHOLD", + "Path": "/sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/lcpi_threshold", + "Values": [ + "6", + "3" + ], + "DefaultIndex": 0 + }, + { + "Name": "PMU_MID_SPC_THRESHOLD", + "Path": "/sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/spc_threshold", + "Values": [ + "65", + "50" + ], + "DefaultIndex": 0 + }, + { + "Name": "PMU_BIG_LIMIT_FREQ", + "Path": "/sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/limit_frequency", + "Values": [ + "2507000", + "1826000" + ], + "DefaultIndex": 0 + }, + { + "Name": "PMU_BIG_LCPI_THRESHOLD", + "Path": "/sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/lcpi_threshold", + "Values": [ + "5", + "3" + ], + "DefaultIndex": 0 + }, + { + "Name": "PMU_BIG_SPC_THRESHOLD", + "Path": "/sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/spc_threshold", + "Values": [ + "69", + "50" + ], + "DefaultIndex": 0 + }, { "Name": "Dex2oatThreads", "Path": "vendor.powerhal.dalvik.vm.dex2oat-threads", @@ -995,6 +1067,60 @@ "Duration": 0, "Value": "0" }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_POLL", + "Duration": 0, + "Value": "1" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_LIT_LCPI_THRESHOLD", + "Duration": 0, + "Value": "0" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_LIT_SPC_THRESHOLD", + "Duration": 0, + "Value": "0" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_MID_LCPI_THRESHOLD", + "Duration": 0, + "Value": "3" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_MID_SPC_THRESHOLD", + "Duration": 0, + "Value": "50" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_BIG_LIMIT_FREQ", + "Duration": 0, + "Value": "1826000" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_BIG_LCPI_THRESHOLD", + "Duration": 0, + "Value": "3" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "PMU_BIG_SPC_THRESHOLD", + "Duration": 0, + "Value": "50" + }, + { + "PowerHint": "CAMERA_STREAMING_HIGH", + "Node": "EM_Profile", + "Duration": 0, + "Value": "cam1" + }, { "PowerHint": "CAMERA_STREAMING_HIGH", "Node": "PowerHALCameraRunning", @@ -1007,30 +1133,12 @@ "Duration": 0, "Value": "1100 1078 1024" }, - { - "PowerHint": "CAMERA_STREAMING_HIGH", - "Node": "CPUMidClusterMaxFreq", - "Duration": 0, - "Value": "1491000" - }, - { - "PowerHint": "CAMERA_STREAMING_HIGH", - "Node": "CPUBigClusterMaxFreq", - "Duration": 0, - "Value": "1826000" - }, { "PowerHint": "CAMERA_STREAMING_HIGH", "Node": "CDPreferHighCap", "Duration": 0, "Value": "1" }, - { - "PowerHint": "CAMERA_STREAMING_HIGH", - "Node": "CPULittleClusterMaxFreq", - "Duration": 0, - "Value": "1401000" - }, { "PowerHint": "CAMERA_STREAMING_HIGH", "Node": "MemFreq", From da2b518a5cde8dfe9a7855d5cda29e1c554317d9 Mon Sep 17 00:00:00 2001 From: junkyukang Date: Mon, 28 Nov 2022 15:38:55 +0800 Subject: [PATCH 108/124] [L10] gps: enable GNSS PPS feature Bug: 260532637 Test: Gnss measurement elapsedrealtime work && suspend/resume work, validity test Change-Id: Iea71f2fe6bb662bec704d4f6c7b7d5b31a8e173d --- location/gps.xml.l10 | 2 ++ location/gps_user.xml.l10 | 2 ++ location/lhd.conf.l10 | 1 + location/lhd_user.conf.l10 | 1 + 4 files changed, 6 insertions(+) diff --git a/location/gps.xml.l10 b/location/gps.xml.l10 index c243cd3..61c31d9 100644 --- a/location/gps.xml.l10 +++ b/location/gps.xml.l10 @@ -61,9 +61,11 @@ ReAidingOnHotStart="false" ReAidingIntervalSec="1200" RuntimeSwLteFilterEnable="true" + PpsDevice="/sys/class/pps/pps0/assert_elapsed" /> Date: Wed, 30 Nov 2022 17:56:36 +0800 Subject: [PATCH 109/124] gps: Disable SUPL OTDOA Bug: 260816431 Test: VtsHalGnssTargetTest pass CtsLocationGnssTestCases pass PtsChreTestCases pass Change-Id: Ic228089381e51594b5e40ff3298b2e2a807ca1cd --- location/gps.xml.l10 | 1 - location/gps_user.xml.l10 | 1 - 2 files changed, 2 deletions(-) diff --git a/location/gps.xml.l10 b/location/gps.xml.l10 index 61c31d9..cb3f8ba 100644 --- a/location/gps.xml.l10 +++ b/location/gps.xml.l10 @@ -35,7 +35,6 @@ SuplVersion="2" SuplMinorVersion="0" SuplOtdoaCapable="true" - SuplOtdoaCapable2="true" SuplGlonassCapable = "true" SuplGalileoCapable = "true" SuplBdsCapable = "true" diff --git a/location/gps_user.xml.l10 b/location/gps_user.xml.l10 index 477e7f4..0724367 100644 --- a/location/gps_user.xml.l10 +++ b/location/gps_user.xml.l10 @@ -34,7 +34,6 @@ SuplVersion="2" SuplMinorVersion="0" SuplOtdoaCapable="true" - SuplOtdoaCapable2="true" SuplGlonassCapable = "true" SuplGalileoCapable = "true" SuplBdsCapable = "true" From 9ef2359c2cba3e72f4265322a6a05f719e4351dc Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Fri, 2 Dec 2022 09:34:14 +0800 Subject: [PATCH 110/124] audio: [L10] Recording tuning table update 12/01 - DVT Ver.2 For Final setting update IIR1 parameters on camcorder(6 scenarios) and IIR2 parameters on mic path(mono, stereo) for DVT stage devices on L10. this version fine tune the IIR filter and make the FR as flat as possible. Files from the latest attachment on b/261005130 Bug: 261005130 Test: verified by darrenyen@ Change-Id: Id7bd28814fd1089cd0af63b29ab6541e5fe57483 --- audio/lynx/tuning/bluenote/recording.gatf | Bin 93884 -> 93884 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/audio/lynx/tuning/bluenote/recording.gatf b/audio/lynx/tuning/bluenote/recording.gatf index 89b206515a3f0a291cfce90f996b519c36e349d5..1f4525ec290094e057463c0c01ca15c8d4a2b325 100644 GIT binary patch delta 2167 zcmd6odrVtZ9LImRFt|K~)?UWL3SF5SI94T2848@jWFr%?KF5Xv+sY^}dCWw%)~!)y ze8jEU0Wac|ItOUfg;5p?mfgESW=!g~=yY+8rRa#v;G8CI8Vz{PX~|~NAdCLtO-{b& z{?4!G-2A?u^Q(JofqQI$Jua>P1AvNWHdbl@VAq6V&3JicQ~zS^*E45c&>x<5@fmHy zCoP^gyN0g5=)(I3!j-Ok^|~<|ii(|*e!AGe^z8#pSaLm_ZwOFKUmSl!DDFr_d2HD3)Kjx2b*y3pi%9e zwxFJ?b}6LI%ya^quzDyJ8;67}z0rc+$xD#7h$g13-z zS(+7}9#$rfh5;PEjils|a0tLlY5=buU|$r#%C&Si>spm;M^%iT3-+JTgpzmg{ZXk_XrZ$JS&Kz;}ig}@S&uYRM(g1RncNbZaZrjNf{ zEh6S=bSI z**O^$t`MiqoNBr3^M{s&`T_?@42ui@snfCR|-CSQc>gdMkxRLLL28WfO*>J6D*&;Hd5eJR<=XBNP zpBw1iDi^1!IOV+Au@|!2d?G}zo5hWyMlqv3!MNIoojDI+ot|uO63st z-7JVyWrGjKzsJaKkI_c3)=y+OmU$haQcIeFk~D)n=Q*Kue_AW)J+tlp;QFI|Eg>HJ z*3Ks7p|{#bR?RGH{CVV+?B>@Ls=BQ?szdkpayMeVI)L@`VrTtZtNjhY`2TB9&h+2| z96se55so-O4im5ZND5QCUJiB!o063zF)&w^7kQ^}yYi_s2bV_xXO`j=qqN zz7T74ifsZRroDw`i4dX(6UZ}9GzXp@Zl&3Et??z^>`y6W7i(Hd%hTQulzEKXI2Wg@ zns|b~+SaZZZ|5;JJuaL%zSvonI$Xl) zN+d)QaBCOtf+5UE5*vX1zeWWdHUc9p^9o&i3e z2yfjrFs96Ch_G-**rJVX*ka+OZGq@OWCqP zsD#omF+y#q##vR2GsmaH-7q~*4A}c17_|!^=dy%Q$78zV;F~sy0hY(v9g_HAdgGym zi35wW7OWpW$94C5hEm$f^G5Qn=enAn4@R|JvvBS)r-s9mnk!)1D7@&HjCuhRBL|b? Wz>^~fz3)K-wb(x#oJz)D2j~YM?57|A From caa58b6e1e720da0faa989d0fee1fc6e42dd7064 Mon Sep 17 00:00:00 2001 From: Vic Huang Date: Tue, 29 Nov 2022 03:57:02 +0000 Subject: [PATCH 111/124] [L10]Update BT SAR tables for different SKUs/countries Bug: 259198345 Test: Manual test and RF verify pass Change-Id: I2295ba998811ffcb223782516c18a8ffea523d91 --- ...US.csv => bluetooth_power_limits_Lynx.csv} | 68 +++++++++---------- .../bluetooth_power_limits_Lynx_G0DZQ_CA.csv | 34 ++++++++++ .../bluetooth_power_limits_Lynx_G0DZQ_EU.csv | 34 ++++++++++ ... bluetooth_power_limits_Lynx_G0DZQ_JP.csv} | 68 +++++++++---------- .../bluetooth_power_limits_Lynx_G0DZQ_US.csv | 34 ++++++++++ ... bluetooth_power_limits_Lynx_G82U8_JP.csv} | 68 +++++++++---------- .../bluetooth_power_limits_Lynx_GHL1X_EU.csv | 34 ++++++++++ .../bluetooth_power_limits_Lynx_GWKK3_CA.csv | 34 ++++++++++ .../bluetooth_power_limits_Lynx_GWKK3_US.csv | 34 ++++++++++ bluetooth/qti_default.mk | 12 +++- 10 files changed, 315 insertions(+), 105 deletions(-) rename bluetooth/{bluetooth_power_limits_L10_US.csv => bluetooth_power_limits_Lynx.csv} (82%) create mode 100644 bluetooth/bluetooth_power_limits_Lynx_G0DZQ_CA.csv create mode 100644 bluetooth/bluetooth_power_limits_Lynx_G0DZQ_EU.csv rename bluetooth/{bluetooth_power_limits_L10_EU.csv => bluetooth_power_limits_Lynx_G0DZQ_JP.csv} (63%) create mode 100644 bluetooth/bluetooth_power_limits_Lynx_G0DZQ_US.csv rename bluetooth/{bluetooth_power_limits_L10_JP.csv => bluetooth_power_limits_Lynx_G82U8_JP.csv} (63%) create mode 100644 bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv create mode 100644 bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv create mode 100644 bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv diff --git a/bluetooth/bluetooth_power_limits_L10_US.csv b/bluetooth/bluetooth_power_limits_Lynx.csv similarity index 82% rename from bluetooth/bluetooth_power_limits_L10_US.csv rename to bluetooth/bluetooth_power_limits_Lynx.csv index 9ec5ec9..65bd062 100644 --- a/bluetooth/bluetooth_power_limits_L10_US.csv +++ b/bluetooth/bluetooth_power_limits_Lynx.csv @@ -1,34 +1,34 @@ -Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1 -off,off,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 -off,off,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76 -off,off,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 -off,off,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 -off,off,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 -off,off,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56 -off,off,on,on,off,on,56,56,56,56,56,56,56,56,56,56,56,56 -off,off,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 -off,on,off,off,off,on,56,56,56,56,56,56,56,56,56,56,56,56 -off,on,off,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56 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+on,on,on,off,on,any,72,68,40,72,68,40,72,68,40,72,68,40 +on,on,on,on,off,any,72,68,40,72,68,40,72,68,40,72,68,40 +on,on,on,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40 +off,any,any,any,any,off,72,68,40,72,68,40,72,68,40,72,68,40 diff --git a/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv b/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv new file mode 100644 index 0000000..c58c015 --- /dev/null +++ b/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv @@ -0,0 +1,34 @@ +Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1 +off,off,off,off,off,on,76,68,40,76,68,34,76,68,40,76,68,34 +off,off,off,off,on,on,76,68,40,76,68,34,76,68,40,76,68,34 +off,off,off,on,off,on,76,68,40,76,68,34,76,68,40,76,68,34 +off,off,off,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34 +off,off,on,off,off,on,76,68,40,76,68,34,76,68,40,76,68,34 +off,off,on,off,on,on,64,64,40,64,64,34,64,64,40,64,64,34 +off,off,on,on,off,on,72,68,40,72,68,34,72,68,40,72,68,34 +off,off,on,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34 +off,on,off,off,off,on,72,68,40,72,68,34,72,68,40,72,68,34 +off,on,off,off,on,on,72,68,40,72,68,34,72,68,40,72,68,34 +off,on,off,on,off,on,72,68,40,72,68,34,72,68,40,72,68,34 +off,on,off,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34 +off,on,on,off,off,on,72,68,40,72,68,34,72,68,40,72,68,34 +off,on,on,off,on,on,64,64,40,64,64,34,64,64,40,64,64,34 +off,on,on,on,off,on,72,68,40,72,68,34,72,68,40,72,68,34 +off,on,on,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,off,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,off,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,off,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,off,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,on,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,on,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,on,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,off,on,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,off,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,off,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,off,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,off,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,on,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,on,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,on,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34 +on,on,on,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34 +off,any,any,any,any,off,76,68,40,76,68,34,76,68,40,76,68,34 diff --git a/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv new file mode 100644 index 0000000..65bd062 --- /dev/null +++ b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv @@ -0,0 +1,34 @@ +Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1 +off,off,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,off,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,off,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,on,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,on,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,on,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +on,off,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +off,any,any,any,any,off,76,68,76,76,68,76,76,68,76,76,68,76 diff --git a/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv new file mode 100644 index 0000000..65bd062 --- /dev/null +++ b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv @@ -0,0 +1,34 @@ +Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1 +off,off,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,off,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,off,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,off,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,on,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,on,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +off,on,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76 +off,on,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56 +on,off,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,off,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44 +on,on,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44 +off,any,any,any,any,off,76,68,76,76,68,76,76,68,76,76,68,76 diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk index ad2eafa..5b6d757 100644 --- a/bluetooth/qti_default.mk +++ b/bluetooth/qti_default.mk @@ -81,9 +81,15 @@ PRODUCT_PACKAGES += \ # Bluetooth SAR Tx power caps PRODUCT_COPY_FILES += \ - device/google/lynx/bluetooth/bluetooth_power_limits_L10_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_EU.csv \ - device/google/lynx/bluetooth/bluetooth_power_limits_L10_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_JP.csv \ - device/google/lynx/bluetooth/bluetooth_power_limits_L10_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_US.csv + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_EU.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GHL1X_EU.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_CA.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_CA.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_US.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GWKK3_cA.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GWKK3_US.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_JP.csv \ + device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G82U8_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G82U8_JP.csv # Bluetooth SAR test tools ifneq (,$(filter true, $(TARGET_USE_QTI_BT_SAR_V1_1) $(TARGET_USE_QTI_BT_SAR))) From cdc7671744d5eed440b1e67ec2dcf98f5e02de61 Mon Sep 17 00:00:00 2001 From: Amy Hsu Date: Wed, 30 Nov 2022 15:22:37 +0000 Subject: [PATCH 112/124] display : update display_colordata_dev_cal0.pb For smooth display DPU compensation on DVT1.0. For LHBM compensation on DVT1.0. Bug: 255935855 Bug: 255517448 Test: Verified by HW. Change-Id: I763cae4a0637927155c40d16365eb6b212c18bb0 --- lynx/display_colordata_dev_cal0.pb | Bin 1864 -> 1881 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/lynx/display_colordata_dev_cal0.pb b/lynx/display_colordata_dev_cal0.pb index 9a4f5ae7681d90be1306d0807b4762aa023355f1..3394659b5425350708b9eec969d20c5a1890216b 100644 GIT binary patch literal 1881 zcmd7St8d#t9Ki88cKm)ji641cg;BIMZj(L1wm)DR9!uM_s?@bpvVo!UP!LdH&`kjb1_1#929dTXgAGs7-Tly4`sjZ2dlC^56R8ND=Eu&L z#tFhO5v2oBkZnc}ATYKitskwL9`E=AgHFr;rPTJ2aj-<7!wW|krz}#zTs!cqmQQ8(Y=dc71ad+Xy*N-K2Wx5Iw`Lv2Gfs0S<9MKmw4E z1QetI4QaqY2C$F?oX5>LpHFyCm`sFO`XMxrCc6;NqOC#;U8unyW{; zV?>6NALs2tSg?zC#X%`7*{j&r8FP9=nC>#d-{i$gz3#kqJV`I4EN<;=XBH{_`d3bVqd;3-DYDQ=2Rsi%6XQFhCq;#D>k zpz%*BMtMpx)qgO7>AGHPH1%C-Av8$^DGOe~{q!n5L?UE}2B?Jv*bonJD{-@k6=7w= ztVIT-MFo^ahxC{U7>fAM>`b7924YEh&_&T$mf>AM%zQ$fLrtFj7`Zzql-d zl3N0*tAeeYyGw1KF^|;t8B?`k0&g^rYW3sB;Vw2Gx=Z<~JJ^Gbw3`NqivZL`0p?-= zcX5z$Gf~DSV#3MBS({vw6Dp!6^qRJrh#9jHJLV#8!bkjA2!*luAdaL5X_Q-S;YRXG z9wu;oWvL7kxL#>q>Z=QNP+pb?yV&*_^N4MqG23IS>o04%Uf-qWLW{)APs}EXnS+?< z6g4pqGjV%sw$3<2L`<_L>5(z%P=KD%1~X+0)?s7TM8 nWJiu=r?4)}lvuHgaq=QJC0kvqPB|)1D)BD0ea1Xe+h@#w&x@R~ From acdce960f59d0fe74ae8dd50abebb252d8544a88 Mon Sep 17 00:00:00 2001 From: Amy Hsu Date: Tue, 6 Dec 2022 08:46:42 +0000 Subject: [PATCH 113/124] display : add display_golden_cal0.pb Add golden color cal profile Bug: 224528325 Test: Verified by TE Change-Id: Iea4ddbb73d742210a2bb4b129710b0163a2c0135 --- lynx/display_golden_cal0.pb | Bin 0 -> 121756 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 lynx/display_golden_cal0.pb diff --git a/lynx/display_golden_cal0.pb b/lynx/display_golden_cal0.pb new file mode 100644 index 0000000000000000000000000000000000000000..869b267d010886d57e7ecc9be2bf1742cb4d49a3 GIT binary patch literal 121756 zcmY(r2XLNSdf#{P_1=5Eu@pyEEUmO!NtR+qSy{y@RwQ|)amhrZvi4}Kv7B9blATF1 z=)Lzw^h$sv2!a4nNECtuKr{j%h)(q0dk6A+Kl1Ku?l<5ian5<)_dL)4ed_;ws^lO= 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z&C0sZihucXxz5Jwmw)D`zx<0|{*(>;ih-S1KWzibsSOY?G%#o1z;0Lr`m_z~e>GSe zFgphHWDV#w8JK%FTyNla-hi%31EdBGsBSbsIM@J$8rbb@a4@jPV1VJ=z|Nfkre_0d zy#}`iHv{lBz?W)ZuGautrGa_fPujrG`C>k913%}B`Er@g#*&BjOF#cv&#VrL!ylPv z_IX~+r=Hp8c`=tiv@iYQ&wSQHt7a{)npo&Z;)nKmUd*Q++UI#OU#`&ET;YfIrJwzU zpZoMv^V7UUocc%Pr}p_?%qO1O=X)`i=J97gfOX851KPqv^=Xo)odT5{L#r#hu+Yd|t literal 0 HcmV?d00001 From 6a5f8ebaa23ad2159dac1e47a63f44f073ea13a0 Mon Sep 17 00:00:00 2001 From: linpeter Date: Wed, 7 Dec 2022 13:43:46 +0800 Subject: [PATCH 114/124] set 60Hz refresh rate as default Bug: 261663718 test: check dumpsys display Change-Id: I976fec416e7562bb972ab1465b5a646ddcba5f7e --- lynx/overlay/frameworks/base/core/res/res/values/config.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml index 6aac780..3ccb5ff 100644 --- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml +++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml @@ -171,7 +171,7 @@ 0 - 90 + 60 64 From d89b45c9dfe5f9ed2fe5e42c3bcc5db2b409a02c Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Wed, 7 Dec 2022 14:53:45 +0800 Subject: [PATCH 115/124] audio: Phase in Waves mps file in L10 This file update Thermal LinkLaw parameter: New parameter: 43 degree C -1 44 degreeC -3 45 degreeC -6 45.5 degreeC -7 46 degreeC -8 Below is previous EVT ROM parameter: 43 degreeC -1 44 degreeC -2 45 degreeC -3 46 degreeC -5 47 degreeC -7 Files from the latest attachment on b/261676080 Bug: 261676080 Test: verified by supery@ Change-Id: I3549679cc5638cb8094cba58039c5c57056a4b1c --- audio/lynx/tuning/waves/waves_preset.mps | Bin 131267 -> 131255 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/audio/lynx/tuning/waves/waves_preset.mps b/audio/lynx/tuning/waves/waves_preset.mps index 8f594d0900ab27a44a6fae8f85ed4947f90a1d28..94f9166e491b0032253cb9387a238445dd005efd 100644 GIT binary patch delta 2162 zcmbuAUuaxK6vpSc$xYU#?Y4pxYPd-s1PhhTQrjXn`=`mqhb9pkV!)KUt4ZBJY%uj9 zwRO9}P$Erg!hko_*FLHhuk_MlNJOOcsR=6j;GgD2M1)nE29XNRnfc~!(+7*VFz~zQ z%-qTM%V%kRR|GtkG3Vf&i=l(r;}bTn>}*W>l;4xM#@Vi zQ>nI8^59ijM}3WTLfro3y|0&o)u8-X;5~D*@sV7{pR3TRpt3R&qhI9t)?>9@Ypq>R zP%ijrYD-Mc-uWgrRM#Qrr(HRg+bPctH#yZ&s*YZh^TX{He_OZcuX?m!cAwa3TW9au zmR!EuW2=9kh^pCFqv{76QT6wYsJgEdRbMaV?Hd+r*z#w4gZZ0=WY3684f5p3?x%!! zvqM>gPi0An%(4*6YKhOys*Vb!$vL8V91IT_D{BM4Ymxa=?D6fwk zmbZeJ!b2HK?2zt2Q*iQ3I<6hK&0%?Wy3469P<7!$pFHYvG=A#$c;w3G-??aeDhXZn zW?OTC(!gSYUIZ@Is#K(2Qc6Rvb;v(9Tv@r0@NX7rI}ZI&v^NgQWTz`Xo@tVW znZ3AF&dv1O``2EM-kF(I5z_CJi=_kpl~-s7Zd;kPw`s3B8&ovR=h_h=zE$gcwbs=7 zS*?dAYC$MhzLb*}J0I%cfJ+1J+w5Sz!SH<+qNyy*J7DEuyJcl!zh&iOR980kpssy1 zM>qMn&7M<6+KV?kX%1;8akX+XdM#Ut9k4QCpV>>((q4A_KQ9Mdq5KJYgJW4|>@`gK?6o}o-Uez@gPbV^h7W7JWvf~>8A%vJ%}DxkFr z3EC<=Vyl2`mBFP}A**H;;@K*Li>!Ko3p8IS$V;Veiw{fJEKYU2=l||e+}$G7zW5WD;2fxXYxUbG*b!OH1L!FgQ+HUhZ0vdov3(v+$*M56JETtM1uH z$~_>v2ej_t%I*Q#J%h$Q$m||u?H*)y56JET**yen_aL)-2DN*;{~z~e7KC!+EkTjb zijg;iJ;9c&6E9G_uxZ&28qw^aVZDQp^$tSj9R%_Y0__eWLGK_Q@eTrc2MsRWL1fi- z5b$L z#B=EeLq~198*LjFZNq=btXk`~VPaGp?ijovAC+9c$D@PxS#?qo%X<#wNd?+T#g!)& z$dhW&Oe$oaRLFW#A@igHc~XHqsR-7S3Rz7m4W Date: Tue, 6 Dec 2022 15:42:10 +0800 Subject: [PATCH 116/124] audio: add missed camcorder be_cfg in dsp latency Some 3rd party app may use one or three microhpne(s) to do the camera recording. Add these two configurations to UC_AUDIO_RECORD to sync the audio and video of the recoreded video. Bug: 260824124 Test: Reporter verified Change-Id: I9ee30d97971dc2499787592f8632f48ef79eae80 --- audio/lynx/config/audio_platform_configuration.xml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/audio/lynx/config/audio_platform_configuration.xml b/audio/lynx/config/audio_platform_configuration.xml index a6dbf17..1a3aba5 100644 --- a/audio/lynx/config/audio_platform_configuration.xml +++ b/audio/lynx/config/audio_platform_configuration.xml @@ -225,6 +225,8 @@ + + From 47ab30f2e5850934dbe8986c764de8f5c5aa2793 Mon Sep 17 00:00:00 2001 From: Chungkai Mei Date: Thu, 8 Dec 2022 09:41:15 +0000 Subject: [PATCH 117/124] Remove UClampThreshold hint the file node was removed so also remove these dummy setting Bug: 260806701 Change-Id: I23044f7f32cf4b2b2cc93205ec5751525f05ee7f Signed-off-by: Chungkai Mei --- powerhint.json | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/powerhint.json b/powerhint.json index 18817dd..ada2cae 100644 --- a/powerhint.json +++ b/powerhint.json @@ -117,15 +117,6 @@ ], "ResetOnInit": true }, - { - "Name": "UClampThreshold", - "Path": "/proc/vendor_sched/uclamp_threshold", - "Values": [ - "0", - "8" - ], - "ResetOnInit": true - }, { "Name": "ReducePreferIdle", "Path": "/proc/vendor_sched/reduce_prefer_idle", @@ -630,12 +621,6 @@ "Duration": 1000, "Value": "0-3" }, - { - "PowerHint": "LAUNCH", - "Node": "UClampThreshold", - "Duration": 5000, - "Value": "0" - }, { "PowerHint": "LAUNCH", "Node": "ReducePreferIdle", From d71280fb168d1da743ab7099ec39d681771cf30f Mon Sep 17 00:00:00 2001 From: Yung Ti Su Date: Fri, 9 Dec 2022 11:42:47 +0800 Subject: [PATCH 118/124] audio: [L10] Recording tuning table update 12/09 - DVT Ver.3 For Final setting update the AGC module's parameters, the original setting would suppress the loudness in high sound pressure environment. idealRMS -34 -> -24 minGain -34 -> -24 Files from the latest attachment on b/261930259 Bug: 261930259 Test: verified by darrenyen@ Change-Id: I5154760a8d6c4856c056cf8491ff5e4d78699dbd --- audio/lynx/tuning/bluenote/recording.gatf | Bin 93884 -> 93884 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/audio/lynx/tuning/bluenote/recording.gatf b/audio/lynx/tuning/bluenote/recording.gatf index 1f4525ec290094e057463c0c01ca15c8d4a2b325..00946318f03a63432ef06817a03b9a04988beef5 100644 GIT binary patch delta 148 zcmdmUmvzrw)(I*K@1B{S?|3|~c-BVY{~uJohhzr7j8mWMy)1W8?ZQKmhc0b&F Date: Tue, 25 Oct 2022 19:35:29 +0800 Subject: [PATCH 119/124] Disable LE Audio unicast & broadcast by default Bug: 253951174 Test: LE Audio related services are all disabled by default Test: Enable LE Audio realted services by devleoper options Change-Id: I1ef4d2271769a3c343e4da07133d6941e456a47f --- bluetooth/qti_default.mk | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk index 5b6d757..fc0339f 100644 --- a/bluetooth/qti_default.mk +++ b/bluetooth/qti_default.mk @@ -24,17 +24,10 @@ PRODUCT_PRODUCT_PROPERTIES += \ # Bluetooth LE Audio PRODUCT_PRODUCT_PROPERTIES += \ ro.bluetooth.leaudio_switcher.supported=true \ - bluetooth.profile.bap.broadcast.source.enabled=true \ - bluetooth.profile.bap.broadcast.assist.enabled=true \ - bluetooth.profile.bap.unicast.client.enabled=true \ - bluetooth.profile.csip.set_coordinator.enabled=true \ - bluetooth.profile.hap.client.enabled=true \ - bluetooth.profile.mcp.server.enabled=true \ - bluetooth.profile.ccp.server.enabled=true \ - bluetooth.profile.vcp.controller.enabled=true \ + ro.bluetooth.leaudio_broadcast_switcher.supported=true \ ro.bluetooth.leaudio_offload.supported=true \ persist.bluetooth.leaudio_offload.disabled=false \ - ro.vendor.audio_hal.ble_use_stream_id=true + ro.vendor.audio_hal.ble_use_stream_id=true \ # Bluetooth LE Audio CIS handover to SCO # Set the property only if the controller doesn't support CIS and SCO From ad95139b97577a10cd409940bcb693c40a57a890 Mon Sep 17 00:00:00 2001 From: Chris Paulo Date: Thu, 15 Dec 2022 21:04:49 +0000 Subject: [PATCH 120/124] [DO NOT MERGE] lynx/vibrator: Fix Capodetector on AoC restart Update pointers used in protobuf interface for configuring the detector. When AoC has an SSR, it causes CapoDetector to go down by null pointer dereference. Bug: 261349596 Test: Verified 10x forced AoC SSR - adb shell 'echo mem dump 0 > /dev/acd-debug' Change-Id: I48d94b721fc3ba689a48e415d04fa4152f4f8865 Signed-off-by: Chris Paulo --- vibrator/cs40l26/CapoDetector.cpp | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/vibrator/cs40l26/CapoDetector.cpp b/vibrator/cs40l26/CapoDetector.cpp index 1b8ba89..0fc4d4b 100644 --- a/vibrator/cs40l26/CapoDetector.cpp +++ b/vibrator/cs40l26/CapoDetector.cpp @@ -30,10 +30,6 @@ namespace chre { namespace { // anonymous namespace for file-local definitions -static capo::ConfigureDetector_ConfigData config_data = capo::ConfigureDetector_ConfigData(); -static capo::ConfigureDetector msg = capo::ConfigureDetector(); - - /** * Called when onConnected() to send NanoappList request. */ @@ -166,19 +162,22 @@ void CapoDetector::enable() { // Create CHRE message with serialized message flatbuffers::FlatBufferBuilder builder, config_builder, force_builder; - config_data.set_still_time_threshold_nanosecond(mCapoDetectorMDParameters.still_time_threshold_ns); - config_data.set_window_width_nanosecond(mCapoDetectorMDParameters.window_width_ns); - config_data.set_motion_confidence_threshold(mCapoDetectorMDParameters.motion_confidence_threshold); - config_data.set_still_confidence_threshold(mCapoDetectorMDParameters.still_confidence_threshold); - config_data.set_var_threshold(mCapoDetectorMDParameters.var_threshold); - config_data.set_var_threshold_delta(mCapoDetectorMDParameters.var_threshold_delta); + auto config_data = std::make_unique(); + auto msg = std::make_unique(); - msg.set_allocated_config_data(&config_data); + config_data->set_still_time_threshold_nanosecond(mCapoDetectorMDParameters.still_time_threshold_ns); + config_data->set_window_width_nanosecond(mCapoDetectorMDParameters.window_width_ns); + config_data->set_motion_confidence_threshold(mCapoDetectorMDParameters.motion_confidence_threshold); + config_data->set_still_confidence_threshold(mCapoDetectorMDParameters.still_confidence_threshold); + config_data->set_var_threshold(mCapoDetectorMDParameters.var_threshold); + config_data->set_var_threshold_delta(mCapoDetectorMDParameters.var_threshold_delta); - auto pb_size = msg.ByteSizeLong(); + msg->set_allocated_config_data(config_data.release()); + + auto pb_size = msg->ByteSizeLong(); auto pb_data = std::make_unique(pb_size); - if (!msg.SerializeToArray(pb_data.get(), pb_size)) { + if (!msg->SerializeToArray(pb_data.get(), pb_size)) { ALOGE("Failed to serialize message."); } From 7be72ef04d11e2f0396d097824c1d2fd8d639720 Mon Sep 17 00:00:00 2001 From: Edwin Tung Date: Thu, 29 Dec 2022 13:05:04 +0800 Subject: [PATCH 121/124] gps: Enable Vzw SUPL OTDOA Bug: 263852801 Test: OTDOA pass Change-Id: Ife92341f32e65f1740eb8a139f2fc7aaefdd220f --- location/gps.xml.l10 | 1 + location/gps_user.xml.l10 | 1 + 2 files changed, 2 insertions(+) diff --git a/location/gps.xml.l10 b/location/gps.xml.l10 index cb3f8ba..61c31d9 100644 --- a/location/gps.xml.l10 +++ b/location/gps.xml.l10 @@ -35,6 +35,7 @@ SuplVersion="2" SuplMinorVersion="0" SuplOtdoaCapable="true" + SuplOtdoaCapable2="true" SuplGlonassCapable = "true" SuplGalileoCapable = "true" SuplBdsCapable = "true" diff --git a/location/gps_user.xml.l10 b/location/gps_user.xml.l10 index 0724367..477e7f4 100644 --- a/location/gps_user.xml.l10 +++ b/location/gps_user.xml.l10 @@ -34,6 +34,7 @@ SuplVersion="2" SuplMinorVersion="0" SuplOtdoaCapable="true" + SuplOtdoaCapable2="true" SuplGlonassCapable = "true" SuplGalileoCapable = "true" SuplBdsCapable = "true" From 1c96fd389956f9c833d356843657a7e17d7b42ad Mon Sep 17 00:00:00 2001 From: Amy Hsu Date: Mon, 19 Dec 2022 06:42:24 +0000 Subject: [PATCH 122/124] display: update blocking zones Set zone 4: Lock refresh rate at 60Hz when > 50k lux Bug: 243757430 Test: no refresh rate chagne in the blocking zone Change-Id: I186fa86f5ae9dd21a4be6483702f83b4e7bcfc90 --- .../frameworks/base/core/res/res/values/config.xml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml index 3ccb5ff..b38878a 100644 --- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml +++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml @@ -84,6 +84,20 @@ 60 + + + + 128 + + + + 50000 + + + + 60 +