MIF frequency optimization for 60fps video recording use-case

This CL sets the MIF min clock frequency to 1539MHz, which based on
initial ODPM and MIPS measurements shows benefit both in terms of power
consumption and cycles-per-instructions (CPI), reducing the gap with R4
device.

Bug: 238775955
Test: ODPM and CPI tests. Link to test results provided in the bug.
Change-Id: I6fc043c3d0d9f052c02dd04eb47f22661cfade6a

powerhint-cheetah-a0.json

@@ -5,6 +5,7 @@
       "Path": "/sys/devices/platform/17000010.devfreq_mif/devfreq/17000010.devfreq_mif/min_freq",
       "Values": [
         "3172000",
+        "1539000",
         "1014000",
         "421000"
       ],
@@ -961,7 +962,7 @@
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "MemFreq",
       "Duration": 0,
-      "Value": "1014000"
+      "Value": "1539000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",

powerhint-cheetah.json

@@ -5,6 +5,7 @@
       "Path": "/sys/devices/platform/17000010.devfreq_mif/devfreq/17000010.devfreq_mif/min_freq",
       "Values": [
         "3172000",
+        "1539000",
         "1014000",
         "421000"
       ],
@@ -982,7 +983,7 @@
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "MemFreq",
       "Duration": 0,
-      "Value": "1014000"
+      "Value": "1539000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",