diff --git a/aosp_husky_fullmte.mk b/aosp_husky_fullmte.mk
index a8429e5..06a5db0 100644
--- a/aosp_husky_fullmte.mk
+++ b/aosp_husky_fullmte.mk
@@ -1,5 +1,4 @@
-include device/google/shusky/fullmte-vars.mk
+include device/google/gs-common/mte/fullmte-pixel.mk
$(call inherit-product, device/google/shusky/aosp_husky.mk)
-$(call inherit-product, device/google/shusky/fullmte-common.mk)
PRODUCT_NAME := aosp_husky_fullmte
diff --git a/aosp_ripcurrent_fullmte.mk b/aosp_ripcurrent_fullmte.mk
index 781137a..b7dc289 100644
--- a/aosp_ripcurrent_fullmte.mk
+++ b/aosp_ripcurrent_fullmte.mk
@@ -1,5 +1,4 @@
-include device/google/shusky/fullmte-vars.mk
+include device/google/gs-common/mte/fullmte-pixel.mk
$(call inherit-product, device/google/shusky/aosp_ripcurrent.mk)
-$(call inherit-product, device/google/shusky/fullmte-common.mk)
PRODUCT_NAME := aosp_ripcurrent_fullmte
diff --git a/aosp_shiba_fullmte.mk b/aosp_shiba_fullmte.mk
index 76333e0..8f31bd5 100644
--- a/aosp_shiba_fullmte.mk
+++ b/aosp_shiba_fullmte.mk
@@ -1,5 +1,4 @@
-include device/google/shusky/fullmte-vars.mk
+include device/google/gs-common/mte/fullmte-pixel.mk
$(call inherit-product, device/google/shusky/aosp_shiba.mk)
-$(call inherit-product, device/google/shusky/fullmte-common.mk)
PRODUCT_NAME := aosp_shiba_fullmte
diff --git a/audio/husky/aidl_config/audio_platform_configuration.xml b/audio/husky/aidl_config/audio_platform_configuration.xml
new file mode 100644
index 0000000..8707d44
--- /dev/null
+++ b/audio/husky/aidl_config/audio_platform_configuration.xml
@@ -0,0 +1,120 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ 0.01
+ 0.02
+ 0.04
+ 0.10
+ 0.21
+ 0.47
+ 1.00
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MIC
+ CAMCORDER
+ VOICE_RECOGNITION
+
+
+ MIC
+ CAMCORDER
+ VOICE_RECOGNITION
+
+
+
+
+
+
diff --git a/audio/husky/aidl_config/audio_platform_configuration_aidl.xml b/audio/husky/aidl_config/audio_platform_configuration_aidl.xml
deleted file mode 100644
index ef8fe23..0000000
--- a/audio/husky/aidl_config/audio_platform_configuration_aidl.xml
+++ /dev/null
@@ -1,76 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
-
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-
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-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/audio/husky/aidl_config/audio_policy_configuration.xml b/audio/husky/aidl_config/audio_policy_configuration.xml
deleted file mode 100644
index c93d1cb..0000000
--- a/audio/husky/aidl_config/audio_policy_configuration.xml
+++ /dev/null
@@ -1,215 +0,0 @@
-
-
-
-
-
-
-
-
- - Speaker
- - Speaker Safe
- - Earpiece
- - Built-In Mic
- - Built-In Back Mic
- - Telephony Tx
- - Voice Call And Telephony Rx
- - Echo Ref In
-
- Speaker
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
-
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-
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-
-
-
-
-
-
-
-
-
-
-
diff --git a/audio/husky/aidl_config/mixer_paths_aidl.xml b/audio/husky/aidl_config/mixer_paths_aidl.xml
index 8b2b0e4..48016b4 100644
--- a/audio/husky/aidl_config/mixer_paths_aidl.xml
+++ b/audio/husky/aidl_config/mixer_paths_aidl.xml
@@ -79,8 +79,8 @@
-
-
+
+
@@ -97,6 +97,8 @@
+
+
@@ -315,6 +317,7 @@
+
@@ -374,10 +377,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -398,10 +437,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
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+
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+
+
+
@@ -422,10 +497,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -451,10 +562,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -475,14 +622,58 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -503,10 +694,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -527,10 +754,34 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -553,11 +804,47 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
@@ -567,10 +854,18 @@
-
+
+
+
+
+
+
+
+
+
@@ -579,11 +874,19 @@
-
+
-
+
+
+
+
+
+
+
+
+
@@ -595,11 +898,19 @@
-
+
-
+
+
+
+
+
+
+
+
+
@@ -625,10 +936,30 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -641,11 +972,19 @@
-
+
-
+
+
+
+
+
+
+
+
+
@@ -657,19 +996,59 @@
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
+
+
+
+
+
+
+
+
@@ -682,15 +1061,13 @@
-
+
-
-
@@ -700,8 +1077,6 @@
-
-
@@ -712,11 +1087,9 @@
-
-
@@ -758,6 +1131,17 @@
+
+
+
+
+
+
+
+
+
+
+
@@ -778,8 +1162,7 @@
-
-
+
@@ -788,14 +1171,17 @@
-
-
+
+
+
+
+
+
-
@@ -826,7 +1212,7 @@
-
+
@@ -836,7 +1222,7 @@
-
+
@@ -861,4 +1247,68 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/audio/husky/audio-tables.mk b/audio/husky/audio-tables.mk
index 0248b04..8aae616 100644
--- a/audio/husky/audio-tables.mk
+++ b/audio/husky/audio-tables.mk
@@ -21,8 +21,7 @@ AUDIO_TABLE_FOLDER := husky
ifeq ($(BUILD_AUDIO_AIDL_VERSION),true)
PRODUCT_COPY_FILES += \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_policy_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration.xml \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_platform_configuration_aidl.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration_aidl.xml \
+ device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_platform_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration.xml \
device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_policy_volumes.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_volumes.xml \
device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/mixer_paths_aidl.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths_aidl.xml
else
diff --git a/audio/husky/config/audio_platform_configuration.xml b/audio/husky/config/audio_platform_configuration.xml
index 2839122..86e910b 100644
--- a/audio/husky/config/audio_platform_configuration.xml
+++ b/audio/husky/config/audio_platform_configuration.xml
@@ -300,13 +300,14 @@
+
-
+
diff --git a/audio/husky/config/audio_policy_configuration.xml b/audio/husky/config/audio_policy_configuration.xml
index a859ac1..524f102 100644
--- a/audio/husky/config/audio_policy_configuration.xml
+++ b/audio/husky/config/audio_policy_configuration.xml
@@ -149,7 +149,7 @@
-
+
@@ -228,6 +228,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
-
+
@@ -184,6 +184,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
-
+
@@ -180,6 +180,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback"/>
+
-
+
@@ -205,6 +205,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
+
+
+
+
+
+
diff --git a/audio/husky/tuning/fortemedia/BLUETOOTH.dat b/audio/husky/tuning/fortemedia/BLUETOOTH.dat
index d9c8095..b70e534 100644
Binary files a/audio/husky/tuning/fortemedia/BLUETOOTH.dat and b/audio/husky/tuning/fortemedia/BLUETOOTH.dat differ
diff --git a/audio/husky/tuning/fortemedia/BLUETOOTH.mods b/audio/husky/tuning/fortemedia/BLUETOOTH.mods
index 7cc39ec..f93e51a 100644
--- a/audio/husky/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/husky/tuning/fortemedia/BLUETOOTH.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG BLUETOOTH
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-07-06 16:40:03
+#SAVE_TIME 2023-09-14 20:13:28
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -14010,8 +14010,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16705,8 +16705,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -19400,8 +19400,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -22095,8 +22095,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24790,8 +24790,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -27485,8 +27485,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -30180,8 +30180,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -32875,8 +32875,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -35570,8 +35570,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -38265,8 +38265,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -40960,8 +40960,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -43655,8 +43655,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -46350,8 +46350,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -49045,8 +49045,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -51740,8 +51740,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -54435,8 +54435,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -57130,8 +57130,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -59825,8 +59825,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -62520,8 +62520,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -65215,8 +65215,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -67910,8 +67910,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
diff --git a/audio/husky/tuning/fortemedia/HANDSET.dat b/audio/husky/tuning/fortemedia/HANDSET.dat
index 3e3a68f..7762398 100644
Binary files a/audio/husky/tuning/fortemedia/HANDSET.dat and b/audio/husky/tuning/fortemedia/HANDSET.dat differ
diff --git a/audio/husky/tuning/fortemedia/HANDSET.mods b/audio/husky/tuning/fortemedia/HANDSET.mods
index 0920c0a..b7fb237 100644
--- a/audio/husky/tuning/fortemedia/HANDSET.mods
+++ b/audio/husky/tuning/fortemedia/HANDSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-08-28 11:13:37
+#SAVE_TIME 2023-09-14 20:10:18
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -14010,8 +14010,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16705,8 +16705,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -19400,8 +19400,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -22095,8 +22095,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24790,8 +24790,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -27485,8 +27485,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -30180,8 +30180,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -32875,8 +32875,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -35570,8 +35570,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -38265,8 +38265,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -40960,8 +40960,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -43655,8 +43655,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -46350,8 +46350,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -49045,8 +49045,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -51740,8 +51740,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -54435,8 +54435,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -57130,8 +57130,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -59825,8 +59825,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -62520,8 +62520,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
diff --git a/audio/husky/tuning/fortemedia/HANDSFREE.dat b/audio/husky/tuning/fortemedia/HANDSFREE.dat
index 329b4bc..72a9f6c 100644
Binary files a/audio/husky/tuning/fortemedia/HANDSFREE.dat and b/audio/husky/tuning/fortemedia/HANDSFREE.dat differ
diff --git a/audio/husky/tuning/fortemedia/HANDSFREE.mods b/audio/husky/tuning/fortemedia/HANDSFREE.mods
index ae29387..d1f4462 100644
--- a/audio/husky/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/husky/tuning/fortemedia/HANDSFREE.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSFREE
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-07-05 18:50:05
+#SAVE_TIME 2023-09-14 20:13:51
#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -14010,8 +14010,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16705,8 +16705,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -19400,8 +19400,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -22095,8 +22095,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24790,8 +24790,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -27485,8 +27485,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
diff --git a/audio/husky/tuning/fortemedia/HEADSET.dat b/audio/husky/tuning/fortemedia/HEADSET.dat
index 2ea80f2..f41d674 100644
Binary files a/audio/husky/tuning/fortemedia/HEADSET.dat and b/audio/husky/tuning/fortemedia/HEADSET.dat differ
diff --git a/audio/husky/tuning/fortemedia/HEADSET.mods b/audio/husky/tuning/fortemedia/HEADSET.mods
index c0fa8fb..1dd2d98 100644
--- a/audio/husky/tuning/fortemedia/HEADSET.mods
+++ b/audio/husky/tuning/fortemedia/HEADSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HEADSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-07-14 14:37:27
+#SAVE_TIME 2023-09-14 20:13:07
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -14010,8 +14010,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16705,8 +16705,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -19400,8 +19400,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -22095,8 +22095,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24790,8 +24790,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -27485,8 +27485,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -30180,8 +30180,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -32875,8 +32875,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -35570,8 +35570,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -38265,8 +38265,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -40960,8 +40960,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -43655,8 +43655,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -46350,8 +46350,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -49045,8 +49045,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -51740,8 +51740,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -54435,8 +54435,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -57130,8 +57130,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -59825,8 +59825,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -62520,8 +62520,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -65215,8 +65215,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -67910,8 +67910,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -70605,8 +70605,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -73300,8 +73300,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -75995,8 +75995,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -78690,8 +78690,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -81385,8 +81385,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -84080,8 +84080,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -86775,8 +86775,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -89470,8 +89470,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -92165,8 +92165,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -94860,8 +94860,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -97555,8 +97555,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -100250,8 +100250,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -102945,8 +102945,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -105640,8 +105640,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
diff --git a/audio/husky/tuning/fortemedia/mcps.dat b/audio/husky/tuning/fortemedia/mcps.dat
index 1c16314..7f3aeaa 100644
Binary files a/audio/husky/tuning/fortemedia/mcps.dat and b/audio/husky/tuning/fortemedia/mcps.dat differ
diff --git a/audio/ripcurrent/config/audio_platform_configuration.xml b/audio/ripcurrent/config/audio_platform_configuration.xml
index 1aab4e6..2435e98 100644
--- a/audio/ripcurrent/config/audio_platform_configuration.xml
+++ b/audio/ripcurrent/config/audio_platform_configuration.xml
@@ -295,6 +295,7 @@
+
diff --git a/audio/ripcurrent/config/audio_policy_configuration.xml b/audio/ripcurrent/config/audio_policy_configuration.xml
index c53bfe2..2620d7f 100644
--- a/audio/ripcurrent/config/audio_policy_configuration.xml
+++ b/audio/ripcurrent/config/audio_policy_configuration.xml
@@ -148,7 +148,7 @@
-
+
@@ -227,6 +227,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
-
+
@@ -183,6 +183,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
-
+
@@ -179,6 +179,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback"/>
+
-
+
@@ -204,6 +204,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
+
+
+
+
+
+
diff --git a/audio/ripcurrent/tuning/fortemedia/mcps.dat b/audio/ripcurrent/tuning/fortemedia/mcps.dat
index 04fc100..7f3aeaa 100644
Binary files a/audio/ripcurrent/tuning/fortemedia/mcps.dat and b/audio/ripcurrent/tuning/fortemedia/mcps.dat differ
diff --git a/audio/shiba/aidl_config/audio_platform_configuration.xml b/audio/shiba/aidl_config/audio_platform_configuration.xml
new file mode 100644
index 0000000..8707d44
--- /dev/null
+++ b/audio/shiba/aidl_config/audio_platform_configuration.xml
@@ -0,0 +1,120 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ 0.01
+ 0.02
+ 0.04
+ 0.10
+ 0.21
+ 0.47
+ 1.00
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ MIC
+ CAMCORDER
+ VOICE_RECOGNITION
+
+
+ MIC
+ CAMCORDER
+ VOICE_RECOGNITION
+
+
+
+
+
+
diff --git a/audio/shiba/aidl_config/audio_platform_configuration_aidl.xml b/audio/shiba/aidl_config/audio_platform_configuration_aidl.xml
deleted file mode 100644
index ef8fe23..0000000
--- a/audio/shiba/aidl_config/audio_platform_configuration_aidl.xml
+++ /dev/null
@@ -1,76 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
-
-
-
-
-
-
-
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-
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-
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-
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-
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/audio/shiba/aidl_config/audio_policy_configuration.xml b/audio/shiba/aidl_config/audio_policy_configuration.xml
deleted file mode 100644
index c93d1cb..0000000
--- a/audio/shiba/aidl_config/audio_policy_configuration.xml
+++ /dev/null
@@ -1,215 +0,0 @@
-
-
-
-
-
-
-
-
- - Speaker
- - Speaker Safe
- - Earpiece
- - Built-In Mic
- - Built-In Back Mic
- - Telephony Tx
- - Voice Call And Telephony Rx
- - Echo Ref In
-
- Speaker
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
-
-
-
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/audio/shiba/aidl_config/mixer_paths_aidl.xml b/audio/shiba/aidl_config/mixer_paths_aidl.xml
index 8b2b0e4..48016b4 100644
--- a/audio/shiba/aidl_config/mixer_paths_aidl.xml
+++ b/audio/shiba/aidl_config/mixer_paths_aidl.xml
@@ -79,8 +79,8 @@
-
-
+
+
@@ -97,6 +97,8 @@
+
+
@@ -315,6 +317,7 @@
+
@@ -374,10 +377,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -398,10 +437,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -422,10 +497,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -451,10 +562,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -475,14 +622,58 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -503,10 +694,46 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -527,10 +754,34 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -553,11 +804,47 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -567,10 +854,18 @@
-
+
+
+
+
+
+
+
+
+
@@ -579,11 +874,19 @@
-
+
-
+
+
+
+
+
+
+
+
+
@@ -595,11 +898,19 @@
-
+
-
+
+
+
+
+
+
+
+
+
@@ -625,10 +936,30 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -641,11 +972,19 @@
-
+
-
+
+
+
+
+
+
+
+
+
@@ -657,19 +996,59 @@
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
-
+
+
+
+
+
+
+
+
+
@@ -682,15 +1061,13 @@
-
+
-
-
@@ -700,8 +1077,6 @@
-
-
@@ -712,11 +1087,9 @@
-
-
@@ -758,6 +1131,17 @@
+
+
+
+
+
+
+
+
+
+
+
@@ -778,8 +1162,7 @@
-
-
+
@@ -788,14 +1171,17 @@
-
-
+
+
+
+
+
+
-
@@ -826,7 +1212,7 @@
-
+
@@ -836,7 +1222,7 @@
-
+
@@ -861,4 +1247,68 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/audio/shiba/audio-tables.mk b/audio/shiba/audio-tables.mk
index 508e15a..9beaa0c 100644
--- a/audio/shiba/audio-tables.mk
+++ b/audio/shiba/audio-tables.mk
@@ -21,8 +21,7 @@ AUDIO_TABLE_FOLDER := shiba
ifeq ($(BUILD_AUDIO_AIDL_VERSION),true)
PRODUCT_COPY_FILES += \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_policy_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration.xml \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_platform_configuration_aidl.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration_aidl.xml \
+ device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_platform_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration.xml \
device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_policy_volumes.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_volumes.xml \
device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/mixer_paths_aidl.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths_aidl.xml
else
diff --git a/audio/shiba/config/audio_platform_configuration.xml b/audio/shiba/config/audio_platform_configuration.xml
index 2839122..86e910b 100644
--- a/audio/shiba/config/audio_platform_configuration.xml
+++ b/audio/shiba/config/audio_platform_configuration.xml
@@ -300,13 +300,14 @@
+
-
+
diff --git a/audio/shiba/config/audio_policy_configuration.xml b/audio/shiba/config/audio_policy_configuration.xml
index a859ac1..524f102 100644
--- a/audio/shiba/config/audio_policy_configuration.xml
+++ b/audio/shiba/config/audio_policy_configuration.xml
@@ -149,7 +149,7 @@
-
+
@@ -228,6 +228,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
-
+
@@ -184,6 +184,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
-
+
@@ -180,6 +180,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback"/>
+
-
+
@@ -205,6 +205,8 @@
sources="primary output,deep buffer,haptic,raw,mmap_no_irq_out,voip_rx,hifi_playback,compressed_offload,immersive_out"/>
+
+
+
+
+
+
+
diff --git a/audio/shiba/tuning/fortemedia/BLUETOOTH.dat b/audio/shiba/tuning/fortemedia/BLUETOOTH.dat
index 1f9df2c..a7b0a53 100644
Binary files a/audio/shiba/tuning/fortemedia/BLUETOOTH.dat and b/audio/shiba/tuning/fortemedia/BLUETOOTH.dat differ
diff --git a/audio/shiba/tuning/fortemedia/BLUETOOTH.mods b/audio/shiba/tuning/fortemedia/BLUETOOTH.mods
index 1f5e5cf..c5a1c3a 100644
--- a/audio/shiba/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/shiba/tuning/fortemedia/BLUETOOTH.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG BLUETOOTH
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-07-06 22:17:40
+#SAVE_TIME 2023-09-13 17:45:23
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -13480,7 +13480,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -14010,8 +14010,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16175,7 +16175,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB
+#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-WB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -16705,8 +16705,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -18870,7 +18870,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB
+#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -19400,8 +19400,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -21565,7 +21565,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB
+#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-FB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -22095,8 +22095,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24260,7 +24260,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB-RESERVE2-SWB
+#CASE_NAME BLUETOOTH-BT-RESERVE2-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -24790,8 +24790,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -26955,7 +26955,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -27485,8 +27485,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -29650,7 +29650,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
+#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-WB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -30180,8 +30180,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -32345,7 +32345,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
+#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -32875,8 +32875,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -35040,7 +35040,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
+#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-FB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -35570,8 +35570,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -37735,7 +37735,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTNB_NREC-RESERVE2-SWB
+#CASE_NAME BLUETOOTH-BT_NREC-RESERVE2-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -38265,8 +38265,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -40430,7 +40430,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -40960,8 +40960,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -43125,7 +43125,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB
+#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-WB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -43655,8 +43655,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -45820,7 +45820,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB
+#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -46350,8 +46350,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -48515,18875 +48515,18875 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0009 //TX_OPERATION_MODE_0
-1 0x0009 //TX_OPERATION_MODE_1
-2 0x0020 //TX_PATCH_REG
-3 0x0200 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0004 //TX_SAMPLINGFREQ_SIG
-7 0x0004 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0000 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7E56 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0200 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x6000 //TX_EAD_THR
-151 0x0400 //TX_THR_RE_EST
-152 0x3000 //TX_MIN_EQ_RE_EST_0
-153 0x3000 //TX_MIN_EQ_RE_EST_1
-154 0x4000 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x6000 //TX_MIN_EQ_RE_EST_6
-159 0x6000 //TX_MIN_EQ_RE_EST_7
-160 0x6000 //TX_MIN_EQ_RE_EST_8
-161 0x6000 //TX_MIN_EQ_RE_EST_9
-162 0x4000 //TX_MIN_EQ_RE_EST_10
-163 0x4000 //TX_MIN_EQ_RE_EST_11
-164 0x4000 //TX_MIN_EQ_RE_EST_12
-165 0x3000 //TX_LAMBDA_RE_EST
-166 0x4000 //TX_LAMBDA_CB_NLE
-167 0x3000 //TX_C_POST_FLT
-168 0x4500 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x5000 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7F00 //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x0800 //TX_DTD_THR2_0
-205 0x0800 //TX_DTD_THR2_1
-206 0x0800 //TX_DTD_THR2_2
-207 0x0800 //TX_DTD_THR2_3
-208 0x0800 //TX_DTD_THR2_4
-209 0x0100 //TX_DTD_THR2_5
-210 0x0100 //TX_DTD_THR2_6
-211 0x7FFF //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x03E8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00C0 //TX_EPD_OFFSET_00
-233 0x00C0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
-243 0xFB00 //TX_THR_SN_EST_1
-244 0xFA00 //TX_THR_SN_EST_2
-245 0xF700 //TX_THR_SN_EST_3
-246 0xFA00 //TX_THR_SN_EST_4
-247 0xF600 //TX_THR_SN_EST_5
-248 0xF600 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0200 //TX_DELTA_THR_SN_EST_0
-251 0x0400 //TX_DELTA_THR_SN_EST_1
-252 0x0300 //TX_DELTA_THR_SN_EST_2
-253 0x0600 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0200 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x4000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x4000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x2000 //TX_B_POST_FLT_0
-280 0x2000 //TX_B_POST_FLT_1
-281 0x0012 //TX_NS_LVL_CTRL_0
-282 0x0016 //TX_NS_LVL_CTRL_1
-283 0x0016 //TX_NS_LVL_CTRL_2
-284 0x0019 //TX_NS_LVL_CTRL_3
-285 0x0010 //TX_NS_LVL_CTRL_4
-286 0x0010 //TX_NS_LVL_CTRL_5
-287 0x0019 //TX_NS_LVL_CTRL_6
-288 0x0010 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000C //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000F //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x0011 //TX_MIN_GAIN_S_6
-296 0x000C //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7000 //TX_SNRI_SUP_0
-301 0x7000 //TX_SNRI_SUP_1
-302 0x7000 //TX_SNRI_SUP_2
-303 0x6000 //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x6000 //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x0016 //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x6000 //TX_A_POST_FILT_S_0
-315 0x6000 //TX_A_POST_FILT_S_1
-316 0x6000 //TX_A_POST_FILT_S_2
-317 0x6000 //TX_A_POST_FILT_S_3
-318 0x6000 //TX_A_POST_FILT_S_4
-319 0x6000 //TX_A_POST_FILT_S_5
-320 0x6000 //TX_A_POST_FILT_S_6
-321 0x6000 //TX_A_POST_FILT_S_7
-322 0x2000 //TX_B_POST_FILT_0
-323 0x4000 //TX_B_POST_FILT_1
-324 0x2000 //TX_B_POST_FILT_2
-325 0x2000 //TX_B_POST_FILT_3
-326 0x2000 //TX_B_POST_FILT_4
-327 0x2000 //TX_B_POST_FILT_5
-328 0x2000 //TX_B_POST_FILT_6
-329 0x2000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7CCD //TX_LAMBDA_PFILT_S_0
-340 0x7CCD //TX_LAMBDA_PFILT_S_1
-341 0x7CCD //TX_LAMBDA_PFILT_S_2
-342 0x7CCD //TX_LAMBDA_PFILT_S_3
-343 0x7CCD //TX_LAMBDA_PFILT_S_4
-344 0x7CCD //TX_LAMBDA_PFILT_S_5
-345 0x7CCD //TX_LAMBDA_PFILT_S_6
-346 0x7CCD //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0500 //TX_A_PEPPER
-349 0x1600 //TX_K_PEPPER_HF
-350 0x0400 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0020 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x02A6 //TX_NOISE_TH_1
-371 0x04B0 //TX_NOISE_TH_2
-372 0x3194 //TX_NOISE_TH_3
-373 0x0960 //TX_NOISE_TH_4
-374 0x5555 //TX_NOISE_TH_5
-375 0x3FF4 //TX_NOISE_TH_5_2
-376 0x0001 //TX_NOISE_TH_5_3
-377 0x0000 //TX_NOISE_TH_5_4
-378 0x02BC //TX_NOISE_TH_6
-379 0x0020 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0020 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0304 //TX_FDEQ_BIN_2
-594 0x0405 //TX_FDEQ_BIN_3
-595 0x0607 //TX_FDEQ_BIN_4
-596 0x0809 //TX_FDEQ_BIN_5
-597 0x0A0B //TX_FDEQ_BIN_6
-598 0x0C0D //TX_FDEQ_BIN_7
-599 0x0E0F //TX_FDEQ_BIN_8
-600 0x1011 //TX_FDEQ_BIN_9
-601 0x1214 //TX_FDEQ_BIN_10
-602 0x1618 //TX_FDEQ_BIN_11
-603 0x1C1C //TX_FDEQ_BIN_12
-604 0x2020 //TX_FDEQ_BIN_13
-605 0x2020 //TX_FDEQ_BIN_14
-606 0x2011 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0060 //TX_MIC_CALIBRATION_0
-766 0x0060 //TX_MIC_CALIBRATION_1
-767 0x0070 //TX_MIC_CALIBRATION_2
-768 0x0070 //TX_MIC_CALIBRATION_3
-769 0x0050 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
-772 0x0040 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
-775 0x000F //TX_GAIN_LIMIT_2
-776 0x000F //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x0C00 //TX_TDDRC_ALPHA_UP_01
-784 0x0C00 //TX_TDDRC_ALPHA_UP_02
-785 0x0C00 //TX_TDDRC_ALPHA_UP_03
-786 0x0C00 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0001 //TX_TDDRC_THRD_0
-855 0x0001 //TX_TDDRC_THRD_1
-856 0x1900 //TX_TDDRC_THRD_2
-857 0x1900 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x7B00 //TX_TDDRC_SLANT_1
-860 0x0C00 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0200 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x0064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-BTWB-RESERVE2-SWB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0001 //TX_OPERATION_MODE_0
-1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x0200 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0003 //TX_SAMPLINGFREQ_SIG
-7 0x0003 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7EFF //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x1800 //TX_THR_PITCH_DET_0
-131 0x1000 //TX_THR_PITCH_DET_1
-132 0x0800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00F0 //TX_EPD_OFFSET_00
-233 0x00F0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000B //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x2000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7900 //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0000 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0000 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x1013 //TX_FDEQ_BIN_10
-602 0x1719 //TX_FDEQ_BIN_11
-603 0x1B1E //TX_FDEQ_BIN_12
-604 0x1E1E //TX_FDEQ_BIN_13
-605 0x1E28 //TX_FDEQ_BIN_14
-606 0x282C //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4868 //TX_PREEQ_GAIN_MIC0_8
-626 0x6860 //TX_PREEQ_GAIN_MIC0_9
-627 0x6048 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0970 //TX_TDDRC_DRC_GAIN
-867 0x78D6 //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x1000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x8064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0003 //RX_SAMPLINGFREQ_SIG
-3 0x0003 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x1800 //RX_THR_PITCH_DET_0
-14 0x1000 //RX_THR_PITCH_DET_1
-15 0x0800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0400 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0x9000 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x8064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0003 //RX_SAMPLINGFREQ_SIG
-160 0x0003 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x1800 //RX_THR_PITCH_DET_0
-171 0x1000 //RX_THR_PITCH_DET_1
-172 0x0800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0400 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0x9000 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0000 //TX_SAMPLINGFREQ_SIG
-7 0x0000 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0B0B //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4242 //TX_FDEQ_GAIN_6
-574 0x423C //TX_FDEQ_GAIN_7
-575 0x3C3C //TX_FDEQ_GAIN_8
-576 0x3434 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1104 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0xA06C //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0000 //RX_SAMPLINGFREQ_SIG
-3 0x0000 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0xA06C //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0000 //RX_SAMPLINGFREQ_SIG
-160 0x0000 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0001 //TX_SAMPLINGFREQ_SIG
-7 0x0001 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0A6D //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4444 //TX_FDEQ_GAIN_7
-575 0x4444 //TX_FDEQ_GAIN_8
-576 0x3C3C //TX_FDEQ_GAIN_9
-577 0x3C3C //TX_FDEQ_GAIN_10
-578 0x3C3C //TX_FDEQ_GAIN_11
-579 0x3C30 //TX_FDEQ_GAIN_12
-580 0x3030 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1112 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0xA06C //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0001 //RX_SAMPLINGFREQ_SIG
-3 0x0001 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0xA06C //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0001 //RX_SAMPLINGFREQ_SIG
-160 0x0001 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0001 //TX_OPERATION_MODE_0
-1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A28 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0003 //TX_SAMPLINGFREQ_SIG
-7 0x0003 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7EFF //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x1800 //TX_THR_PITCH_DET_0
-131 0x1000 //TX_THR_PITCH_DET_1
-132 0x0800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00F0 //TX_EPD_OFFSET_00
-233 0x00F0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000B //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x2000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7900 //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0000 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x1013 //TX_FDEQ_BIN_10
-602 0x1719 //TX_FDEQ_BIN_11
-603 0x1B1E //TX_FDEQ_BIN_12
-604 0x1E1E //TX_FDEQ_BIN_13
-605 0x1E28 //TX_FDEQ_BIN_14
-606 0x282C //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4868 //TX_PREEQ_GAIN_MIC0_8
-626 0x6860 //TX_PREEQ_GAIN_MIC0_9
-627 0x6048 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0970 //TX_TDDRC_DRC_GAIN
-867 0x78D6 //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x1000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0xA064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0003 //RX_SAMPLINGFREQ_SIG
-3 0x0003 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x1800 //RX_THR_PITCH_DET_0
-14 0x1000 //RX_THR_PITCH_DET_1
-15 0x0800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0400 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0x9000 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x8064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0003 //RX_SAMPLINGFREQ_SIG
-160 0x0003 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x1800 //RX_THR_PITCH_DET_0
-171 0x1000 //RX_THR_PITCH_DET_1
-172 0x0800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0400 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0x9000 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0009 //TX_OPERATION_MODE_0
-1 0x0009 //TX_OPERATION_MODE_1
-2 0x0020 //TX_PATCH_REG
-3 0x286A //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0004 //TX_SAMPLINGFREQ_SIG
-7 0x0004 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0000 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7E56 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0200 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x6000 //TX_EAD_THR
-151 0x0400 //TX_THR_RE_EST
-152 0x3000 //TX_MIN_EQ_RE_EST_0
-153 0x3000 //TX_MIN_EQ_RE_EST_1
-154 0x4000 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x6000 //TX_MIN_EQ_RE_EST_6
-159 0x6000 //TX_MIN_EQ_RE_EST_7
-160 0x6000 //TX_MIN_EQ_RE_EST_8
-161 0x6000 //TX_MIN_EQ_RE_EST_9
-162 0x4000 //TX_MIN_EQ_RE_EST_10
-163 0x4000 //TX_MIN_EQ_RE_EST_11
-164 0x4000 //TX_MIN_EQ_RE_EST_12
-165 0x3000 //TX_LAMBDA_RE_EST
-166 0x4000 //TX_LAMBDA_CB_NLE
-167 0x3000 //TX_C_POST_FLT
-168 0x4500 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x5000 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7F00 //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x0800 //TX_DTD_THR2_0
-205 0x0800 //TX_DTD_THR2_1
-206 0x0800 //TX_DTD_THR2_2
-207 0x0800 //TX_DTD_THR2_3
-208 0x0800 //TX_DTD_THR2_4
-209 0x0100 //TX_DTD_THR2_5
-210 0x0100 //TX_DTD_THR2_6
-211 0x7FFF //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x03E8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00C0 //TX_EPD_OFFSET_00
-233 0x00C0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
-243 0xFB00 //TX_THR_SN_EST_1
-244 0xFA00 //TX_THR_SN_EST_2
-245 0xF700 //TX_THR_SN_EST_3
-246 0xFA00 //TX_THR_SN_EST_4
-247 0xF600 //TX_THR_SN_EST_5
-248 0xF600 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0200 //TX_DELTA_THR_SN_EST_0
-251 0x0400 //TX_DELTA_THR_SN_EST_1
-252 0x0300 //TX_DELTA_THR_SN_EST_2
-253 0x0600 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0200 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x4000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x4000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x2000 //TX_B_POST_FLT_0
-280 0x2000 //TX_B_POST_FLT_1
-281 0x0012 //TX_NS_LVL_CTRL_0
-282 0x0016 //TX_NS_LVL_CTRL_1
-283 0x0016 //TX_NS_LVL_CTRL_2
-284 0x0019 //TX_NS_LVL_CTRL_3
-285 0x0010 //TX_NS_LVL_CTRL_4
-286 0x0010 //TX_NS_LVL_CTRL_5
-287 0x0019 //TX_NS_LVL_CTRL_6
-288 0x0010 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000C //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000F //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x0011 //TX_MIN_GAIN_S_6
-296 0x000C //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7000 //TX_SNRI_SUP_0
-301 0x7000 //TX_SNRI_SUP_1
-302 0x7000 //TX_SNRI_SUP_2
-303 0x6000 //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x6000 //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x0016 //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x6000 //TX_A_POST_FILT_S_0
-315 0x6000 //TX_A_POST_FILT_S_1
-316 0x6000 //TX_A_POST_FILT_S_2
-317 0x6000 //TX_A_POST_FILT_S_3
-318 0x6000 //TX_A_POST_FILT_S_4
-319 0x6000 //TX_A_POST_FILT_S_5
-320 0x6000 //TX_A_POST_FILT_S_6
-321 0x6000 //TX_A_POST_FILT_S_7
-322 0x2000 //TX_B_POST_FILT_0
-323 0x4000 //TX_B_POST_FILT_1
-324 0x2000 //TX_B_POST_FILT_2
-325 0x2000 //TX_B_POST_FILT_3
-326 0x2000 //TX_B_POST_FILT_4
-327 0x2000 //TX_B_POST_FILT_5
-328 0x2000 //TX_B_POST_FILT_6
-329 0x2000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7CCD //TX_LAMBDA_PFILT_S_0
-340 0x7CCD //TX_LAMBDA_PFILT_S_1
-341 0x7CCD //TX_LAMBDA_PFILT_S_2
-342 0x7CCD //TX_LAMBDA_PFILT_S_3
-343 0x7CCD //TX_LAMBDA_PFILT_S_4
-344 0x7CCD //TX_LAMBDA_PFILT_S_5
-345 0x7CCD //TX_LAMBDA_PFILT_S_6
-346 0x7CCD //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0500 //TX_A_PEPPER
-349 0x1600 //TX_K_PEPPER_HF
-350 0x0400 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0020 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x02A6 //TX_NOISE_TH_1
-371 0x04B0 //TX_NOISE_TH_2
-372 0x3194 //TX_NOISE_TH_3
-373 0x0960 //TX_NOISE_TH_4
-374 0x5555 //TX_NOISE_TH_5
-375 0x3FF4 //TX_NOISE_TH_5_2
-376 0x0001 //TX_NOISE_TH_5_3
-377 0x0000 //TX_NOISE_TH_5_4
-378 0x02BC //TX_NOISE_TH_6
-379 0x0020 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0020 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0304 //TX_FDEQ_BIN_2
-594 0x0405 //TX_FDEQ_BIN_3
-595 0x0607 //TX_FDEQ_BIN_4
-596 0x0809 //TX_FDEQ_BIN_5
-597 0x0A0B //TX_FDEQ_BIN_6
-598 0x0C0D //TX_FDEQ_BIN_7
-599 0x0E0F //TX_FDEQ_BIN_8
-600 0x1011 //TX_FDEQ_BIN_9
-601 0x1214 //TX_FDEQ_BIN_10
-602 0x1618 //TX_FDEQ_BIN_11
-603 0x1C1C //TX_FDEQ_BIN_12
-604 0x2020 //TX_FDEQ_BIN_13
-605 0x2020 //TX_FDEQ_BIN_14
-606 0x2011 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0060 //TX_MIC_CALIBRATION_0
-766 0x0060 //TX_MIC_CALIBRATION_1
-767 0x0070 //TX_MIC_CALIBRATION_2
-768 0x0070 //TX_MIC_CALIBRATION_3
-769 0x0050 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
-772 0x0040 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
-775 0x000F //TX_GAIN_LIMIT_2
-776 0x000F //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x0C00 //TX_TDDRC_ALPHA_UP_01
-784 0x0C00 //TX_TDDRC_ALPHA_UP_02
-785 0x0C00 //TX_TDDRC_ALPHA_UP_03
-786 0x0C00 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0002 //TX_FILTINDX
-854 0x0001 //TX_TDDRC_THRD_0
-855 0x0001 //TX_TDDRC_THRD_1
-856 0x1900 //TX_TDDRC_THRD_2
-857 0x1900 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x7B00 //TX_TDDRC_SLANT_1
-860 0x0C00 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0200 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x0064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-BTWB_NREC-RESERVE2-SWB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0001 //TX_OPERATION_MODE_0
-1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A28 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0003 //TX_SAMPLINGFREQ_SIG
-7 0x0003 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7EFF //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x1800 //TX_THR_PITCH_DET_0
-131 0x1000 //TX_THR_PITCH_DET_1
-132 0x0800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00F0 //TX_EPD_OFFSET_00
-233 0x00F0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000B //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x2000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7900 //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0000 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x1013 //TX_FDEQ_BIN_10
-602 0x1719 //TX_FDEQ_BIN_11
-603 0x1B1E //TX_FDEQ_BIN_12
-604 0x1E1E //TX_FDEQ_BIN_13
-605 0x1E28 //TX_FDEQ_BIN_14
-606 0x282C //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4868 //TX_PREEQ_GAIN_MIC0_8
-626 0x6860 //TX_PREEQ_GAIN_MIC0_9
-627 0x6048 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0970 //TX_TDDRC_DRC_GAIN
-867 0x78D6 //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x1000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x8064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0003 //RX_SAMPLINGFREQ_SIG
-3 0x0003 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x1800 //RX_THR_PITCH_DET_0
-14 0x1000 //RX_THR_PITCH_DET_1
-15 0x0800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0400 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0x9000 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x8064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0003 //RX_SAMPLINGFREQ_SIG
-160 0x0003 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x1800 //RX_THR_PITCH_DET_0
-171 0x1000 //RX_THR_PITCH_DET_1
-172 0x0800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0400 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0x9000 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0400 //TX_DELTA_THR_SN_EST_1
+252 0x0300 //TX_DELTA_THR_SN_EST_2
+253 0x0600 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0019 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0019 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0011 //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x7000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-RESERVE1-RESERVE2-SWB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x8064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x8064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-NB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B0B //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4242 //TX_FDEQ_GAIN_6
+574 0x423C //TX_FDEQ_GAIN_7
+575 0x3C3C //TX_FDEQ_GAIN_8
+576 0x3434 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0xA06C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0xA06C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-WB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A6D //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4444 //TX_FDEQ_GAIN_7
+575 0x4444 //TX_FDEQ_GAIN_8
+576 0x3C3C //TX_FDEQ_GAIN_9
+577 0x3C3C //TX_FDEQ_GAIN_10
+578 0x3C3C //TX_FDEQ_GAIN_11
+579 0x3C30 //TX_FDEQ_GAIN_12
+580 0x3030 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1112 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0xA06C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0xA06C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0001 //RX_SAMPLINGFREQ_SIG
+160 0x0001 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0xA064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x8064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-FB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0400 //TX_DELTA_THR_SN_EST_1
+252 0x0300 //TX_DELTA_THR_SN_EST_2
+253 0x0600 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0019 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0019 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0011 //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x7000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-RESERVE2-RESERVE2-SWB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x8064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x8064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-RESERVE3-VOICE_GENERIC-FB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
2 0x0000 //TX_PATCH_REG
@@ -67910,8 +67910,8 @@
523 0x0000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
diff --git a/audio/shiba/tuning/fortemedia/HANDSET.dat b/audio/shiba/tuning/fortemedia/HANDSET.dat
index b911ef9..1cf825c 100644
Binary files a/audio/shiba/tuning/fortemedia/HANDSET.dat and b/audio/shiba/tuning/fortemedia/HANDSET.dat differ
diff --git a/audio/shiba/tuning/fortemedia/HANDSET.mods b/audio/shiba/tuning/fortemedia/HANDSET.mods
index c62a0a1..161c088 100644
--- a/audio/shiba/tuning/fortemedia/HANDSET.mods
+++ b/audio/shiba/tuning/fortemedia/HANDSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-08-28 14:39:36
+#SAVE_TIME 2023-09-13 17:44:33
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -14010,8 +14010,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16705,8 +16705,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -19400,8 +19400,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -22095,8 +22095,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24790,8 +24790,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -27485,8 +27485,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -30180,8 +30180,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -32875,8 +32875,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -35570,8 +35570,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -38265,8 +38265,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -40960,8 +40960,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -43655,8 +43655,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -46350,8 +46350,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -49045,8 +49045,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -51740,8 +51740,8 @@
523 0x6000 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -54435,8 +54435,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -57130,8 +57130,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -59825,8 +59825,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -62520,8 +62520,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
diff --git a/audio/shiba/tuning/fortemedia/HANDSFREE.dat b/audio/shiba/tuning/fortemedia/HANDSFREE.dat
index 6e99718..1180156 100644
Binary files a/audio/shiba/tuning/fortemedia/HANDSFREE.dat and b/audio/shiba/tuning/fortemedia/HANDSFREE.dat differ
diff --git a/audio/shiba/tuning/fortemedia/HANDSFREE.mods b/audio/shiba/tuning/fortemedia/HANDSFREE.mods
index 07ddb03..2b2a1e7 100644
--- a/audio/shiba/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/shiba/tuning/fortemedia/HANDSFREE.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSFREE
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-07-06 22:17:23
+#SAVE_TIME 2023-09-13 17:44:57
#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -14010,8 +14010,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16705,8 +16705,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -19400,8 +19400,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -22095,8 +22095,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24790,8 +24790,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -27485,8 +27485,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
diff --git a/audio/shiba/tuning/fortemedia/HEADSET.dat b/audio/shiba/tuning/fortemedia/HEADSET.dat
index 20ad7a6..ad04751 100644
Binary files a/audio/shiba/tuning/fortemedia/HEADSET.dat and b/audio/shiba/tuning/fortemedia/HEADSET.dat differ
diff --git a/audio/shiba/tuning/fortemedia/HEADSET.mods b/audio/shiba/tuning/fortemedia/HEADSET.mods
index ab6dda2..945c0f4 100644
--- a/audio/shiba/tuning/fortemedia/HEADSET.mods
+++ b/audio/shiba/tuning/fortemedia/HEADSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HEADSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-07-14 14:39:03
+#SAVE_TIME 2023-09-13 17:45:47
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -535,8 +535,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -3230,8 +3230,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -5925,8 +5925,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -8620,8 +8620,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -11315,8 +11315,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -14010,8 +14010,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -16705,8 +16705,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -19400,8 +19400,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -22095,8 +22095,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -24790,8 +24790,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -27485,8 +27485,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -30180,8 +30180,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -32875,8 +32875,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -35570,8 +35570,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -38265,8 +38265,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -40960,8 +40960,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -43655,8 +43655,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -46350,8 +46350,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -49045,8 +49045,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -51740,8 +51740,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -54435,8 +54435,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -57130,8 +57130,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -59825,8 +59825,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -62520,8 +62520,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -65215,8 +65215,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -67910,8 +67910,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -70605,8 +70605,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -73300,8 +73300,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -75995,8 +75995,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -78690,8 +78690,8 @@
523 0x7E2C //TX_WIDE2_MEANHTH
524 0x0064 //TX_DR_RESRV_5
525 0x1000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -81385,8 +81385,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -84080,8 +84080,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -86775,8 +86775,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -89470,8 +89470,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -92165,8 +92165,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x0000 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0028 //TX_SNR_THR
@@ -94860,8 +94860,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -97555,8 +97555,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -100250,8 +100250,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -102945,8 +102945,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
@@ -105640,8 +105640,8 @@
523 0x0064 //TX_WIDE2_MEANHTH
524 0x0000 //TX_DR_RESRV_5
525 0x0000 //TX_DR_RESRV_6
-526 0x0000 //TX_DR_RESRV_7
-527 0x0000 //TX_DR_RESRV_8
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
529 0x399A //TX_CORR_THR
530 0x0004 //TX_SNR_THR
diff --git a/audio/shiba/tuning/fortemedia/mcps.dat b/audio/shiba/tuning/fortemedia/mcps.dat
index 1c16314..7f3aeaa 100644
Binary files a/audio/shiba/tuning/fortemedia/mcps.dat and b/audio/shiba/tuning/fortemedia/mcps.dat differ
diff --git a/bluetooth/bt_vendor_overlay.conf b/bluetooth/bt_vendor_overlay.conf
index 5acb97b..82f1e65 100644
--- a/bluetooth/bt_vendor_overlay.conf
+++ b/bluetooth/bt_vendor_overlay.conf
@@ -3,9 +3,20 @@
# Uart port name
UartPort = /dev/ttySAC18
+# Userial type
+UserialType = 2
+
# Enable check whether let aoc controls power pin
AocPowerPinCtrlCheckEnable = true
+# The hardware stage does not need aoc to control power pin
+# This only affects when AocPowerPinCtrlCheckEnable is true
+HwStageDoesNotCtrlPowerPinFromAoc = PROTO1.0-EVT1.0-EVT1.2
+
+# The hardware stage with old chip revision is no longer
+# supported by BT firmware.
+HwStageWithOldChipFwNoLongerSupport = PROTO1.0-PROTO1.1
+
# Sar backOff high resolution support
SarBackOffHighResolution = true
diff --git a/bluetooth/bt_vendor_overlay_ripcurrent.conf b/bluetooth/bt_vendor_overlay_ripcurrent.conf
index 2473a1b..a4a91d5 100644
--- a/bluetooth/bt_vendor_overlay_ripcurrent.conf
+++ b/bluetooth/bt_vendor_overlay_ripcurrent.conf
@@ -3,6 +3,9 @@
# Uart port name
UartPort = /dev/ttySAC18
+# Userial type
+UserialType = 2
+
# Sar backOff high resolution support
SarBackOffHighResolution = true
diff --git a/bluetooth/le_audio_codec_capabilities.xml b/bluetooth/le_audio_codec_capabilities.xml
index 9dcdd01..f277589 100644
--- a/bluetooth/le_audio_codec_capabilities.xml
+++ b/bluetooth/le_audio_codec_capabilities.xml
@@ -47,6 +47,8 @@
+
+
@@ -65,6 +67,8 @@
+
+
@@ -73,6 +77,7 @@
+
diff --git a/conf/init.husky.rc b/conf/init.husky.rc
index c21c473..1b81446 100644
--- a/conf/init.husky.rc
+++ b/conf/init.husky.rc
@@ -94,6 +94,27 @@ on property:vendor.all.modules.ready=1
chown system system /sys/bus/i2c/devices/6-0043/default/delay_before_stop_playback_us
chown system system /sys/bus/i2c/devices/5-0043/default/delay_before_stop_playback_us
chown system system /sys/bus/i2c/devices/4-0043/default/delay_before_stop_playback_us
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/6-0043/default/pm_active_timeout_ms
+ chown system system /sys/bus/i2c/devices/5-0043/default/pm_active_timeout_ms
+ chown system system /sys/bus/i2c/devices/4-0043/default/pm_active_timeout_ms
enable vendor.vibrator.cs40l26
diff --git a/conf/init.shiba.rc b/conf/init.shiba.rc
index fe53956..e4c97a2 100644
--- a/conf/init.shiba.rc
+++ b/conf/init.shiba.rc
@@ -90,6 +90,27 @@ on property:vendor.all.modules.ready=1
chown system system /sys/bus/i2c/devices/6-0043/default/delay_before_stop_playback_us
chown system system /sys/bus/i2c/devices/5-0043/default/delay_before_stop_playback_us
chown system system /sys/bus/i2c/devices/4-0043/default/delay_before_stop_playback_us
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/6-0043/default/pm_active_timeout_ms
+ chown system system /sys/bus/i2c/devices/5-0043/default/pm_active_timeout_ms
+ chown system system /sys/bus/i2c/devices/4-0043/default/pm_active_timeout_ms
enable vendor.vibrator.cs40l26
diff --git a/device-husky.mk b/device-husky.mk
new file mode 100644
index 0000000..7ef9b87
--- /dev/null
+++ b/device-husky.mk
@@ -0,0 +1,411 @@
+#
+# Copyright (C) 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+TARGET_KERNEL_DIR ?= device/google/shusky-kernel
+TARGET_BOARD_KERNEL_HEADERS := device/google/shusky-kernel/kernel-headers
+
+LOCAL_PATH := device/google/shusky
+
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+ USE_UWBFIELDTESTQM := true
+endif
+
+$(call inherit-product-if-exists, vendor/google_devices/shusky/prebuilts/device-vendor-husky.mk)
+$(call inherit-product-if-exists, vendor/google_devices/zuma/prebuilts/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/zuma/proprietary/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/husky/device-vendor-husky.mk)
+$(call inherit-product-if-exists, vendor/google_devices/husky/proprietary/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/qorvo/uwb/qm35-hal/Device.mk)
+$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/WallpapersHusky.mk)
+
+# display
+DEVICE_PACKAGE_OVERLAYS += device/google/shusky/husky/overlay
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.ignore_hdr_camera_layers=true
+
+PRODUCT_COPY_FILES += \
+ device/google/shusky/husky/display_colordata_dev_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_dev_cal0.pb \
+ device/google/shusky/husky/display_golden_google-hk3_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_golden_google-hk3_cal0.pb
+
+include device/google/shusky/audio/husky/audio-tables.mk
+include device/google/zuma/device-shipping-common.mk
+include hardware/google/pixel/vibrator/cs40l26/device.mk
+include device/google/gs-common/bcmbt/bluetooth.mk
+include device/google/gs-common/touch/stm/stm20.mk
+include device/google/gs-common/touch/gti/gti.mk
+include device/google/gs-common/touch/touchinspector/touchinspector.mk
+
+# go/lyric-soong-variables
+$(call soong_config_set,lyric,camera_hardware,husky)
+$(call soong_config_set,lyric,tuning_product,husky)
+$(call soong_config_set,google3a_config,target_device,husky)
+
+# Init files
+PRODUCT_COPY_FILES += \
+ device/google/shusky/conf/init.husky.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.husky.rc
+
+# Recovery files
+PRODUCT_COPY_FILES += \
+ device/google/shusky/conf/init.recovery.device.rc:$(TARGET_COPY_OUT_RECOVERY)/root/init.recovery.husky.rc
+
+# MIPI Coex Configs
+PRODUCT_COPY_FILES += \
+ device/google/shusky/husky/radio/husky_camera_front_dbr_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/camera_front_dbr_coex_table.csv \
+ device/google/shusky/husky/radio/husky_camera_front_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/camera_front_mipi_coex_table.csv \
+ device/google/shusky/husky/radio/husky_camera_rear_tele_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/camera_rear_tele_mipi_coex_table.csv \
+ device/google/shusky/husky/radio/husky_display_primary_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/display_primary_mipi_coex_table.csv
+
+# Camera
+PRODUCT_COPY_FILES += \
+ device/google/shusky/media_profiles_husky.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
+
+# NFC
+PRODUCT_COPY_FILES += \
+ frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \
+ frameworks/native/data/etc/android.hardware.nfc.hce.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hce.xml \
+ frameworks/native/data/etc/android.hardware.nfc.hcef.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hcef.xml \
+ frameworks/native/data/etc/com.nxp.mifare.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/com.nxp.mifare.xml \
+ frameworks/native/data/etc/android.hardware.nfc.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.ese.xml \
+ device/google/shusky/nfc/libnfc-hal-st.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-hal-st.conf \
+ device/google/shusky/nfc/libnfc-nci.conf:$(TARGET_COPY_OUT_PRODUCT)/etc/libnfc-nci.conf
+
+PRODUCT_PACKAGES += \
+ NfcNci \
+ Tag \
+ android.hardware.nfc-service.st
+
+# SecureElement
+PRODUCT_PACKAGES += \
+ android.hardware.secure_element-service.thales
+
+PRODUCT_COPY_FILES += \
+ frameworks/native/data/etc/android.hardware.se.omapi.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.ese.xml \
+ frameworks/native/data/etc/android.hardware.se.omapi.uicc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.uicc.xml \
+ device/google/shusky/nfc/libse-gto-hal.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libse-gto-hal.conf
+
+# Bluetooth HAL
+PRODUCT_COPY_FILES += \
+ device/google/shusky/bluetooth/bt_vendor_overlay.conf:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth/bt_vendor_overlay.conf
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.bluetooth.a2dp_offload.supported=true \
+ persist.bluetooth.a2dp_offload.disabled=false \
+ persist.bluetooth.a2dp_offload.cap=sbc-aac-aptx-aptxhd-ldac-opus
+
+# Bluetooth Tx power caps
+PRODUCT_COPY_FILES += \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_husky.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_husky_CA.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_CA.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_husky_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_EU.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_husky_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_JP.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_husky_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_US.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_husky_GC3VE_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GC3VE_EU.csv
+
+# POF
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.finder.supported=true
+
+# Spatial Audio
+PRODUCT_PACKAGES += \
+ libspatialaudio
+
+# declare use of spatial audio
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.audio.spatializer_enabled=true
+
+# Audio CCA property
+PRODUCT_PROPERTY_OVERRIDES += \
+ persist.vendor.audio.cca.enabled=false
+
+# DCK properties based on target
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.gms.dck.eligible_wcc=3 \
+ ro.gms.dck.se_capability=1
+
+# Bluetooth hci_inject test tool
+PRODUCT_PACKAGES_DEBUG += \
+ hci_inject
+
+# Bluetooth OPUS codec
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.opus.enabled=true
+
+# Bluetooth SAR test tool
+PRODUCT_PACKAGES_DEBUG += \
+ sar_test
+
+# Bluetooth EWP test tool
+PRODUCT_PACKAGES_DEBUG += \
+ ewp_tool
+
+# Bluetooth AAC VBR
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.a2dp_aac.vbr_supported=true
+
+# Override BQR mask to enable LE Audio Choppy report, remove BTRT logging
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.bqr.event_mask=295006 \
+ persist.bluetooth.bqr.vnd_quality_mask=29 \
+ persist.bluetooth.bqr.vnd_trace_mask=0 \
+ persist.bluetooth.vendor.btsnoop=true
+else
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.bqr.event_mask=295006 \
+ persist.bluetooth.bqr.vnd_quality_mask=16 \
+ persist.bluetooth.bqr.vnd_trace_mask=0 \
+ persist.bluetooth.vendor.btsnoop=false
+endif
+
+# Spatial Audio
+PRODUCT_PACKAGES += \
+ libspatialaudio \
+ librondo
+
+# Bluetooth Super Wide Band
+PRODUCT_PRODUCT_PROPERTIES += \
+ bluetooth.hfp.swb.supported=true
+
+# Bluetooth LE Audio
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.leaudio_switcher.supported=true \
+ bluetooth.profile.bap.unicast.client.enabled=true \
+ bluetooth.profile.csip.set_coordinator.enabled=true \
+ bluetooth.profile.hap.client.enabled=true \
+ bluetooth.profile.mcp.server.enabled=true \
+ bluetooth.profile.ccp.server.enabled=true \
+ bluetooth.profile.vcp.controller.enabled=true
+
+# Bluetooth LE Audio enable hardware offloading
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.leaudio_offload.supported=true \
+ persist.bluetooth.leaudio_offload.disabled=false
+
+# Bluetooth LE Auido offload capabilities setting
+PRODUCT_COPY_FILES += \
+ device/google/shusky/bluetooth/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml
+
+# Bluetooth LE Audio CIS handover to SCO
+# Set the property only for the controller couldn't support CIS/SCO simultaneously. More detailed in b/242908683.
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.leaudio.notify.idle.during.call=true
+
+# Not support LE Audio dual mic SWB call based on the current launch strategy
+PRODUCT_PRODUCT_PROPERTIES += \
+ bluetooth.leaudio.dual_bidirection_swb.supported=false
+
+# Support One-Handed mode
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.support_one_handed_mode=true
+
+# Keymaster HAL
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# Gatekeeper HAL
+#LOCAL_GATEKEEPER_PRODUCT_PACKAGE ?= android.hardware.gatekeeper@1.0-service.software
+
+
+# Gatekeeper
+# PRODUCT_PACKAGES += \
+# android.hardware.gatekeeper@1.0-service.software
+
+# Keymint replaces Keymaster
+# PRODUCT_PACKAGES += \
+# android.hardware.security.keymint-service
+
+# Keymaster
+#PRODUCT_PACKAGES += \
+# android.hardware.keymaster@4.0-impl \
+# android.hardware.keymaster@4.0-service
+
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.0-service.remote
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.1-service.remote
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE := android.hardware.keymaster@4.1-service
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# PRODUCT_PROPERTY_OVERRIDES += \
+# ro.hardware.keystore_desede=true \
+# ro.hardware.keystore=software \
+# ro.hardware.gatekeeper=software
+
+# PowerStats HAL
+PRODUCT_SOONG_NAMESPACES += \
+ device/google/shusky/powerstats/husky \
+ device/google/shusky
+
+# WiFi Overlay
+PRODUCT_PACKAGES += \
+ UwbOverlayHK3 \
+ WifiOverlay2023 \
+ PixelWifiOverlay2023
+
+# Trusty liboemcrypto.so
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts
+
+# Location
+# SDK build system
+include device/google/gs-common/gps/brcm/device.mk
+
+PRODUCT_COPY_FILES += \
+ device/google/shusky/location/gps.cer:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.cer
+
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+ PRODUCT_COPY_FILES += \
+ device/google/shusky/location/lhd.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+ device/google/shusky/location/scd.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf \
+ device/google/shusky/location/gps.xml.hk3:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+else
+ PRODUCT_COPY_FILES += \
+ device/google/shusky/location/lhd_user.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+ device/google/shusky/location/scd_user.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf \
+ device/google/shusky/location/gps_user.xml.hk3:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+endif
+
+# Set zram size
+PRODUCT_VENDOR_PROPERTIES += \
+ vendor.zram.size=50p \
+ persist.device_config.configuration.disable_rescue_party=true
+
+# Fingerprint HAL
+GOODIX_CONFIG_BUILD_VERSION := g7_trusty
+include device/google/gs101/fingerprint/udfps_common.mk
+ifeq ($(filter factory%, $(TARGET_PRODUCT)),)
+include device/google/gs101/fingerprint/udfps_shipping.mk
+else
+include device/google/gs101/fingerprint/udfps_factory.mk
+endif
+
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.udfps.als_feed_forward_supported=true \
+ persist.vendor.udfps.lhbm_controlled_in_hal_supported=true
+
+# Fingerprint exposure compensation
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.udfps.auto_exposure_compensation_supported=true
+
+# Camera Vendor property
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.camera.front_720P_always_binning=true
+
+# Media Performance Class 14
+PRODUCT_PRODUCT_PROPERTIES += ro.odm.build.media_performance_class=33
+
+# config of display brightness dimming
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.0.brightness.dimming.usage?=1
+PRODUCT_VENDOR_PROPERTIES += \
+ vendor.primarydisplay.op.hs_hz=120 \
+ vendor.primarydisplay.op.ns_hz=60 \
+ vendor.primarydisplay.op.ns_min_dbv=1172
+
+# kernel idle timer for display driver
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.support_kernel_idle_timer=true
+
+# lhbm peak brightness delay: decided by kernel
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.primarydisplay.lhbm.frames_to_reach_peak_brightness=0
+
+# Display LBE
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.lbe.supported=1
+
+# blocking zone for min idle refresh rate
+PRODUCT_VENDOR_PROPERTIES += \
+ vendor.primarydisplay.min_idle_refresh_rate.default=1 \
+ vendor.primarydisplay.min_idle_refresh_rate.blocking_zone=10 \
+ vendor.primarydisplay.min_idle_refresh_rate.blocking_zone_dbv=492
+
+# Display ACL
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.0.brightness.acl.default=0
+
+# display color data
+PRODUCT_COPY_FILES += \
+ device/google/shusky/husky/panel_config_google-hk3_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/panel_config_google-hk3_cal0.pb
+
+# Vibrator HAL
+ACTUATOR_MODEL := luxshare_ict_081545
+ADAPTIVE_HAPTICS_FEATURE := adaptive_haptics_v1
+PRODUCT_VENDOR_PROPERTIES += \
+ ro.vendor.vibrator.hal.chirp.enabled=0 \
+ ro.vendor.vibrator.hal.device.mass=0.222 \
+ ro.vendor.vibrator.hal.loc.coeff=2.8 \
+ persist.vendor.vibrator.hal.context.enable=false \
+ persist.vendor.vibrator.hal.context.scale=60 \
+ persist.vendor.vibrator.hal.context.fade=true \
+ persist.vendor.vibrator.hal.context.cooldowntime=1600 \
+ persist.vendor.vibrator.hal.context.settlingtime=5000 \
+ ro.vendor.vibrator.hal.dbc.enable=true \
+ ro.vendor.vibrator.hal.dbc.envrelcoef=8353728 \
+ ro.vendor.vibrator.hal.dbc.riseheadroom=1909602 \
+ ro.vendor.vibrator.hal.dbc.fallheadroom=1909602 \
+ ro.vendor.vibrator.hal.dbc.txlvlthreshfs=2516583 \
+ ro.vendor.vibrator.hal.dbc.txlvlholdoffms=0 \
+ ro.vendor.vibrator.hal.pm.activetimeout=5
+
+# Increment the SVN for any official public releases
+PRODUCT_VENDOR_PROPERTIES += \
+ ro.vendor.build.svn=6
+
+# WLC userdebug specific
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+ PRODUCT_COPY_FILES += \
+ device/google/zuma/init.hardware.wlc.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/init.wlc.rc
+endif
+
+# Setup Wizard device-specific settings
+PRODUCT_PRODUCT_PROPERTIES += \
+ setupwizard.feature.enable_quick_start_flow=true \
+
+# Quick Start device-specific settings
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.quick_start.oem_id=00e0 \
+ ro.quick_start.device_id=husky
+
+# PKVM Memory Reclaim
+PRODUCT_VENDOR_PROPERTIES += \
+ hypervisor.memory_reclaim.supported=1
+
+# P23 Devices no longer need rlsservice
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.camera.rls_supported=false
+
+# Settings Overlay
+PRODUCT_PACKAGES += \
+ SettingsHuskyOverlay
+
+# Display RRS default Config
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += persist.vendor.display.primary.boot_config=1008x2244@120
+# TODO: b/250788756 - the property will be phased out after HWC loads user-preferred mode
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.preferred_mode=1008x2244@120
+
+# Window Extensions
+$(call inherit-product, $(SRC_TARGET_DIR)/product/window_extensions.mk)
+
+# Disable Settings large-screen optimization enabled by Window Extensions
+PRODUCT_SYSTEM_PROPERTIES += \
+ persist.settings.large_screen_opt.enabled=false
+
+# Keyboard height ratio and bottom padding in dp for portrait mode
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.com.google.ime.kb_pad_port_b=10.4 \
+ ro.com.google.ime.height_ratio=1.0
+
+# Enable camera exif model/make reporting
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.camera.exif_reveal_make_model=true
+
+# Enable DeviceAsWebcam support
+PRODUCT_VENDOR_PROPERTIES += \
+ ro.usb.uvc.enabled=true
+
+# DisplayPort should be disabled by default (b/300167292)
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.usb.displayport.enabled=0
diff --git a/device-ripcurrent.mk b/device-ripcurrent.mk
new file mode 100644
index 0000000..79406da
--- /dev/null
+++ b/device-ripcurrent.mk
@@ -0,0 +1,255 @@
+#
+# Copyright (C) 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+TARGET_KERNEL_DIR ?= device/google/shusky-kernel
+TARGET_BOARD_KERNEL_HEADERS := device/google/shusky-kernel/kernel-headers
+
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+ USE_UWBFIELDTESTQM := true
+endif
+
+$(call inherit-product-if-exists, vendor/google_devices/shusky/prebuilts/device-vendor-ripcurrent.mk)
+$(call inherit-product-if-exists, vendor/google_devices/zuma/prebuilts/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/zuma/proprietary/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/ripcurrent/device-vendor-ripcurrent.mk)
+$(call inherit-product-if-exists, vendor/qorvo/uwb/qm35-hal/Device.mk)
+
+include device/google/shusky/audio/ripcurrent/audio-tables.mk
+include device/google/zuma/device-shipping-common.mk
+include hardware/google/pixel/vibrator/cs40l26/device-stereo.mk
+include device/google/gs-common/bcmbt/bluetooth.mk
+include device/google/gs-common/gps/brcm/cbd_gps.mk
+include device/google/gs-common/touch/stm/stm20.mk
+
+# go/lyric-soong-variables
+$(call soong_config_set,lyric,camera_hardware,ripcurrent)
+$(call soong_config_set,lyric,tuning_product,ripcurrent)
+$(call soong_config_set,google3a_config,target_device,ripcurrent)
+
+# display
+DEVICE_PACKAGE_OVERLAYS += device/google/shusky/ripcurrent/overlay
+
+# Init files
+PRODUCT_COPY_FILES += \
+ device/google/shusky/conf/init.ripcurrent.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.ripcurrent.rc
+
+# Recovery files
+PRODUCT_COPY_FILES += \
+ device/google/shusky/conf/init.recovery.device.rc:$(TARGET_COPY_OUT_RECOVERY)/root/init.recovery.ripcurrent.rc
+
+# Camera
+PRODUCT_COPY_FILES += \
+ device/google/shusky/media_profiles_ripcurrent.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
+
+# NFC
+PRODUCT_COPY_FILES += \
+ frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \
+ frameworks/native/data/etc/android.hardware.nfc.hce.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hce.xml \
+ frameworks/native/data/etc/android.hardware.nfc.hcef.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hcef.xml \
+ frameworks/native/data/etc/com.nxp.mifare.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/com.nxp.mifare.xml \
+ frameworks/native/data/etc/android.hardware.nfc.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.ese.xml \
+ device/google/shusky/nfc/libnfc-hal-st-disable.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-hal-st.conf \
+ device/google/shusky/nfc/libnfc-hal-st.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-hal-st-enable.conf \
+ device/google/shusky/nfc/libnfc-nci.conf:$(TARGET_COPY_OUT_PRODUCT)/etc/libnfc-nci.conf
+
+PRODUCT_PACKAGES += \
+ NfcNci \
+ Tag \
+ android.hardware.nfc-service.st
+
+# SecureElement
+PRODUCT_PACKAGES += \
+ android.hardware.secure_element-service.thales
+
+PRODUCT_COPY_FILES += \
+ frameworks/native/data/etc/android.hardware.se.omapi.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.ese.xml \
+ frameworks/native/data/etc/android.hardware.se.omapi.uicc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.uicc.xml \
+ device/google/shusky/nfc/libse-gto-hal-disable.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libse-gto-hal.conf
+
+
+# Bluetooth HAL
+PRODUCT_COPY_FILES += \
+ device/google/shusky/bluetooth/bt_vendor_overlay_ripcurrent.conf:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth/bt_vendor_overlay.conf
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.bluetooth.a2dp_offload.supported=true \
+ persist.bluetooth.a2dp_offload.disabled=false \
+ persist.bluetooth.a2dp_offload.cap=sbc-aac-aptx-aptxhd-ldac-opus
+
+# Spatial Audio
+PRODUCT_PACKAGES += \
+ libspatialaudio
+
+# declare use of spatial audio
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.audio.spatializer_enabled=true
+
+# Bluetooth hci_inject test tool
+PRODUCT_PACKAGES_DEBUG += \
+ hci_inject
+
+# Bluetooth OPUS codec
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.opus.enabled=true
+
+# Bluetooth SAR test tool
+PRODUCT_PACKAGES_DEBUG += \
+ sar_test
+
+# Bluetooth EWP test tool
+PRODUCT_PACKAGES_DEBUG += \
+ ewp_tool
+
+# Bluetooth AAC VBR
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.a2dp_aac.vbr_supported=true
+
+# Override BQR mask to enable LE Audio Choppy report, remove BTRT logging
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.bqr.event_mask=295006 \
+ persist.bluetooth.bqr.vnd_quality_mask=29 \
+ persist.bluetooth.bqr.vnd_trace_mask=0
+else
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.bqr.event_mask=295006 \
+ persist.bluetooth.bqr.vnd_quality_mask=16 \
+ persist.bluetooth.bqr.vnd_trace_mask=0
+endif
+
+# default BDADDR for EVB only
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.vendor.bluetooth.evb_bdaddr="22:22:22:33:44:55"
+
+# Spatial Audio
+PRODUCT_PACKAGES += \
+ libspatialaudio \
+ librondo
+
+# Bluetooth Super Wide Band
+PRODUCT_PRODUCT_PROPERTIES += \
+ bluetooth.hfp.swb.supported=true
+
+# Bluetooth LE Audio
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.leaudio_switcher.supported=true \
+ bluetooth.profile.bap.unicast.client.enabled=true \
+ bluetooth.profile.csip.set_coordinator.enabled=true \
+ bluetooth.profile.hap.client.enabled=true \
+ bluetooth.profile.mcp.server.enabled=true \
+ bluetooth.profile.ccp.server.enabled=true \
+ bluetooth.profile.vcp.controller.enabled=true
+
+# Bluetooth LE Audio enable hardware offloading
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.leaudio_offload.supported=true \
+ persist.bluetooth.leaudio_offload.disabled=false
+
+# Bluetooth LE Auido offload capabilities setting
+PRODUCT_COPY_FILES += \
+ device/google/shusky/bluetooth/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml
+
+# Bluetooth LE Audio CIS handover to SCO
+# Set the property only for the controller couldn't support CIS/SCO simultaneously. More detailed in b/242908683.
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.leaudio.notify.idle.during.call=true
+
+# Not support LE Audio dual mic SWB call based on the current launch strategy
+PRODUCT_PRODUCT_PROPERTIES += \
+ bluetooth.leaudio.dual_bidirection_swb.supported=false
+
+# Keymaster HAL
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# Gatekeeper HAL
+#LOCAL_GATEKEEPER_PRODUCT_PACKAGE ?= android.hardware.gatekeeper@1.0-service.software
+
+
+# Gatekeeper
+# PRODUCT_PACKAGES += \
+# android.hardware.gatekeeper@1.0-service.software
+
+# Keymint replaces Keymaster
+# PRODUCT_PACKAGES += \
+# android.hardware.security.keymint-service
+
+# Keymaster
+#PRODUCT_PACKAGES += \
+# android.hardware.keymaster@4.0-impl \
+# android.hardware.keymaster@4.0-service
+
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.0-service.remote
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.1-service.remote
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE := android.hardware.keymaster@4.1-service
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# PRODUCT_PROPERTY_OVERRIDES += \
+# ro.hardware.keystore_desede=true \
+# ro.hardware.keystore=software \
+# ro.hardware.gatekeeper=software
+
+# PowerStats HAL
+PRODUCT_SOONG_NAMESPACES += \
+ device/google/shusky/powerstats/ripcurrent
+
+# WiFi Overlay
+PRODUCT_PACKAGES += \
+ WifiOverlay2023
+
+# Trusty liboemcrypto.so
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts
+
+# Location
+# SDK build system
+include device/google/gs-common/gps/brcm/device.mk
+
+PRODUCT_COPY_FILES += \
+ device/google/shusky/location/gps.cer:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.cer
+
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+ PRODUCT_COPY_FILES += \
+ device/google/shusky/location/lhd.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+ device/google/shusky/location/scd.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf \
+ device/google/shusky/location/gps.xml:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+else
+ PRODUCT_COPY_FILES += \
+ device/google/shusky/location/lhd_user.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+ device/google/shusky/location/scd_user.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf \
+ device/google/shusky/location/gps_user.xml:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+endif
+
+# Set zram size
+PRODUCT_VENDOR_PROPERTIES += \
+ vendor.zram.size=50p \
+ persist.device_config.configuration.disable_rescue_party=true
+
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.udfps.als_feed_forward_supported=true \
+ persist.vendor.udfps.lhbm_controlled_in_hal_supported=true
+
+# Camera Vendor property
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.camera.front_720P_always_binning=true
+
+# Vibrator HAL
+ACTUATOR_MODEL := luxshare_ict_081545
+PRODUCT_VENDOR_PROPERTIES += \
+ ro.vendor.vibrator.hal.chirp.enabled=0 \
+ ro.vendor.vibrator.hal.device.mass=0.222 \
+ ro.vendor.vibrator.hal.loc.coeff=2.8
+
+# PKVM Memory Reclaim
+PRODUCT_VENDOR_PROPERTIES += \
+ hypervisor.memory_reclaim.supported=1
diff --git a/device-shiba.mk b/device-shiba.mk
new file mode 100644
index 0000000..e523ae0
--- /dev/null
+++ b/device-shiba.mk
@@ -0,0 +1,386 @@
+#
+# Copyright (C) 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+TARGET_KERNEL_DIR ?= device/google/shusky-kernel
+TARGET_BOARD_KERNEL_HEADERS := device/google/shusky-kernel/kernel-headers
+
+LOCAL_PATH := device/google/shusky
+
+$(call inherit-product-if-exists, vendor/google_devices/shusky/prebuilts/device-vendor-shiba.mk)
+$(call inherit-product-if-exists, vendor/google_devices/zuma/prebuilts/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/zuma/proprietary/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/shiba/device-vendor-shiba.mk)
+$(call inherit-product-if-exists, vendor/google_devices/shiba/proprietary/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/WallpapersShiba.mk)
+
+DEVICE_PACKAGE_OVERLAYS += device/google/shusky/shiba/overlay
+
+include device/google/shusky/audio/shiba/audio-tables.mk
+include device/google/zuma/device-shipping-common.mk
+include hardware/google/pixel/vibrator/cs40l26/device.mk
+include device/google/gs-common/bcmbt/bluetooth.mk
+include device/google/gs-common/touch/gti/gti.mk
+
+# go/lyric-soong-variables
+$(call soong_config_set,lyric,camera_hardware,shiba)
+$(call soong_config_set,lyric,tuning_product,shiba)
+$(call soong_config_set,google3a_config,target_device,shiba)
+
+# Init files
+PRODUCT_COPY_FILES += \
+ device/google/shusky/conf/init.shiba.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.shiba.rc
+
+# Recovery files
+PRODUCT_COPY_FILES += \
+ device/google/shusky/conf/init.recovery.device.rc:$(TARGET_COPY_OUT_RECOVERY)/root/init.recovery.shiba.rc
+
+# MIPI Coex Configs
+PRODUCT_COPY_FILES += \
+ device/google/shusky/shiba/radio/shiba_camera_front_dbr_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/camera_front_dbr_coex_table.csv \
+ device/google/shusky/shiba/radio/shiba_camera_front_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/camera_front_mipi_coex_table.csv \
+ device/google/shusky/shiba/radio/shiba_display_primary_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/display_primary_mipi_coex_table.csv
+
+# Camera
+PRODUCT_COPY_FILES += \
+ device/google/shusky/media_profiles_shiba.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
+PRODUCT_PROPERTY_OVERRIDES += \
+ persist.vendor.camera.rls_range_supported=false
+
+# NFC
+PRODUCT_COPY_FILES += \
+ frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \
+ frameworks/native/data/etc/android.hardware.nfc.hce.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hce.xml \
+ frameworks/native/data/etc/android.hardware.nfc.hcef.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hcef.xml \
+ frameworks/native/data/etc/com.nxp.mifare.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/com.nxp.mifare.xml \
+ frameworks/native/data/etc/android.hardware.nfc.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.ese.xml \
+ device/google/shusky/nfc/libnfc-hal-st.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-hal-st.conf \
+ device/google/shusky/nfc/libnfc-nci.conf:$(TARGET_COPY_OUT_PRODUCT)/etc/libnfc-nci.conf
+
+PRODUCT_PACKAGES += \
+ NfcNci \
+ Tag \
+ android.hardware.nfc-service.st
+
+# SecureElement
+PRODUCT_PACKAGES += \
+ android.hardware.secure_element-service.thales
+
+PRODUCT_COPY_FILES += \
+ frameworks/native/data/etc/android.hardware.se.omapi.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.ese.xml \
+ frameworks/native/data/etc/android.hardware.se.omapi.uicc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.uicc.xml \
+ device/google/shusky/nfc/libse-gto-hal.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libse-gto-hal.conf
+
+# Bluetooth HAL
+PRODUCT_COPY_FILES += \
+ device/google/shusky/bluetooth/bt_vendor_overlay.conf:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth/bt_vendor_overlay.conf
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.bluetooth.a2dp_offload.supported=true \
+ persist.bluetooth.a2dp_offload.disabled=false \
+ persist.bluetooth.a2dp_offload.cap=sbc-aac-aptx-aptxhd-ldac-opus
+
+# Bluetooth Tx power caps
+PRODUCT_COPY_FILES += \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_CA.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_CA.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_EU.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_JP.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_US.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_GKWS6_CA.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GKWS6_CA.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_GKWS6_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GKWS6_EU.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_GKWS6_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GKWS6_JP.csv \
+ $(LOCAL_PATH)/bluetooth/bluetooth_power_limits_shiba_GKWS6_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GKWS6_US.csv
+
+# POF
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.finder.supported=true
+
+# Spatial Audio
+PRODUCT_PACKAGES += \
+ libspatialaudio
+
+# declare use of spatial audio
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.audio.spatializer_enabled=true
+
+# Audio CCA property
+PRODUCT_PROPERTY_OVERRIDES += \
+ persist.vendor.audio.cca.enabled=false
+
+# DCK properties based on target
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.gms.dck.eligible_wcc=2 \
+ ro.gms.dck.se_capability=1
+
+# Bluetooth hci_inject test tool
+PRODUCT_PACKAGES_DEBUG += \
+ hci_inject
+
+# Bluetooth OPUS codec
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.opus.enabled=true
+
+# Bluetooth SAR test tool
+PRODUCT_PACKAGES_DEBUG += \
+ sar_test
+
+# Bluetooth EWP test tool
+PRODUCT_PACKAGES_DEBUG += \
+ ewp_tool
+
+# Bluetooth AAC VBR
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.a2dp_aac.vbr_supported=true
+
+# Override BQR mask to enable LE Audio Choppy report, remove BTRT logging
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.bqr.event_mask=295006 \
+ persist.bluetooth.bqr.vnd_quality_mask=29 \
+ persist.bluetooth.bqr.vnd_trace_mask=0 \
+ persist.bluetooth.vendor.btsnoop=true
+else
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.bqr.event_mask=295006 \
+ persist.bluetooth.bqr.vnd_quality_mask=16 \
+ persist.bluetooth.bqr.vnd_trace_mask=0 \
+ persist.bluetooth.vendor.btsnoop=false
+endif
+
+# Spatial Audio
+PRODUCT_PACKAGES += \
+ libspatialaudio \
+ librondo
+
+# Bluetooth Super Wide Band
+PRODUCT_PRODUCT_PROPERTIES += \
+ bluetooth.hfp.swb.supported=true
+
+# Bluetooth LE Audio
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.leaudio_switcher.supported=true \
+ bluetooth.profile.bap.unicast.client.enabled=true \
+ bluetooth.profile.csip.set_coordinator.enabled=true \
+ bluetooth.profile.hap.client.enabled=true \
+ bluetooth.profile.mcp.server.enabled=true \
+ bluetooth.profile.ccp.server.enabled=true \
+ bluetooth.profile.vcp.controller.enabled=true
+
+# Bluetooth LE Audio enable hardware offloading
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.bluetooth.leaudio_offload.supported=true \
+ persist.bluetooth.leaudio_offload.disabled=false
+
+# Bluetooth LE Auido offload capabilities setting
+PRODUCT_COPY_FILES += \
+ device/google/shusky/bluetooth/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml
+
+# Bluetooth LE Audio CIS handover to SCO
+# Set the property only for the controller couldn't support CIS/SCO simultaneously. More detailed in b/242908683.
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.leaudio.notify.idle.during.call=true
+
+# Not support LE Audio dual mic SWB call based on the current launch strategy
+PRODUCT_PRODUCT_PROPERTIES += \
+ bluetooth.leaudio.dual_bidirection_swb.supported=false
+
+# Support One-Handed mode
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.support_one_handed_mode=true
+
+# Keymaster HAL
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# Gatekeeper HAL
+#LOCAL_GATEKEEPER_PRODUCT_PACKAGE ?= android.hardware.gatekeeper@1.0-service.software
+
+
+# Gatekeeper
+# PRODUCT_PACKAGES += \
+# android.hardware.gatekeeper@1.0-service.software
+
+# Keymint replaces Keymaster
+# PRODUCT_PACKAGES += \
+# android.hardware.security.keymint-service
+
+# Keymaster
+#PRODUCT_PACKAGES += \
+# android.hardware.keymaster@4.0-impl \
+# android.hardware.keymaster@4.0-service
+
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.0-service.remote
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.1-service.remote
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE := android.hardware.keymaster@4.1-service
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# PRODUCT_PROPERTY_OVERRIDES += \
+# ro.hardware.keystore_desede=true \
+# ro.hardware.keystore=software \
+# ro.hardware.gatekeeper=software
+
+# PowerStats HAL
+PRODUCT_SOONG_NAMESPACES += \
+ device/google/shusky/powerstats/shiba \
+ device/google/shusky
+
+# WiFi Overlay
+PRODUCT_PACKAGES += \
+ WifiOverlay2023 \
+ PixelWifiOverlay2023
+
+# Trusty liboemcrypto.so
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts
+
+# Location
+# SDK build system
+include device/google/gs-common/gps/brcm/device.mk
+
+PRODUCT_COPY_FILES += \
+ device/google/shusky/location/gps.cer:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.cer
+
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+ PRODUCT_COPY_FILES += \
+ device/google/shusky/location/lhd.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+ device/google/shusky/location/scd.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf \
+ device/google/shusky/location/gps.xml.sb3:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+else
+ PRODUCT_COPY_FILES += \
+ device/google/shusky/location/lhd_user.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+ device/google/shusky/location/scd_user.conf:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf \
+ device/google/shusky/location/gps_user.xml.sb3:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+endif
+
+# Set zram size
+PRODUCT_VENDOR_PROPERTIES += \
+ vendor.zram.size=50p \
+ persist.device_config.configuration.disable_rescue_party=true
+
+# Fingerprint HAL
+GOODIX_CONFIG_BUILD_VERSION := g7_trusty
+include device/google/gs101/fingerprint/udfps_common.mk
+ifeq ($(filter factory%, $(TARGET_PRODUCT)),)
+include device/google/gs101/fingerprint/udfps_shipping.mk
+else
+include device/google/gs101/fingerprint/udfps_factory.mk
+endif
+
+# Fingerprint exposure compensation
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.udfps.auto_exposure_compensation_supported=true
+
+# Display
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.set_idle_timer_ms=1500
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.ignore_hdr_camera_layers=true
+# lhbm peak brightness delay: decided by kernel
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.primarydisplay.lhbm.frames_to_reach_peak_brightness=0
+
+# display color data
+PRODUCT_COPY_FILES += \
+ device/google/shusky/shiba/panel_config_google-bigsurf_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/panel_config_google-bigsurf_cal0.pb \
+ device/google/shusky/shiba/panel_config_google-shoreline_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/panel_config_google-shoreline_cal0.pb
+
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.udfps.als_feed_forward_supported=true \
+ persist.vendor.udfps.lhbm_controlled_in_hal_supported=true
+
+PRODUCT_COPY_FILES += \
+ device/google/shusky/shiba/display_colordata_google-bigsurf_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_google-bigsurf_cal0.pb \
+ device/google/shusky/shiba/display_colordata_google-shoreline_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_google-shoreline_cal0.pb \
+ device/google/shusky/shiba/display_golden_google-bigsurf_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_golden_google-bigsurf_cal0.pb \
+ device/google/shusky/shiba/display_golden_google-shoreline_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_golden_google-shoreline_cal0.pb
+
+# Camera Vendor property
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.camera.front_720P_always_binning=true
+
+# Media Performance Class 14
+PRODUCT_PRODUCT_PROPERTIES += ro.odm.build.media_performance_class=33
+
+# Display LBE
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.lbe.supported=1
+
+# Vibrator HAL
+ACTUATOR_MODEL := luxshare_ict_081545
+ADAPTIVE_HAPTICS_FEATURE := adaptive_haptics_v1
+PRODUCT_VENDOR_PROPERTIES += \
+ ro.vendor.vibrator.hal.chirp.enabled=0 \
+ ro.vendor.vibrator.hal.device.mass=0.187 \
+ ro.vendor.vibrator.hal.loc.coeff=2.75 \
+ persist.vendor.vibrator.hal.context.enable=false \
+ persist.vendor.vibrator.hal.context.scale=60 \
+ persist.vendor.vibrator.hal.context.fade=true \
+ persist.vendor.vibrator.hal.context.cooldowntime=1600 \
+ persist.vendor.vibrator.hal.context.settlingtime=5000 \
+ ro.vendor.vibrator.hal.dbc.enable=true \
+ ro.vendor.vibrator.hal.dbc.envrelcoef=8353728 \
+ ro.vendor.vibrator.hal.dbc.riseheadroom=1909602 \
+ ro.vendor.vibrator.hal.dbc.fallheadroom=1909602 \
+ ro.vendor.vibrator.hal.dbc.txlvlthreshfs=2516583 \
+ ro.vendor.vibrator.hal.dbc.txlvlholdoffms=0 \
+ ro.vendor.vibrator.hal.pm.activetimeout=5
+
+# Increment the SVN for any official public releases
+PRODUCT_VENDOR_PROPERTIES += \
+ ro.vendor.build.svn=6
+
+# P23 Devices no longer need rlsservice
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.camera.rls_supported=false
+
+# WLC userdebug specific
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+ PRODUCT_COPY_FILES += \
+ device/google/zuma/init.hardware.wlc.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/init.wlc.rc
+endif
+
+# Setup Wizard device-specific settings
+PRODUCT_PRODUCT_PROPERTIES += \
+ setupwizard.feature.enable_quick_start_flow=true \
+
+# Quick Start device-specific settings
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.quick_start.oem_id=00e0 \
+ ro.quick_start.device_id=shiba
+
+# PKVM Memory Reclaim
+PRODUCT_VENDOR_PROPERTIES += \
+ hypervisor.memory_reclaim.supported=1
+
+# Settings Overlay
+PRODUCT_PACKAGES += \
+ SettingsShibaOverlay
+
+# Window Extensions
+$(call inherit-product, $(SRC_TARGET_DIR)/product/window_extensions.mk)
+
+# Disable Settings large-screen optimization enabled by Window Extensions
+PRODUCT_SYSTEM_PROPERTIES += \
+ persist.settings.large_screen_opt.enabled=false
+
+# Keyboard bottom padding in dp for portrait mode
+PRODUCT_PRODUCT_PROPERTIES += \
+ ro.com.google.ime.kb_pad_port_b=8
+
+# Enable camera exif model/make reporting
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.camera.exif_reveal_make_model=true
+
+# Enable DeviceAsWebcam support
+PRODUCT_VENDOR_PROPERTIES += \
+ ro.usb.uvc.enabled=true
+
+# DisplayPort should be disabled by default (b/300167292)
+PRODUCT_VENDOR_PROPERTIES += \
+ persist.vendor.usb.displayport.enabled=0
diff --git a/factory_husky.mk b/factory_husky.mk
index 54cbdd7..5c2c0ce 100644
--- a/factory_husky.mk
+++ b/factory_husky.mk
@@ -19,6 +19,9 @@ TARGET_LINUX_KERNEL_VERSION := 5.15
$(call inherit-product, device/google/zuma/factory_common.mk)
$(call inherit-product, device/google/shusky/device-husky.mk)
include device/google/shusky/audio/husky/factory-audio-tables.mk
+# Override to factory SDK
+$(call soong_config_set, gpssdk, sdkv1, True)
+$(call soong_config_set, gpssdk, gpsmcuversion, gpsv1_$(TARGET_BUILD_VARIANT))
PRODUCT_NAME := factory_husky
PRODUCT_DEVICE := husky
diff --git a/factory_ripcurrent.mk b/factory_ripcurrent.mk
index 37d0f63..b7c64c5 100644
--- a/factory_ripcurrent.mk
+++ b/factory_ripcurrent.mk
@@ -19,6 +19,9 @@ TARGET_LINUX_KERNEL_VERSION := 5.15
$(call inherit-product, device/google/zuma/factory_common.mk)
$(call inherit-product, device/google/shusky/device-ripcurrent.mk)
include device/google/shusky/audio/ripcurrent/factory-audio-tables.mk
+# Override to factory SDK
+$(call soong_config_set, gpssdk, sdkv1, True)
+$(call soong_config_set, gpssdk, gpsmcuversion, gpsv1_$(TARGET_BUILD_VARIANT))
PRODUCT_NAME := factory_ripcurrent
PRODUCT_DEVICE := ripcurrent
diff --git a/factory_shiba.mk b/factory_shiba.mk
index 365a2f1..d20f113 100644
--- a/factory_shiba.mk
+++ b/factory_shiba.mk
@@ -19,6 +19,9 @@ TARGET_LINUX_KERNEL_VERSION := 5.15
$(call inherit-product, device/google/zuma/factory_common.mk)
$(call inherit-product, device/google/shusky/device-shiba.mk)
include device/google/shusky/audio/shiba/factory-audio-tables.mk
+# Override to factory SDK
+$(call soong_config_set, gpssdk, sdkv1, True)
+$(call soong_config_set, gpssdk, gpsmcuversion, gpsv1_$(TARGET_BUILD_VARIANT))
PRODUCT_NAME := factory_shiba
PRODUCT_DEVICE := shiba
diff --git a/fullmte-common.mk b/fullmte-common.mk
deleted file mode 100644
index 1591a33..0000000
--- a/fullmte-common.mk
+++ /dev/null
@@ -1,2 +0,0 @@
-BOARD_KERNEL_CMDLINE += bootloader.pixel.MTE_FORCE_ON
-PRODUCT_PRODUCT_PROPERTIES += persist.arm64.memtag.default=sync
diff --git a/fullmte-vars.mk b/fullmte-vars.mk
deleted file mode 100644
index c8c87ff..0000000
--- a/fullmte-vars.mk
+++ /dev/null
@@ -1,4 +0,0 @@
-ifeq ($(filter memtag_heap,$(SANITIZE_TARGET)),)
- SANITIZE_TARGET := $(strip $(SANITIZE_TARGET) memtag_heap memtag_stack)
- SANITIZE_TARGET_DIAG := $(strip $(SANITIZE_TARGET_DIAG) memtag_heap)
-endif
diff --git a/husky/overlay/frameworks/base/core/res/res/values/config.xml b/husky/overlay/frameworks/base/core/res/res/values/config.xml
index 53e81f7..327a3af 100644
--- a/husky/overlay/frameworks/base/core/res/res/values/config.xml
+++ b/husky/overlay/frameworks/base/core/res/res/values/config.xml
@@ -48,18 +48,8 @@
- 0.087114228
-
-
-
- - 2
-
-
- - 5
-
-
-
- 120
+
+ true
- 4
+ 5
diff --git a/husky/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml b/husky/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
index 7b628bc..8cec238 100644
--- a/husky/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
+++ b/husky/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
@@ -26,4 +26,6 @@
57px
+
+ 19px
diff --git a/location/gps.xml b/location/gps.xml
index 87364f4..774e206 100644
--- a/location/gps.xml
+++ b/location/gps.xml
@@ -58,10 +58,12 @@
AssertEnabled="true"
CpLppeCancelDbhOnAgnssProvideLoc="true"
CpLppeUseAgnssLocForEmptyDbh="true"
+ CpLppHighAccuracyShapeMode="1"
ReAidingOnHotStart="false"
ReAidingIntervalSec="1200"
RuntimeSwLteFilterEnable="true"
MaxThreadNum="13"
+ SensorsMask="0x244"
/>
- 0.098176353
+
+ true
+
- M 504,66.5
- a 36,36 0 0 1 72,0
- a 36,36 0 0 1 -72,0
- Z
+ m 576,65.75 a 36.25,36.25 0 0 0 -72.5,0 36.25,36.25 0 0 0 72.5,0 z
@left
diff --git a/shiba/overlay/frameworks/base/packages/SystemUI/res/values/config.xml b/shiba/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
index a67e26b..2927e27 100644
--- a/shiba/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
+++ b/shiba/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
@@ -49,10 +49,7 @@
- M 489.5,66
- a 50,50 0 0 1 100,0
- a 50,50 0 0 1 -100,0
- Z
+ m 589,65.75 a 49.25,49.25 0 0 0 -98.5,0 49.25,49.25 0 0 0 98.5,0 z
diff --git a/shiba/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml b/shiba/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
index 408d919..0592ba2 100644
--- a/shiba/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
+++ b/shiba/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
@@ -23,4 +23,11 @@
1000px
1160px
+
+ 50px
+
+
+ 6px
+ 17px
diff --git a/shiba/overlay/packages/apps/Nfc/res/values/config.xml b/shiba/overlay/packages/apps/Nfc/res/values/config.xml
index 3f325b8..5bdeca6 100644
--- a/shiba/overlay/packages/apps/Nfc/res/values/config.xml
+++ b/shiba/overlay/packages/apps/Nfc/res/values/config.xml
@@ -20,7 +20,6 @@
- GKWS6
- GZPF0
- GPJ41
- - G9BQD
true
diff --git a/thermal/thermal_info_config_charge_husky.json b/thermal/thermal_info_config_charge_husky.json
index 59fa1f8..626c2b4 100644
--- a/thermal/thermal_info_config_charge_husky.json
+++ b/thermal/thermal_info_config_charge_husky.json
@@ -129,15 +129,40 @@
"Offset":1140,
"Multiplier":0.001
},
+ {
+ "Name":"thb_hda",
+ "Type":"UNKNOWN",
+ "Multiplier":1
+ },
+ {
+ "Name":"IS_WLC",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "Formula":"COUNT_THRESHOLD",
+ "Combination":["thb_hda"],
+ "Coefficient":[1],
+ "Multiplier":1
+ },
{
"Name":"VIRTUAL-SKIN-CHARGE",
"Type":"UNKNOWN",
"Version":"4.0",
"VirtualSensor":true,
- "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE-SUB-0", "VIRTUAL-SKIN-CHARGE-SUB-1", "VIRTUAL-SKIN-CHARGE-SUB-2", "VIRTUAL-SKIN-CHARGE-SUB-3"],
"Coefficient":[1.0, 1.0, 1.0, 1.0],
+ "Multiplier":0.001
+ },
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-WIRED",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"WEIGHTED_AVG",
+ "Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
+ "Coefficient":[1.0, -1000000],
"HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
@@ -172,6 +197,49 @@
}
]
},
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-PERSIST",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"MAXIMUM",
+ "Combination":["VIRTUAL-SKIN-CHARGE"],
+ "Coefficient":[1.0],
+ "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
+ "Multiplier":0.001,
+ "PollingDelay":60000,
+ "PassiveDelay":7000,
+ "PIDInfo": {
+ "K_Po":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
+ "K_Pu":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
+ "K_I":["NAN", "NAN", 27, "NAN", "NAN", "NAN", "NAN"],
+ "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "I_Max":["NAN", "NAN", 1383, "NAN", "NAN", "NAN", "NAN"],
+ "S_Power":["NAN", "NAN", 2383, "NAN", "NAN", "NAN", "NAN"],
+ "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "MaxAllocPower":["NAN", "NAN", 8022, "NAN", "NAN", "NAN", "NAN"],
+ "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "I_Default":1383
+ },
+ "ExcludedPowerInfo": [
+ {
+ "PowerRail": "PARTIAL_SYSTEM_POWER",
+ "PowerWeight": [0.21, 0.21, 0.21, 0.21, 0.42, 0.42, 0.42]
+ }
+ ],
+ "BindedCdevInfo": [
+ {
+ "CdevRequest": "chg_mdis",
+ "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+ "MaxReleaseStep": 1,
+ "MaxThrottleStep": 1,
+ "CdevCeiling": [0, 25, 25, 26, 26, 26, 26],
+ "LimitInfo": [0, 0, 1, 1, 26, 26, 26]
+ }
+ ]
+ },
{
"Name":"USB-MINUS-NEUTRAL",
"Type":"UNKNOWN",
diff --git a/thermal/thermal_info_config_charge_shiba.json b/thermal/thermal_info_config_charge_shiba.json
index f73e8f2..a7d5436 100644
--- a/thermal/thermal_info_config_charge_shiba.json
+++ b/thermal/thermal_info_config_charge_shiba.json
@@ -162,15 +162,40 @@
"Offset":-5080,
"Multiplier":0.001
},
+ {
+ "Name":"thb_hda",
+ "Type":"UNKNOWN",
+ "Multiplier":1
+ },
+ {
+ "Name":"IS_WLC",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "Formula":"COUNT_THRESHOLD",
+ "Combination":["thb_hda"],
+ "Coefficient":[1],
+ "Multiplier":1
+ },
{
"Name":"VIRTUAL-SKIN-CHARGE",
"Type":"UNKNOWN",
"Version":"4.0",
"VirtualSensor":true,
- "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "neutral_therm", "quiet_therm", "usb_pwr_therm"],
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE-SUB-0", "VIRTUAL-SKIN-CHARGE-SUB-1", "VIRTUAL-SKIN-CHARGE-SUB-2", "VIRTUAL-SKIN-CHARGE-SUB-3", "VIRTUAL-SKIN-CHARGE-SUB-4", "VIRTUAL-SKIN-CHARGE-SUB-5", "VIRTUAL-SKIN-CHARGE-SUB-6"],
"Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
+ "Multiplier":0.001
+ },
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-WIRED",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "neutral_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"WEIGHTED_AVG",
+ "Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
+ "Coefficient":[1.0, -1000000],
"HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
@@ -205,6 +230,49 @@
}
]
},
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-PERSIST",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "neutral_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"MAXIMUM",
+ "Combination":["VIRTUAL-SKIN-CHARGE"],
+ "Coefficient":[1.0],
+ "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
+ "Multiplier":0.001,
+ "PollingDelay":60000,
+ "PassiveDelay":7000,
+ "PIDInfo": {
+ "K_Po":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
+ "K_Pu":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
+ "K_I":["NAN", "NAN", 21, "NAN", "NAN", "NAN", "NAN"],
+ "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "I_Max":["NAN", "NAN", 1066, "NAN", "NAN", "NAN", "NAN"],
+ "S_Power":["NAN", "NAN", 2066, "NAN", "NAN", "NAN", "NAN"],
+ "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "MaxAllocPower":["NAN", "NAN", 6412, "NAN", "NAN", "NAN", "NAN"],
+ "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "I_Default":1066
+ },
+ "ExcludedPowerInfo": [
+ {
+ "PowerRail": "PARTIAL_SYSTEM_POWER",
+ "PowerWeight": [0.16, 0.16, 0.16, 0.16, 0.32, 0.32, 0.32]
+ }
+ ],
+ "BindedCdevInfo": [
+ {
+ "CdevRequest": "chg_mdis",
+ "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+ "MaxReleaseStep": 1,
+ "MaxThrottleStep": 1,
+ "CdevCeiling": [0, 25, 25, 26, 26, 26, 26],
+ "LimitInfo": [0, 0, 1, 1, 26, 26, 26]
+ }
+ ]
+ },
{
"Name":"USB-MINUS-NEUTRAL",
"Type":"UNKNOWN",
diff --git a/thermal/thermal_info_config_husky.json b/thermal/thermal_info_config_husky.json
index f69738f..970b6d0 100644
--- a/thermal/thermal_info_config_husky.json
+++ b/thermal/thermal_info_config_husky.json
@@ -473,6 +473,26 @@
"Disabled":true
}
]
+ },
+ {
+ "Mode": "camera",
+ "BindedCdevInfo": [
+ {
+ "CdevRequest": "thermal-cpufreq-0",
+ "MaxReleaseStep": 1,
+ "Disabled":true
+ },
+ {
+ "CdevRequest": "thermal-cpufreq-1",
+ "MaxReleaseStep": 1,
+ "Disabled":true
+ },
+ {
+ "CdevRequest": "thermal-cpufreq-2",
+ "MaxReleaseStep": 1,
+ "Disabled":true
+ }
+ ]
}
]
},
@@ -518,7 +538,7 @@
},
{
"CdevRequest": "thermal-cpufreq-2",
- "CdevWeightForPID": [0.252, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
+ "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1,
"MaxThrottleStep": 2,
"CdevCeiling": [0, 13, 13, 13, 13, 13, 13]
@@ -550,18 +570,24 @@
"BindedCdevInfo": [
{
"CdevRequest": "thermal-cpufreq-0",
+ "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1,
- "Disabled":true
+ "MaxThrottleStep": 1,
+ "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
},
{
"CdevRequest": "thermal-cpufreq-1",
+ "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1,
- "Disabled":true
+ "MaxThrottleStep": 2,
+ "CdevCeiling": [0, 9, 9, 9, 9, 9, 9]
},
{
"CdevRequest": "thermal-cpufreq-2",
+ "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1,
- "Disabled":true
+ "MaxThrottleStep": 2,
+ "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
}
]
}
@@ -770,15 +796,40 @@
"Offset":1140,
"Multiplier":0.001
},
+ {
+ "Name":"thb_hda",
+ "Type":"UNKNOWN",
+ "Multiplier":1
+ },
+ {
+ "Name":"IS_WLC",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "Formula":"COUNT_THRESHOLD",
+ "Combination":["thb_hda"],
+ "Coefficient":[1],
+ "Multiplier":1
+ },
{
"Name":"VIRTUAL-SKIN-CHARGE",
"Type":"UNKNOWN",
"Version":"4.0",
"VirtualSensor":true,
- "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE-SUB-0", "VIRTUAL-SKIN-CHARGE-SUB-1", "VIRTUAL-SKIN-CHARGE-SUB-2", "VIRTUAL-SKIN-CHARGE-SUB-3"],
"Coefficient":[1.0, 1.0, 1.0, 1.0],
+ "Multiplier":0.001
+ },
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-WIRED",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"WEIGHTED_AVG",
+ "Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
+ "Coefficient":[1.0, -1000000],
"HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
@@ -813,6 +864,49 @@
}
]
},
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-PERSIST",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"MAXIMUM",
+ "Combination":["VIRTUAL-SKIN-CHARGE"],
+ "Coefficient":[1.0],
+ "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
+ "Multiplier":0.001,
+ "PollingDelay":60000,
+ "PassiveDelay":7000,
+ "PIDInfo": {
+ "K_Po":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
+ "K_Pu":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
+ "K_I":["NAN", "NAN", 27, "NAN", "NAN", "NAN", "NAN"],
+ "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "I_Max":["NAN", "NAN", 1383, "NAN", "NAN", "NAN", "NAN"],
+ "S_Power":["NAN", "NAN", 2383, "NAN", "NAN", "NAN", "NAN"],
+ "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "MaxAllocPower":["NAN", "NAN", 8022, "NAN", "NAN", "NAN", "NAN"],
+ "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "I_Default":1383
+ },
+ "ExcludedPowerInfo": [
+ {
+ "PowerRail": "PARTIAL_SYSTEM_POWER",
+ "PowerWeight": [0.21, 0.21, 0.21, 0.21, 0.42, 0.42, 0.42]
+ }
+ ],
+ "BindedCdevInfo": [
+ {
+ "CdevRequest": "chg_mdis",
+ "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+ "MaxReleaseStep": 1,
+ "MaxThrottleStep": 1,
+ "CdevCeiling": [0, 25, 25, 26, 26, 26, 26],
+ "LimitInfo": [0, 0, 1, 1, 26, 26, 26]
+ }
+ ]
+ },
{
"Name":"VIRTUAL-SKIN-FRONT-SUB-0",
"Type":"UNKNOWN",
diff --git a/thermal/thermal_info_config_shiba.json b/thermal/thermal_info_config_shiba.json
index 9c71dbe..87adbb9 100644
--- a/thermal/thermal_info_config_shiba.json
+++ b/thermal/thermal_info_config_shiba.json
@@ -441,6 +441,26 @@
"Disabled":true
}
]
+ },
+ {
+ "Mode": "camera",
+ "BindedCdevInfo": [
+ {
+ "CdevRequest": "thermal-cpufreq-0",
+ "MaxReleaseStep": 1,
+ "Disabled":true
+ },
+ {
+ "CdevRequest": "thermal-cpufreq-1",
+ "MaxReleaseStep": 1,
+ "Disabled":true
+ },
+ {
+ "CdevRequest": "thermal-cpufreq-2",
+ "MaxReleaseStep": 1,
+ "Disabled":true
+ }
+ ]
}
]
},
@@ -486,7 +506,7 @@
},
{
"CdevRequest": "thermal-cpufreq-2",
- "CdevWeightForPID": [0.252, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
+ "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1,
"MaxThrottleStep": 2,
"CdevCeiling": [0, 13, 13, 13, 13, 13, 13]
@@ -518,18 +538,24 @@
"BindedCdevInfo": [
{
"CdevRequest": "thermal-cpufreq-0",
+ "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
"MaxReleaseStep": 1,
- "Disabled":true
+ "MaxThrottleStep": 1,
+ "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
},
{
"CdevRequest": "thermal-cpufreq-1",
+ "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
"MaxReleaseStep": 1,
- "Disabled":true
+ "MaxThrottleStep": 2,
+ "CdevCeiling": [0, 9, 9, 9, 9, 9, 9]
},
{
"CdevRequest": "thermal-cpufreq-2",
+ "CdevWeightForPID": [0.225, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
"MaxReleaseStep": 1,
- "Disabled":true
+ "MaxThrottleStep": 2,
+ "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
}
]
}
@@ -782,15 +808,40 @@
"Offset":-5080,
"Multiplier":0.001
},
+ {
+ "Name":"thb_hda",
+ "Type":"UNKNOWN",
+ "Multiplier":1
+ },
+ {
+ "Name":"IS_WLC",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "Formula":"COUNT_THRESHOLD",
+ "Combination":["thb_hda"],
+ "Coefficient":[1],
+ "Multiplier":1
+ },
{
"Name":"VIRTUAL-SKIN-CHARGE",
"Type":"UNKNOWN",
"Version":"4.0",
"VirtualSensor":true,
- "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "neutral_therm", "quiet_therm", "usb_pwr_therm"],
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE-SUB-0", "VIRTUAL-SKIN-CHARGE-SUB-1", "VIRTUAL-SKIN-CHARGE-SUB-2", "VIRTUAL-SKIN-CHARGE-SUB-3", "VIRTUAL-SKIN-CHARGE-SUB-4", "VIRTUAL-SKIN-CHARGE-SUB-5", "VIRTUAL-SKIN-CHARGE-SUB-6"],
"Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
+ "Multiplier":0.001
+ },
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-WIRED",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "neutral_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"WEIGHTED_AVG",
+ "Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
+ "Coefficient":[1.0, -1000000],
"HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
@@ -825,6 +876,49 @@
}
]
},
+ {
+ "Name":"VIRTUAL-SKIN-CHARGE-PERSIST",
+ "Type":"UNKNOWN",
+ "Hidden":true,
+ "VirtualSensor":true,
+ "TriggerSensor":["north_therm", "cam_therm", "soc_therm", "charge_therm", "disp_therm", "neutral_therm", "quiet_therm", "usb_pwr_therm"],
+ "Formula":"MAXIMUM",
+ "Combination":["VIRTUAL-SKIN-CHARGE"],
+ "Coefficient":[1.0],
+ "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
+ "Multiplier":0.001,
+ "PollingDelay":60000,
+ "PassiveDelay":7000,
+ "PIDInfo": {
+ "K_Po":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
+ "K_Pu":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
+ "K_I":["NAN", "NAN", 21, "NAN", "NAN", "NAN", "NAN"],
+ "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "I_Max":["NAN", "NAN", 1066, "NAN", "NAN", "NAN", "NAN"],
+ "S_Power":["NAN", "NAN", 2066, "NAN", "NAN", "NAN", "NAN"],
+ "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+ "MaxAllocPower":["NAN", "NAN", 6412, "NAN", "NAN", "NAN", "NAN"],
+ "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "I_Default":1066
+ },
+ "ExcludedPowerInfo": [
+ {
+ "PowerRail": "PARTIAL_SYSTEM_POWER",
+ "PowerWeight": [0.16, 0.16, 0.16, 0.16, 0.32, 0.32, 0.32]
+ }
+ ],
+ "BindedCdevInfo": [
+ {
+ "CdevRequest": "chg_mdis",
+ "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+ "MaxReleaseStep": 1,
+ "MaxThrottleStep": 1,
+ "CdevCeiling": [0, 25, 25, 26, 26, 26, 26],
+ "LimitInfo": [0, 0, 1, 1, 26, 26, 26]
+ }
+ ]
+ },
{
"Name":"VIRTUAL-SKIN-FRONT-SUB-0",
"Type":"UNKNOWN",
diff --git a/wifi/BoardConfig-wifi.mk b/wifi/BoardConfig-wifi.mk
index fdc7409..4710298 100644
--- a/wifi/BoardConfig-wifi.mk
+++ b/wifi/BoardConfig-wifi.mk
@@ -36,3 +36,5 @@ PRODUCT_COPY_FILES += \
device/google/shusky/wifi/p2p_supplicant_overlay.conf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/p2p_supplicant_overlay.conf \
device/google/shusky/wifi/wpa_supplicant_overlay.conf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/wpa_supplicant_overlay.conf
+# Add WIFI_FEATURE_IMU_DETECTION to soong_config
+$(call soong_config_set,wifi,feature_imu_detection,$(WIFI_FEATURE_IMU_DETECTION))